ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196)

6-9 May 2001

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  • Reviewers

    Publication Year: 2001, Page(s):ix - xix
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  • The 2001 IEEE International Symposium on Circuits and Systems

    Publication Year: 2001, Page(s):0_2 - lxxii
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  • Adaptive negative cycle detection in dynamic graphs

    Publication Year: 2001, Page(s):163 - 166 vol. 5
    Cited by:  Papers (3)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (450 KB) | HTML iconHTML

    We examine the problem of detecting negative cycles in a dynamic graph, which is a fundamental problem that arises in electronic design automation and systems theory. We introduce the concept of adaptive negative cycle detection, in which a graph changes over time, and negative cycle detection needs to be done periodically, but not necessarily after every individual change. Such scenarios arise, f... View full abstract»

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  • A combined tree growing technique for block-test scheduling under power constraints

    Publication Year: 2001, Page(s):255 - 258 vol. 5
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (508 KB) | HTML iconHTML

    A tree growing technique is used here together with classical scheduling algorithms in order to improve the test concurrency having assigned power dissipation limits. First of all, the problem of unequal-length block-test scheduling under power dissipation constraints is modeled as a tree growing problem. Then a combination of list and force-directed scheduling algorithms is adapted to tackle it. ... View full abstract»

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  • The hierarchical timing pair model

    Publication Year: 2001, Page(s):367 - 370 vol. 5
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (448 KB) | HTML iconHTML

    We present a new model for representing timing information for functions in High-Level Synthesis (HLS). We identify shortcomings of the conventional timing model, which is a very simple model derived from the combinational logic model, and show that our new model overcomes many of these defects. In particular, we are able to provide a unified timing model that describes hierarchical combinational ... View full abstract»

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  • Author index

    Publication Year: 2001, Page(s):539 - 552
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  • ENISLE: an intuitive heuristic nearly optimal solution for mincut and ratio mincut partitioning

    Publication Year: 2001, Page(s):167 - 170 vol. 5
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (296 KB) | HTML iconHTML

    Mincut partitioning is to minimize the total cuts of the edges by the partitioning of nodes into two sets. The proposed method, Edge-Node Interleaved Sort for Leaching and Envelop (ENISLE) algorithm, not only uses node information but also uses edge information. It is simple, but works effectively, and has never appeared in any earlier literature. It can soon obtain an intuitive heuristic nearly o... View full abstract»

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  • Trapezoid-to-simple polygon recomposition for resistance extraction

    Publication Year: 2001, Page(s):495 - 498 vol. 5
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (472 KB) | HTML iconHTML

    Chip level resistance extraction has been carried out using heuristic functions based on layout object geometries. With prevalent hierarchical designs, layout objects on the same interconnect layer in subcells may well overlap in their parent cell. Resistance extraction based on geometrical heuristics as given by Hwang (1991) and Ladage et al. (1993), require polygons to be simple. As most layout ... View full abstract»

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  • A constructive procedure for optimizing the placement of macrocells

    Publication Year: 2001, Page(s):57 - 60 vol. 5
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (296 KB) | HTML iconHTML

    A constructive placement procedure is presented that, at each move, places a macrocell at its optimum position with respect to the already placed macrocells. This optimum position is determined by performing one-dimensional searches along the edges of the placed macrocells. The presented test results show that the quality of solutions obtained is better than that obtained by simulated annealing, a... View full abstract»

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  • Pulsed activation: Saving power for mixed-signal circuits

    Publication Year: 2001, Page(s):407 - 410 vol. 5
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (320 KB) | HTML iconHTML

    A novel power saving technique called pulsed activation is explicitly proposed in this paper, which is suited for mixed-signal systems. It is an extension of guarded evaluation from digital systems to mixed-signal systems. The key idea of this approach is to shut down the useless analog part automatically with the internal digital signals. Its basic theoretical framework is presented, and a new pu... View full abstract»

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  • New results on zonal based motion estimation algorithms-advanced predictive diamond zonal search

    Publication Year: 2001, Page(s):183 - 186 vol. 5
    Cited by:  Papers (19)  |  Patents (30)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (392 KB) | HTML iconHTML

    Zonal based motion estimation algorithms have been gaining in popularity in video coding. This is due to their superior performance and reduced complexity versus other conventional algorithms. In this paper we propose a further improvement on these algorithms named the Advanced Predictive Diamond Zonal Search (APDZS). The proposed algorithm introduces the concepts of multiple initial predictor can... View full abstract»

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  • Multiple fault diagnosis of analog circuits by locating ambiguity groups of test equation

    Publication Year: 2001, Page(s):199 - 202 vol. 5
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (320 KB) | HTML iconHTML

    This paper proposes a method to diagnose the multiple faults in linear analog circuits. The test equation establishes the relationship between the measured responses and faulty excitations due to faulty elements. The QR factorization is applied to identify ambiguity groups in the test verification matrix. The suspicious faulty excitations of the minimum size are determined. Faulty parameters are e... View full abstract»

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  • A novel subcircuit extraction algorithm by recursive identification scheme

    Publication Year: 2001, Page(s):491 - 494 vol. 5
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (376 KB) | HTML iconHTML

    To extract subcircuits from a large circuit netlist is an important task that contributes a lot in many fields of computer aided design. In this paper, a novel subcircuit extraction algorithm-DECIDE, based on a recursive graph identification scheme as well as a fast graph construction approach is presented. Cooperating with a proper weighting function that assigns a weighting value to each node, t... View full abstract»

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  • An automatic word length determination method

    Publication Year: 2001, Page(s):53 - 56 vol. 5
    Cited by:  Papers (14)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (316 KB) | HTML iconHTML

    A method to determine the word length required by implementations of Digital Signal Processing (DSP) algorithms is presented. The method uses a C/C++ fixed-point simulation tool to model the impact of finite word length on overall accuracy. It finds a combination of quasi-optimum bit resolutions in arbitrary data flow graphs by computing dissimilarities between fixed-point and floating-point simul... View full abstract»

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  • Tight coupling of timing-driven placement and retiming

    Publication Year: 2001, Page(s):351 - 354 vol. 5
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (340 KB) | HTML iconHTML

    Retiming is a widely investigated technique for performance optimization. In general, it performs extensive modifications on a circuit netlist, leaving it unclear whether the achieved performance improvement will still be valid after placement has been performed. This paper presents an approach for integrating retiming into a timing-driven placement environment. The experimental results show the b... View full abstract»

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  • A statistical methodology for the design of high-performance current steering DAC's

    Publication Year: 2001, Page(s):311 - 314 vol. 5
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (364 KB) | HTML iconHTML

    Random device variations are a key factor limiting the performances of high-resolution CMOS current steering D/A converters. In this paper a novel design methodology based on statistical modeling of MOS drain current has been developed. This technique requires firstly an estimation of mean value and autocorrelation function of a single stochastic process, which all the process/device variations ar... View full abstract»

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  • Robust transition density estimation by considering input/output transition behavior

    Publication Year: 2001, Page(s):403 - 406 vol. 5
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (328 KB) | HTML iconHTML

    A robust signal transition density propagation method for a zero delay model is presented to obtain the signal transition density for estimating the power consumption. The power estimation for the zero delay model is a proper criteria for the lower boundary of power consumption. Two important estimation methodologies had been proposed. While one method has some accuracy problem because of ignoring... View full abstract»

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  • Masking compressed video connection utilization in ATM networks

    Publication Year: 2001, Page(s):145 - 148 vol. 5
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (276 KB) | HTML iconHTML

    This paper examines the use of cell injection to change the observable characteristics of Variable Bit Rate (VBR) ATM connections most commonly used to transport compressed video. “Cell Injection” is a technique for masking Virtual Connection (VC) utilization in ATM networks from undesired third parties by altering the flow of traffic over the connection. We model the cell injection pr... View full abstract»

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  • Multiresolution mesh representation using vertex cluster contraction

    Publication Year: 2001, Page(s):179 - 182 vol. 5
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (408 KB) | HTML iconHTML

    3D models constructed by free-form modeling using triangular meshes have placed rigorous demands upon transmission bandwidth, storage capacity and computational complexity in rendering. This paper discusses the construction and application of multiresolution mesh representation that can accomodate the growing complexity of 3D models by providing streamability, scalability and compression to 3D mes... View full abstract»

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  • Input vector generation for maximum intrinsic decoupling capacitance of VLSI circuits

    Publication Year: 2001, Page(s):195 - 198 vol. 5
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (400 KB) | HTML iconHTML

    In this paper, we present techniques to find an input vector that maximizes the intrinsic decoupling capacitance of a circuit. This input vector can be used to enhance the on-chip decoupling capacitance in the standby mode and when the macroblock is not used or disabled by certain applications. Enhancing the decoupling capacitance increases the effective charge stored on chip and also makes the po... View full abstract»

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  • Output transition time modeling of CMOS structures

    Publication Year: 2001, Page(s):363 - 366 vol. 5
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (292 KB) | HTML iconHTML

    Non zero signal rise and fall times contribute significantly to CMOS gate performances such as propagation delay or short circuit power dissipation. We present a closed form expression to model output rise and fall times in deep submicron CMOS structures. The model is first developed for inverters considering fast and slow input ramp conditions. It is then extended to gates through a reduction pro... View full abstract»

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  • A variable partition approach for disjoint decomposition

    Publication Year: 2001, Page(s):157 - 162 vol. 5
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (384 KB) | HTML iconHTML

    This paper deals with the problem of determining the set of best free and bound variables (variable partitioning problem) for disjoint serial decomposition, such that the decomposed functions are smaller in size and have maximal don't cares. A pruned breadth first search (PBFS) approach is proposed to determine the set of good variable partitions with minimal time and computational complexity. The... View full abstract»

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  • Parasitic extraction: current state of the art and future trends

    Publication Year: 2001, Page(s):487 - 490 vol. 5
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (356 KB) | HTML iconHTML

    With the increase in circuit performance (higher speeds) and density (smaller feature size) in deep submicron (DSM) designs, interconnect parasitic effects are increasingly becoming more important. This paper first surveys the state of the art in parasitic extraction for resistance, capacitance and inductance. The paper then covers other related topics such as interconnect modeling, delay calculat... View full abstract»

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  • Adaptive motion tracking for fast block motion estimation

    Publication Year: 2001, Page(s):219 - 222 vol. 5
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (352 KB) | HTML iconHTML

    In this paper, an adaptive motion tracking method is proposed to provide an accurate predictive motion vector for the block matching algorithm to locate the search origin by exploiting the high motion correlation in both the temporal and spatial domain. Simulation results show that the proposed technique can greatly enhance the performance of the existing fast block matching algorithms View full abstract»

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  • Progressive fine granular scalable (PFGS) video using advance-predicted bitplane coding (APBIC)

    Publication Year: 2001, Page(s):97 - 100 vol. 5
    Cited by:  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (468 KB) | HTML iconHTML

    A novel architecture for scalable video coding is proposed in this paper. In this scheme video data frames are encoded into multiple layers, including a base layer of relatively lower quality video and multiple enhancement layers of increasingly higher quality video. Unlike conventional layered video coding schemes or the Fine Granular Scalable (FGS) scheme in MPEG-4, only the base layer is predic... View full abstract»

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