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Proceedings International Symposium on Parallel Architectures, Algorithms and Networks. I-SPAN 2000

7-9 Dec. 2000

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Displaying Results 1 - 25 of 42
  • Proceedings International Symposium On Parallel Architectures, Algorithms And Networks [front matter]

    Publication Year: 2000, Page(s):i - vii
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  • Parallel real-time computation: sometimes quantity means quality

    Publication Year: 2000, Page(s):2 - 11
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1180 KB)

    We show that within the paradigm of real time computation, some classes of problems have the property that a solution to a problem in the class, when computed in parallel, is far superior in quality than the best one obtained on a sequential computer. Examples from these classes are presented. In each case, the solution obtained in parallel is significantly, provably, and consistently better than ... View full abstract»

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  • Proceedings International Symposium on Parallel Architectures, Algorithms and Networks. I-SPAN 2000

    Publication Year: 2000
    Request permission for commercial reuse | PDF file iconPDF (590 KB)
    Freely Available from IEEE
  • Author index

    Publication Year: 2000, Page(s): 297
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    Freely Available from IEEE
  • NP-completeness of the bulk synchronous task scheduling problem and its approximation algorithm

    Publication Year: 2000, Page(s):127 - 132
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (448 KB)

    The bulk synchronous task scheduling problem (BSSP) is known as an effective task scheduling problem for distributed-memory machines, but the time complexity of BSSP is unknown. This paper presents a proof of NP-completeness of BSSP even in the case of unit time tasks and positive integer constant communication delays. This paper also gives an approximation algorithm for BSSP in several restricted... View full abstract»

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  • On-the-fly sending: a low latency high bandwidth message transfer mechanism

    Publication Year: 2000, Page(s):186 - 193
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (632 KB)

    Low latency high bandwidth network interface architectures are described. This paper proposes two types of architectures, atomic on-the-fly (OTF) sending with a header TLB, and block on-the-fly sending with protection stampable window memory. These techniques work very effectively with MEMOnet which is a class of network interface card (NIC) plugged into a memory slot. We are developing a network ... View full abstract»

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  • Multiprocessor scheduling problem with probabilistic execution costs

    Publication Year: 2000, Page(s):121 - 126
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (416 KB)

    In this paper, we propose a method for tolerating an inaccuracy of the estimated execution cost of tasks that is usually assumed to be accurate in static multiprocessor scheduling algorithms. In the proposed method, tasks are assigned onto processors in such a way to minimize the maximum expected execution cost rather than the worst case or best case execution costs. A detailed analysis of the pro... View full abstract»

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  • Greedy dynamic hot-potato routing on arrays

    Publication Year: 2000, Page(s):178 - 185
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (676 KB)

    We consider the problem of routing packets in two-dimensional torus-connected processor arrays. Motivated by theoretical work on dynamic routing, we address the dynamic case where packets are continuously injected into the network. We describe three greedy hot-potato routing algorithms and present simulation experiments on tori of several sizes using four well-known greedy (also known as work-cons... View full abstract»

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  • On designing constrained local access networks

    Publication Year: 2000, Page(s):167 - 176
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (756 KB)

    Most network design problems are computationally intractable. For obtaining approximations, greedy heuristics are commonly employed. The Esau-Williams (1966) algorithm adopts a better greedy heuristic in solving the (constrained) capacitated minimum spanning tree (CMST) problem, using a tradeoff function computing the potential saving in the cost of a link. In this study, the component-oriented tr... View full abstract»

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  • A parallel tabu search and its hybridization with genetic algorithms

    Publication Year: 2000, Page(s):18 - 22
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (496 KB)

    The paper proposes two parallel meta-heuristics. One is a cooperative parallel tabu search which incorporates historical information exchange among processors in addition to its own searching of each processor. The other is a cooperative parallel search between genetic algorithm and tabu search processes. Through computational experiment, we observe the improvement of solutions by our proposed met... View full abstract»

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  • A system for efficiently self-reconstructing E-1½ track switch torus arrays

    Publication Year: 2000, Page(s):44 - 49
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (484 KB)

    A mesh-connected processor array consists of many similar processing elements (PEs), which can be executed in both parallel and pipeline processing. For the implementation of an array of large numbers of processors, it is necessary to consider some fault tolerant issues to enhance the (fabrication-time) yield and the (run-time) reliability. We introduce the E-1½-TS torus array ray model and... View full abstract»

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  • On the effect of link failures in fibre channel storage area networks

    Publication Year: 2000, Page(s):102 - 111
    Cited by:  Papers (4)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (904 KB)

    The fast growth of data intensive applications has caused a change in the traditional storage model. The server-to-disk approach is being replaced by storage area networks (SANs), which enable storage to be externalized from servers, thus allowing storage devices to be shared among multiple servers. The prominent technology for implementing SANs is Fibre Channel, due to its suitability for storage... View full abstract»

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  • Reconfigurable mesh-connected processor arrays using row-column bypassing and direct replacement

    Publication Year: 2000, Page(s):24 - 29
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (476 KB)

    This paper proposes an advanced reconfiguration scheme using row-column bypassing and direct replacement for two-dimensional mesh-connected processing-node arrays that makes an array usable for massively parallel computing and stand-alone computing in an efficient divided manner. This scheme uses an array providing a switching circuit in every node for row-column bypassing and a simple bypass netw... View full abstract»

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  • On the diameter of the generalized de Bruijn graphs UGB(n, n2+1)

    Publication Year: 2000, Page(s):57 - 61
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (248 KB)

    The generalized de Bruijn graph UGB(n, n2+1) is the graph with vertex set V={0, 1, ..., n2} and the neighborhood N(i) of i∈V is N(i)=X(i)∩Y(i) where X(i)={in+d(modn2+1):α∈D and [(2i-αn)+(n2+1)Z]∩D=Ø}, Y(i)={(β-i)n(modn2+1):β∈D and [(β-2i)n+(n 2+1)Z]∩D=Ø}.... View full abstract»

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  • Portable runtime support for graph-oriented parallel and distributed programming

    Publication Year: 2000, Page(s):72 - 77
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (576 KB)

    In this paper, we describe the design and implementation of a portable run-time system for GOP, a graph-oriented programming framework aiming at providing high-bevel abstractions for configuring and programming cooperative parallel processes. The runtime system provides an interface with a library of programming primitives to the low-level facilities required to support graph-oriented communicatio... View full abstract»

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  • An optimization model for routing in low Earth orbit satellite constellations

    Publication Year: 2000, Page(s):161 - 166
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (392 KB)

    A large set of satellite constellations has been proposed to address communication services with worldwide coverage and once data is in the sky, a major issue consists of redistributing it on Earth in a proper way. This work addresses the routing problem in satellite networks. An optimization model is presented. In our model, the communication flow is not divided into several routes, the topology ... View full abstract»

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  • On performance metrics for IP multicast routing

    Publication Year: 2000, Page(s):282 - 291
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (952 KB)

    Current research on multicast benchmarking has focused primarily on measuring the performance capabilities of multicast forwarding devices without thoroughly addressing the impact routing protocols may have on the device. We provide a performance metrics taxonomy for multicast routing protocols to augment current work. These metrics are based upon the activities that occur during the lifetime of a... View full abstract»

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  • Optimal parallel merging algorithms on BSR

    Publication Year: 2000, Page(s):12 - 17
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (364 KB)

    Merging is one of the most fundamental problems in computer science. It is well known that Ω(N/p+loglogN) time is required to merge two sorted sequences each of length N on CRCW PRAM with p processors, where p⩽N logαN for any constant α. We describe two optimal O(1) time solutions to the problem for p=N on BSR (Broadcasting with Selective Reduction). They are the f... View full abstract»

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  • Optimal one-to-many disjoint paths in folded hypercubes

    Publication Year: 2000, Page(s):148 - 153
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (444 KB)

    Routing functions have been shown to be effective in deriving disjoint paths in the hypercube. In this paper, by the aid of a minimal routing function, k+1 disjoint paths from one node to another k+1 distinct nodes are constructed in the folded hypercube whose maximal length is not greater than [k/2]+1, where k is the dimension and [k/2] is the diameter of the folded hypercube. The maximal length ... View full abstract»

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  • Versatile processor design for efficiency and high performance

    Publication Year: 2000, Page(s):266 - 271
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (528 KB)

    New architectural concepts are introduced for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2-CPU (Data-Driven processor) follows the natural flow of programs, minimizes the number of redundant operations, lowers the hardware cost, and reduces the power consumption. Instructions enter the processing unit when they are ready to execute or when a... View full abstract»

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  • Fault-tolerant wormhole routing in 2D meshes

    Publication Year: 2000, Page(s):94 - 101
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (588 KB)

    A deterministic fault-tolerant wormhole routing algorithm is presented for mesh networks in this paper. The proposed algorithm can tolerate convex fault-connected regions with only three virtual channels per physical channel, and overlapping of processors along the boundaries of different fault regions is allowed. The proposed algorithm, which routes the messages by XY routing algorithm in the fau... View full abstract»

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  • Optimal location of high-speed facility in heterogeneous networks

    Publication Year: 2000, Page(s):246 - 251
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (464 KB)

    This paper discuss a problem of locating a facility on tree networks. The facility takes the form of a path- or a tree-shaped subgraph on the network To construct efficient network, we must set the facility to optimal location. In this paper, we propose new evaluation function, all-pair distancesum, which is the sum of distance of all pairs of nodes on the network. Then we show some characteristic... View full abstract»

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  • Combinatorial properties of mesh of trees

    Publication Year: 2000, Page(s):134 - 139
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (320 KB)

    A mesh of trees, which has two favorable properties: small diameter and large bisection, is known as the fastest network when considered in terms of speed. We show that the wide diameter, fault diameter, and Rabin number, which are three generalizations of diameter, of a two dimensional 2n×2n mesh of trees are equal to 5n+1 View full abstract»

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  • Pipelining router design improves parallel system performance

    Publication Year: 2000, Page(s):195 - 200
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (484 KB)

    Efficient communication on fetching remote data is a critical parameter in distributed shared-memory multiprocessors (DSM) in order to achieve high performance. Message passing techniques are used in many modern communication systems and routers are essential building blocks for these communication systems. Hence, in this paper emphasis is placed on the design of routers for 2-ary n-cube networks.... View full abstract»

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  • Hierarchical 3D-torus interconnection network

    Publication Year: 2000, Page(s):50 - 56
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (604 KB)

    Three dimensional (3D) stacked implementation has been proposed as a new technology for massively parallel computers. However, two major limitations have hindered the progress in this direction: the technology of vertical interconnects and the cost in terms of area for these vertical interconnects. Each vertical interconnect requires 300 μm×300 μm area, thus liberal is prohibited. Clea... View full abstract»

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