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Thermal and Thermomechanical Phenomena in Electronic Systems, 2000. ITHERM 2000. The Seventh Intersociety Conference on

Date 23-26 May 2000

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  • ITherm 2000 is the Seventh Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems [front matter]

    Publication Year: 2000 , Page(s): i - viii
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  • Author index

    Publication Year: 2000 , Page(s): 399 - 400
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    Freely Available from IEEE
  • Effect of delamination on the thermal fatigue of solder joints in flip chips

    Publication Year: 2000 , Page(s): 200 - 207 vol. 2
    Cited by:  Papers (3)
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    This paper describes a study of the effects of a delamination at the silicon/underfill interface on the fatigue life of the solder joints of a flip chip. It was first shown that it is important to consider creep deformation during the ramp times, in order to capture the deformation of the solder joints correctly. The effect of the size and location of typical delaminations in a flip chip assembly was then studied. A total of seven cases were simulated using three-dimensional finite element models. These consist of a baseline case with no delamination, and six other cases with different delamination sizes and locations. The fatigue life of the most critical solder joint was found to vary nonlinearly with delamination size and exponentially with distance between delamination and solder joint. It has been established in the literature that the most critical solder joint in a flip chip assembly is the outermost one. However, it was found in this study that the presence of a delamination near another solder joint can cause that particular solder joint to become the most critical one in the flip chip assembly View full abstract»

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  • Stress/strength and reliability evaluations on UBM in different solder systems

    Publication Year: 2000 , Page(s): 193 - 199 vol. 2
    Cited by:  Papers (3)
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    UBM (Under Bump Metallurgy) reliability is one of the critical issues in the total reliability of a flip-chip bumping technology. Since the UBM materials and structures vary for different bumping technologies, the UBM strength and reliability need to be determined for each design and process. In addition, the stress that a UBM experiences during thermal cycles depends on the solder alloy used in the interconnect. Different solder alloys require different UBM structures and strengths to achieve good reliability thermal cycling. In this study, a simplified stress model is developed to determine the UBM stress during thermal cycling. A simplified stress model for the UBM strength is also developed. These models are used to predict the stress and strength of the UBM under the die pull test and the thermal cycle conditions for both eutectic and high lead solder systems. A methodology for using the pull test results to evaluate UBM reliability is also discussed. This methodology can be extended to the studies of UBMs with other solder systems View full abstract»

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  • Characterisation of die attach for power devices using thermal impedance measurement practice and experiment

    Publication Year: 2000 , Page(s): 378 - 384 vol. 2
    Cited by:  Papers (5)
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    This paper describes a technique for measuring cooling curves at power levels of up to 65 W. The paper describes in detail a suitable constant temperature fixture to keep a test vehicle at a constant temperature for these power levels. In this experiment a power diode in bare die form is used as the heating source. The diode Vf is used for junction temperature sensing. The cooling curve method of temperature characterisation is used at this power level because heating curves are difficult to measure when special designed thermal test chips are not available. A special test vehicle was designed to obtain equal temperature distribution across the test diode. The test vehicle has a three layer structure to minimise the number of thermal layers. This enables a more precise cooling curve analysis later in this project. The experimental results were correlated through the use of CFD models. From these CFD models, the thermal resistance and thermal capacitance of the die attach layer can be evaluated. This experiment is part of a project, the objective of which is to thermally characterise die-attach materials for power applications View full abstract»

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  • High heat flux heat pipe mechanism for cooling of electronics

    Publication Year: 2000 , Page(s): 122 - 128 vol. 2
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    This paper discusses an advanced heat pipe mechanism that has the potential of achieving heat flux capabilities over 250 W/cm2. The mechanism utilizes thermally driven pulsating two-phase flow to achieve high heat flux capability and heat transfer coefficient. A simplified hydrodynamic model was developed to guide the proof-of-concept heat pipe design. A more detailed numerical model was also developed and is solved to predict the heat pipe's thermal performance. Test results of proof-of-concept heat pipes verified the heat flux capability of the advanced mechanism and the accuracy of the simplified model. Pulsating heat pipes are feasible approaches to removing increasing heat dissipation densities in electronic equipment View full abstract»

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  • Advanced thermal tester for accurate measurement of internal thermal resistance of high power electronic modules

    Publication Year: 2000 , Page(s): 208 - 212 vol. 2
    Cited by:  Papers (1)
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    A thermal tester has been developed for the accurate measurement of the internal thermal resistance of high-power electronic modules. The tester is designed for the simultaneous measurement of 20 electronic modules each dissipating in excess of 200 W. The heat dissipated is transmitted to the ambient by water-cooled cold plates dedicated to each test site. The tester system layout, mounting assembly, system hydraulic design, cold-plate spreader design and data acquisition instrumentation are described. Sample measurements and the associated uncertainty are also discussed. The sample results are verified by comparison with thermal modeling View full abstract»

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  • Material properties, geometry and their effect on the fatigue life of two flip-chip models

    Publication Year: 2000 , Page(s): 65 - 72 vol. 2
    Cited by:  Papers (2)
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    This paper describes how modeling technology has been used in providing fatigue life time data of two flip-chip models. Full-scale three-dimensional modeling of flip-chips under cyclic thermal loading has been combined with solder joint stand-off height prediction to analyze the stress and strain conditions in the two models. The Coffin-Manson empirical relationship is employed to predict the fatigue life times of the solder interconnects. In order to help designers in selecting the underfill material and the printed circuit board, the Young's modulus and the coefficient of thermal expansion of the underfill, as well as the thickness of the printed circuit boards are treated as variable parameters. Fatigue life times are therefore calculated over a range of these material and geometry parameters. In this paper we will also describe how the use of micro-via technology may affect fatigue life View full abstract»

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  • Measurement of thermally induced strains on flip chip and chip scale packages

    Publication Year: 2000 , Page(s): 232 - 239 vol. 2
    Cited by:  Papers (1)
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    The authors developed and made use of the microDAC deformation measurement technique to determine strain fields on thermally stressed, cross sectioned FC and CSP specimens. The method allows one to resolve strain fields inside tiny structures like e.g. solder interconnects or conductive adhesive layers. It is based on comparison of digitized micrographs obtained from different object load states. Optical, SEM and laser scanning microscopy are applied for image capture. The paper presents results of strain analysis in interconnects of different flip chip configurations and chip scale package types e.g., global shear of outward bumps is almost completely suppressed in most flip chip cases by underfilling. Furthermore, bump deformation can be strongly influenced by the local appearance of glass fabrics in organic laminates used as board materials. A main demand on chip scale package reliability is the avoidance of too large thermal solder ball strains, which lead to material fatigue. Different packages with rigid and flex interposers tackle the stress compensation problem in a different way. A first attempt is made to compare some of them based on experimental strain and warpage measurements View full abstract»

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  • Experimental study on performance of a miniature heat pipe with woven-wired wick

    Publication Year: 2000 , Page(s): 129 - 133 vol. 2
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    The thermal density of electronic parts and systems has been increased continuously as high speed and high density are required for them. The heat generation of the CPU of a notebook PC of higher than the Pentium-II grade has been recently increased to be more than 10 W, and the available packaging space has been compacted. Therefore, it has become inevitable to perform cooling by using miniature heat pipes. In the present study, new woven-wired-type wick with a large capillary limit and a high productivity has been developed, and heat pipes with the diameter of 3 mm or 4 mm to cooling of small-sized electronic parts such as CPU of a notebook PC. Have been designed and manufactured. Further, in as much as the operational characteristics of miniature heat pipes (MHPs) with the diameter of 3 mm or 4 mm are different from those of general medium-sized heat pipes, a performance test has been performed in order to review heat-transfer characteristics and affects of various factors on the performance of MHPs. The operational factors include charging ratio of working fluid, the total length of heat pipes, lengths of an evaporator and a condenser, inclination of installation, number of wick strands, thermal load, etc. The limiting powers of 3 mm MHP and 4 mm MHP are shown to be 6.8 W and 19.5 W, respectively, with angle of inclination of -5°. These show that there is a high possibility of application if one or two MHPs are installed for cooling of CPU more than 10 W View full abstract»

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  • Using experimental analysis to evaluate the influence of printed circuit board construction on the thermal performance of four package types in both natural and forced convection

    Publication Year: 2000 , Page(s): 213 - 225 vol. 2
    Cited by:  Papers (2)
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    As the functionality of electronic systems increase, so does the complexity of printed circuit board (PCB) design, with greater component packing densities requiring additional internal signal, power and ground layers to facilitate interconnection. The extra copper content introduced increases PCB thermal conductivity and heat spreading capability, which can strongly influence component operating temperature. Therefore, this experimental study sought to quantify the impact of PCB construction on component operating temperature and relate this sensitivity to the package design, PCB effective conductivity and convective environment. This was achieved by measuring the steady state thermal performance of four package types (PSO20: heat slug up, PSO20: heat slug down, LFBGA80 and SBGA352) on up to six different, single-component thermal test PCBs in the standard natural and forced convection environments. Test velocities ranged from 0.5 m/s to 5.0 m/s and all test components contained a thermal test die. Measurements of junction temperature and component-PCB surface temperature distributions are both presented for power dissipation levels within the range 0.5 to 6.0 Watts. The study includes the low and high conductivity JEDEC standard, FR4-based test PCBs and typical application boards. As each PCB had a different internal structure and effective thermal conductivity, this study highlights the sensitivity of component operating temperature to the PCB, provides benchmark data for validating numerical models, and helps one assess the applicability of standard junction-to-air thermal resistance (θJA and θ JMA), as well as both junction-to-board (ΨJB) and junction-to-top (ΨJT) thermal characterisation parameters for design purposes on nonstandard PCBs View full abstract»

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  • Active cooling of integrated circuits and optoelectronic devices using a micro configured thermoelectric and fluidic system

    Publication Year: 2000 , Page(s): 134 - 139 vol. 2
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    In this paper we present a new integrated thermo-electric-fluidic cooler (TEFC). This device is essentially composed of a low dimensional thermoelectric heat pump and a miniature fluidic loop in a highly integrated architecture. Heat removal is enhanced by micro-fin structures in the microchannels on the hot side of the thermoelectric device. Discussions are focused on the conceptual design of the TEFC and numerical models for the thermoelectric, and fluidic circuits. Simulation results on modeling of refrigeration loop are presented. Also different substrate materials are evaluated for improved heat spreading. Microchannels in both diamond and copper blocks are found to effectively remove heat and keep a more uniform temperature profile on the active surfaces than in CuW blocks. Fin configurations in the microchannels for enhancing liquid cooling are also evaluated. Preliminary results obtained for a TEFC device show great potentials for applications in cooling communication and mobile electronic systems View full abstract»

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  • A method to predict failure of solder joints caused by thermal shock using finite element analysis for RF power amplifier applications

    Publication Year: 2000 , Page(s): 169 - 173 vol. 2
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    Due to price competition, low-cost design plays an important role in the power amplifier (PA) market. The cost of new single board design saves about 50% of direct material cost. Other advantages include decreasing direct labor cost, increasing maximum power output, increasing PA efficiency, and decreasing piece part count. For quality and reliability of solder joints, liquid-to-liquid thermal shock test would be considered during the design cycle. It was postulated that the failure is related to the coefficient of thermal expansion (CTE) mismatch between different materials, in the PCB, heat spreader, lead, cast heat sink, and device. The high power RF devices used in power amplifiers for base station applications have pushed the requirements of advanced materials and processes to provide new low-cost packaging solutions. A methodology is presented for design option evaluation and failure possibility prediction for solder joints on single board power amplifier. This method integrates the finite element analysis models and experimental data. The finite element model identifies the displacement at the solder joint locations. Several sets of experimental tests have been conducted and analyzed to evaluate the design improvements. Good correlation has been achieved between finite element analysis (FEA) predictions and experimental tests on design options View full abstract»

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  • Thermomechanical diagnostics of BGA packages using digital image/speckle correlation

    Publication Year: 2000 , Page(s): 240 - 245 vol. 2
    Cited by:  Papers (2)
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    Thermomechanical diagnostic techniques are required for the characterization and reliability engineering of electronic packaging. Digital image/speckle correlation (DISC) is attractive for large throughput testing because it eliminates the specimen grating required by moire interferometry and does not require coherent illumination. Problems of DISC include a larger sensitivity to noise and a reduction of sensitivity for large fields of view. The present work uses DISC to study thermomechanical deformations of solder-joints in a cross-sectioned ball grid array (BGA) thermal test package. An iterative algorithm is developed to calculate the in-plane deformation and strain. Frame averaging of digital images reduces the noise, while a scanning stage allows a large effective field of view with acceptable sensitivity. This work achieves a spatial resolution of 2 μm and a sensitivity of 0.01 pixels. Average strains in these solder joints are also calculated to provide data for fatigue lifetime estimation. The approach demonstrated here is promising for on-line thermomechanical diagnostics in IC manufacturing View full abstract»

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  • Thermal characterization of point of used power supply

    Publication Year: 2000 , Page(s): 372 - 377 vol. 2
    Cited by:  Papers (1)
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    A numerical and experimental study of convection heat transfer on a point of used power supply, PUPS, was conducted to determine its thermal performance. The present investigation performed a series of experiments in both free and forced convection modes. The numerical model was also developed to validate the experimental data. The present work also introduced a thermal compact model for the PUPS. This thermal compact model is function of the temperature of the motherboard, ambient temperature, and the thermal resistances between the surface of the PUPS to the air, Rsa and the surface of the PUPS to the motherboard, Rsb. The thermal resistances of the thermal compact model were derived from the experimental results. In addition, the relationships between the thermal resistances of the PUPS and both Rayleigh and Reynolds numbers were also obtained. Finally, the thermal performance of the PUPS in convective heat transfer was determined. The present methodology of the thermal characterization of the present PUPS can be applied to any PUPS, which is commonly used in telecommunication products View full abstract»

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  • Low-order dynamical modeling of natural convective air-cooling system in a vertical channel

    Publication Year: 2000 , Page(s): 140 - 147 vol. 2
    Cited by:  Papers (1)
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    Low-order dynamical models of transitional natural convective air-cooling system in a vertical channel with periodically repeated discrete heat sources are developed. Proper orthogonal decomposition (POD) methodology has been applied to supercritical oscillatory solutions, obtained by solving the flow governing partial differential equations (PDEs) with a spectral element method at Grashof number, Gr=25000. POD is used to extract the empirical eigenfunctions, to compress the data and to identify the organized spatio-temporal structures. Low-order models (LOMs), consisting of reduced number of nonlinear ordinary differential equations (ODEs), are derived using the computed empirical eigenfunctions as basis functions and applying Galerkin projection (GP). The ability of the reduced models to describe the dynamics of the flow and temperature fields at design conditions is studied. In this study, at least four modes for both velocity and temperature are required to predict self-sustained oscillations in time. The LOM predictions based on four modes are in excellent agreement with the full model results, capturing the short- and long-time nonlinear dynamical behavior of the thermo-fluid system. The developed LOMs may be used to make feasible parametric studies with less computational effort and storage requirements, to investigate stability behavior of the forced/natural convective air-cooling systems, and to explore possible flow control strategies View full abstract»

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  • Inelastic behavior of microelectronics solder joints under concurrent vibration and thermal cycling

    Publication Year: 2000 , Page(s): 174 - 180 vol. 2
    Cited by:  Papers (3)
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    Concurrent vibration and thermal environment is commonly encountered in the service life of electronic packaging, such as automotive, airplane, military and mobile electronic devices. Solder joint reliability has been a critical issue of the overall design of microelectronic devices. However, the contribution of vibration to thermal fatigue life of solder joints has rarely been investigated. Vibration is taken as a loading case that only causes elastic material response. Literature is scarce on vibration plasticity and vibration caused fatigue. The standard practice in the industry is to use Miner's rule to calculate combined environment fatigue life. This study shows that using Miner's rule for fatigue life under combined loading is inaccurate. There are a number of models on thermomechanical behavior of solder joints, yet few models are verified by test data obtained from actual package size solder joints under realistic thermomechanical loading. The authors see the need of such tests for the purpose of better understanding of material behavior of solder joints under thermal and vibration loading and providing a solid basis for more accurate material modeling and fatigue life prediction. This paper reports observations from a series of concurrent thermal cycling and vibration tests on 63Sn/37Pb solder joints of an actual ball grid array (BGA) package. Moire interferometry (MI) is used to measure the inelastic deformation field of solder joints with submicron resolution, A large capacity Super AGREE thermal chamber and a high acceleration electrodynamic shaker is assembled together to perform the concurrent cycling. The cyclic plasticity of solder joints and microstructure evolution are discussed and related to fatigue life prediction View full abstract»

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  • A comparison between moire interferometry and strain gages for effective CTE measurement in electronic packages

    Publication Year: 2000 , Page(s): 246 - 252 vol. 2
    Cited by:  Papers (2)
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    High-sensitivity laser moire interferometry technique has proven to be invaluable in characterizing electronic packages. It is often contrasted to the classical strain gage technique as a more powerful, whole-field alternative for the characterization of electronic packages. In this paper, we present a systematic comparison of the accuracy of thermal strains measured using the moire technique to that obtained using strain gages. The effective thermal strains in approximately twenty printed circuit board specimens were measured using the two techniques. The results of the two techniques showed good overall correlation, but differed from each other by as much as 2.73 PPM. The possible sources of error in each technique are identified and discussed. Of practical significance, the measured effective coefficient of thermal expansion varied in wide range by as much as 5 PPM about the commonly used value of 17 PPM. This has been shown in a related study as causing a significant reliability impact for a plastic ball grid array package assembly View full abstract»

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  • A novel heat sink design for low speed flows-a BGA example

    Publication Year: 2000 , Page(s): 16 - 20 vol. 2
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    The ongoing trend in designing electronic systems is to incorporate increased functionality into ever smaller form factors. In addition, the power dissipation from most IC devices continues to increase. Additional design constraints, such as reducing system acoustic noise and weight, are also becoming more prevalent. The combined effect of all these trends is to create increasingly challenging thermal management situations that demand more efficient heat sinks and optimized designs. In this paper a new class of heat sinks are presented and their performance is compared to Airflow conventional heat sinks. MaxiFlowTM heat sinks feature very thin, high ratio fins that radiate at various angles from the base. The result is a very low resistance to airflow and very high efficiency of heat dissipation, especially at low airspeeds. They are also very light in weight, allowing for simple attachment methods and weight savings. To aid in designing thermal solutions that utilize these heat sinks, an analytical model has been developed to predict the thermal resistance as a function of airflow velocity for unducted flow for a conventional design. The improvements of the new design compared to the conventional design will be discussed View full abstract»

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  • Integrated heat sink-heat pipe thermal cooling device

    Publication Year: 2000 , Page(s): 27 - 30 vol. 2
    Cited by:  Patents (1)
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    This paper discusses the design and manufacturability of an optimal thermal cooling solution for microelectronic chips and packages comprised of the integration of folded fin heat sink and heat pipe technologies. This cooling solution is shown to provide a heat-sink-to-ambient thermal resistance of 0.2°C/W. Current extruded heat sink technology being used for the Pentium II generation of microprocessors provides a heat-sink-to-ambient thermal resistance of 0.7-0.8°C/W. Thus the integration of the folded fins to a vapor chamber base provides nearly a 4× improvement on previous HVM enabled heat sinks. The optimization of this thermal cooling solution to yield a robust, cost effective design by leveraging high volume manufacturing (HVM) technologies is described in this paper View full abstract»

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  • Fabrication and characterization of electrokinetic micro pumps

    Publication Year: 2000 , Page(s): 31 - 36 vol. 2
    Cited by:  Papers (1)  |  Patents (24)
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    Electrokinetic (EK) micropumps have been fabricated and demonstrated in which electroosmotic flow is used to transport fluids. Deionized water and pure acetonitrile have been used as working fluids to achieve low current density pumping conditions. These EK pumps have no moving parts and can generate maximum pressures of more than 20 atm at 2 kV applied voltage. Minimizing and controlling electrolytic gas generation is a major concern. Gas generated at the downstream electrode surfaces appears to be forced to dissolve into surrounding fluid at high pressure (>7 atm) condition, and this permits a stable pump operation. Measurements of flow rate have been used to estimate pump structure parameters View full abstract»

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  • Interfacial shear stress, peeling stress, and die cracking stress in trilayer electronic assemblies

    Publication Year: 2000 , Page(s): 56 - 64 vol. 2
    Cited by:  Papers (3)  |  Patents (1)
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    Interfacial shear stress, peeling stress, and die cracking stress due to thermal and elastic mismatch in layered electronic assemblies are one of the major causes of the mechanical failure of electronic packages. A simple but rather accurate method is developed to estimate these thermal stresses for packages with different layer lengths. For layered electronics with thin adhesives, analytical expressions are obtained for interfacial shear stress and peeling stress, and they agree well with the finite element analysis, especially when the moduli of adhesive layers are significantly lower than the moduli of the other layers. An analytic expression of die cracking stress is also obtained for multilayer electronic assemblies View full abstract»

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  • Vibration-induced droplet cooling of microelectronic components

    Publication Year: 2000 , Page(s): 328 - 332 vol. 2
    Cited by:  Papers (1)
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    This paper describes a unique two-phase cooling method that includes a closed heat transfer cell, similar to a thermosyphon that can be used to cool microelectronic packages. The cooling method is based upon a Vibration-Induced Droplet Atomization, or VIDA, process that can generate small liquid droplets inside a closed cell and propel them onto a heated surface. The VIDA technique involves the violent break-up of a liquid film into a shower of droplets by vibrating a piezoelectric actuator and accelerating the liquid film at resonant conditions. The droplets continually coat the surface with a thin liquid film, which evaporates on the heated surface, and the vapor is condensed on the internal surfaces of the heat transfer cell. The condensed liquid is returned via gravity to the piezoelectric actuator where it is again atomized. VIDA heat transfer cells ranging in diameter from 12 to 41 mm, which generate spherical droplets between 50 and 100 μm, have been constructed. Test data described in this study include the operating characteristics of the VIDA cell as well as preliminary cooling capabilities for a small-scale cell that is suitable for cooling a desktop microprocessor. The VIDA process produces droplets of relatively uniform diameter, and the droplets have sufficient momentum to reach the remotely located heated source. Heat fluxes as high as 40 W/cm2 have been measured when a chilled water jacket is used as the external heat removal device View full abstract»

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  • Numerical study of interfacial delamination in a system-on-package (SOP) integrated substrate under thermal loading

    Publication Year: 2000 , Page(s): 356 - 361 vol. 2
    Cited by:  Papers (1)
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    Research on system-on-package (SOP) with integrated substrate is being pursued at Georgia Tech. The integrated substrate contains embedded thin-film passive components in a multilayered substrate to achieve higher performance, lower cost, smaller size and lighter weight. However, as in all multilayered structures, SOP integrated substrate could have higher interfacial stresses and therefore could have interfacial delamination induced by material properties mismatch under thermal loading, if not carefully designed and fabricated. In this study, numerical analyses have been performed to investigate interfacial delamination propagation in SOP integrated substrate under thermal loading. Three candidate base layer materials and two dielectric layer materials have been studied. Recommendations for reducing delamination propagation were suggested. Further study is being conducted to investigate effects of time and temperature dependent material properties and cyclic thermal loading conditions View full abstract»

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  • Study of thermal characteristics on solder and adhesive bonded folded fin heat sink

    Publication Year: 2000 , Page(s): 1 - 7 vol. 2
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    The rapid advancement in technology of microprocessors has led electronics thermal system designers to pay increased attention to the folded fin heat sink. The advantages of using a folded fin heat sink are light weight, low profile, and small footprint. There are three manufacturing methods for bonding the folded fin to the base of heat sink: adhesive bonding, soldering, and brazing. Brazing is a high temperature process which takes place at around 550°C. The major concern with using the brazing process to manufacture heat sinks is dimensional deformation. The adhesive process, on the other hand, requires only sub 200°C or room temperature curing process. However, its thermal contact resistance at the joint is higher than others. Solder bonding is an alternative solution to above problems. The soldering process requires much lower temperature, less than 200°C, yet it gives excellent thermal contact and bond strength at the joint. This paper presents the theoretical study of thermal contact resistance at the joint between the folded fin base and the spreader plate of heat sink, and also presents the experimental results which support this theory View full abstract»

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