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Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668)

21-23 June 2000

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  • Proceedings 11th International Workshop on Rapid System Prototyping. RSP 2000. Shortening the Path from Specification to Prototype (Cat. No.PR00668)

    Publication Year: 2000
    Request permission for commercial reuse | PDF file iconPDF (200 KB)
    Freely Available from IEEE
  • Power-constrained block-test list scheduling

    Publication Year: 2000, Page(s):182 - 187
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (423 KB)

    A list scheduling approach is proposed in this paper to overcome the problem of unequal-length block-test scheduling under power dissipation constraints. An extended tree growing technique is also used in combination with the list scheduling algorithm in order to improve the test concurrency, having assigned power dissipation limits. Moreover, the algorithm features a power dissipation balancing p... View full abstract»

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  • Author index

    Publication Year: 2000, Page(s): 234
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    Freely Available from IEEE
  • Combining virtual benchmarking with rapid system prototyping for real-time embedded multiprocessor signal processing system codesign

    Publication Year: 2000, Page(s):20 - 25
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (116 KB)

    The codesign of embedded real-time signal processing systems is complex. The use of commercial-off-the-shelf (COTS) multiprocessor (MP) hardware and software can reduce codesign complexity. Further complexity reduction can be obtained with emerging rapid system prototyping (RSP) frameworks, which can generate deployable code by leveraging vendor communication and computation libraries. However, th... View full abstract»

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  • Integration and evolution of model-based tool prototypes

    Publication Year: 2000, Page(s):142 - 147
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (252 KB)

    Model-based software prototyping enables the effective construction of design tools for new system design approaches in a very short time. In this paper, we show that explicit interface modelling is well-suited to integrate such prototyped tools into design environments. In addition, we point out how our model-based generative approach supports the evolution of prototypes very well. We present the... View full abstract»

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  • Highly configurable control boards: a tool and a design experience

    Publication Year: 2000, Page(s):174 - 179
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (224 KB)

    The work described in this paper has two main objectives: on the one hand, the development of a software tool to handle system configuration and hardware testing and debugging tasks, and on the other hand, the development of a highly configurable family of control boards, by means of the extensive use of FPGAs and the developed software tool. The results show that the system can be used in differe... View full abstract»

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  • Mapping a high-speed wireless communication function to the reconfigurable J-platform

    Publication Year: 2000, Page(s):103 - 108
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (212 KB)

    We map a software radio function to a coarse grain platform, namely the J-platform. In our previous work the J-platform was based on two types of cells, namely the MA PLUS, which is an enhanced multiply-add cell, and the UNL, a Universal NonLinear cell. We introduce one more cell, namely the DF cell, which is a Data Fabric cell. These three cells account for the versatility of the approach and pro... View full abstract»

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  • Validation of a Link Layer Synthesizable Core-a prototyping case study

    Publication Year: 2000, Page(s):208 - 213
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (160 KB)

    This paper describes a prototyping case study of validation of EnThink's Link Layer Synthesizable Core (LINK CORE) in an embedded system. It is a P1394a based link layer controller conforming to the 1394 serial bus specification. The paper provides a brief tutorial on the IEEE 1394 standard, describing the need for a high-speed digital interface for consumer electronics devices. The IEEE 1394 High... View full abstract»

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  • A Verilog to C compiler

    Publication Year: 2000, Page(s):122 - 127
    Cited by:  Papers (5)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (164 KB)

    This paper describes a compiler which converts from Verilog to C. The output is then compiled to machine native code and tends to execute faster than native-mode Verilog simulation because the compiler preserves only the synthesis semantics, not the simulation semantics of Verilog, and also performs logic minimisation. Buses of up to 32 or 64 bits can be modelled as C integers, whereas larger buse... View full abstract»

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  • Reconfigurable instruction set processors: a survey

    Publication Year: 2000, Page(s):168 - 173
    Cited by:  Papers (19)  |  Patents (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (188 KB)

    Reconfigurable instruction-set processors have the capability to adapt their instruction sets to the application being executed through a reconfiguration in their hardware. Through this adaptation, they are expected to achieve a great improvement in performance compared to fixed instruction-set processors. In this paper, we discuss the different hardware aspects that have to be considered during t... View full abstract»

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  • FPGA technology snapshot: current devices and design tools

    Publication Year: 2000, Page(s):200 - 205
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (128 KB)

    The paper presents a FPGA technology snapshot. It shows the status of the latest reprogrammable FPGA families and discusses the capabilities of FPGA design tools. The accent is on comparison of FPGA capacities, advanced architectural features, partitioning for synthesis, floorplanning, macro block processing, memory implementation techniques, etc View full abstract»

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  • Speeding up hardware prototyping by incremental simulation/emulation

    Publication Year: 2000, Page(s):98 - 102
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (128 KB)

    We describe a method for the automatic construction of a testbench, able to dynamically communicate a standard VHDL simulator with a logic emulator by means of text files. The proposed approach significantly reduces turn-around times in an emulation based rapid system prototyping environment. In this way, time-consuming logic synthesis and technology mapping steps are moved, in the design cycle, a... View full abstract»

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  • Hardware accelerated estimation of multiplexer-introduced loss for MPEG-4 data streams

    Publication Year: 2000, Page(s):214 - 219
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (128 KB)

    As MPEG-4 uses objects to compose scenes, and each object is transmitted using one or more data streams (e.g. for audio, video base, and video enhancement layers) the network overhead for a single service can be very high. MPEG-4 systems specify a multiplexing tool to reduce the network overhead. This multiplexer can drop frames if the frame deadlines and the network channel QoS make timely transm... View full abstract»

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  • An evaluation of code generation strategies targeting hardware for the rapid prototyping of SDL specifications

    Publication Year: 2000, Page(s):134 - 139
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (204 KB)

    The specification of an embedded system at the system level, together with co-joint hardware/software synthesis, is a goal of many rapid prototyping projects. SDL has been proposed as a formal and abstract specification language that is well-suited for this purpose. In the automated generation of hardware, however, SDL's asynchronous communication model (directly implemented in the so-called serve... View full abstract»

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  • Efficient modeling of preemption in a virtual prototype

    Publication Year: 2000, Page(s):14 - 19
    Cited by:  Papers (9)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (140 KB)

    A virtual prototype combines a hardware model with hardware/software cosimulation to support the development and debugging of embedded software before a hardware prototype is available. Existing techniques for hardware/software cosimulation execute the software either on an instruction set simulator for accuracy or on the simulator host processor for increased performance. On the host processor ti... View full abstract»

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  • The FLYSIG prototyping approach

    Publication Year: 2000, Page(s):115 - 120
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (180 KB)

    We present a customized approach to rapid prototyping based on a new chip design. The chip is named FLYSIG and adapts the prototyping architecture to the target architecture and the application domain in view. The chip architecture is scalable according to the requirements of arithmetic operators and interconnection flexibility. The prototyping chip is configurable in terms of operator functionali... View full abstract»

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  • Simulation and rapid prototyping of flexible systems-on-a-chip for future mobile communication applications

    Publication Year: 2000, Page(s):160 - 165
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1328 KB)

    The way to future broadband access techniques into mobile communication systems introduces new and flexible radio network architectures with difficult and interesting challenges. The corresponding technical developments have to solve a new set of problems that stem from access mechanisms, power consumption, error rate, transmission speed and bandwidth characteristics of the wireless links, mobilit... View full abstract»

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  • Design space exploration for hardware/software codesign of multiprocessor systems

    Publication Year: 2000, Page(s):8 - 13
    Cited by:  Papers (3)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (208 KB)

    We present a new methodology to rapidly explore the large design space encountered in hardware/software systems. The proposed methodology is based on a fast and accurate estimation approach. It has been implemented as an extension to a hardware/software codesign flow to enable the exploration of a large number of multiprocessor architecture solutions from the very start of the design process. The ... View full abstract»

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  • MODUS: integrated behavior-oriented model for rapid prototyping

    Publication Year: 2000, Page(s):40 - 45
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (196 KB)

    This paper presents a unified behavior model for digital system (MODUS) that combines both the reactive and the transformational-or procedural-paradigms. The model is the core of an integrated development environment for safety critical applications, designed for rapid prototyping. MODUS includes distinctive features, such as minimum cause-effect delays and uncertain states, seeking accurate model... View full abstract»

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  • A design methodology for hardware prototyping of integrated AC drive control: application to direct torque control of an induction machine

    Publication Year: 2000, Page(s):90 - 95
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (348 KB)

    This paper presents a top-down methodology for hardware rapid prototyping of integrated alternating current (AC) drive control, based on hardware description languages (HDLs). This methodology is a set of procedures and computer aided design tools to optimize development time, final product cost and reusability of the digital electronic system design. The use of HDLs provides continuous checking o... View full abstract»

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  • Using MetaScribe to prototype a UML to C++/Ada95 code generator

    Publication Year: 2000, Page(s):128 - 133
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (220 KB)

    The use of program generation from graphical representations like UML is increasing in software projects. The notion of hypergenericity is being posited to improve program generators. This paper presents MetaScribe, a tool designed to build program generators, which provides guidelines to program generator designers and has enhanced facilities for reusability. An example illustrates the use of Met... View full abstract»

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  • Efficient clock-cycle precise simulation at architecture level in C++

    Publication Year: 2000, Page(s):222 - 227
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (164 KB)

    Typically the design of hardware and software for embedded systems is tightly coupled. In combination, hardware and software have to fulfil the specific requirements of a particular application. This represents a challenge and opportunity in order to look for a balanced solution between both parts. A fast simulator with adequate interfaces is able to support this desire based on experiments starti... View full abstract»

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  • Embedded system architecture design based on real-time emulation

    Publication Year: 2000, Page(s):228 - 233
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (268 KB)

    This paper presents a new approach to the design of embedded systems. Due to restrictions that state-of-the-art methodologies contain for hardware/software partitioning, we have developed an emulation based method using the facilities of reconfigurable hardware components, such as field programmable gate arrays (FPGA). Our own emulation environment called the SPYDER tool set was used; it is best s... View full abstract»

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  • Equivalence checking of two Statechart specifications

    Publication Year: 2000, Page(s):46 - 51
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (196 KB)

    In this paper we give a process algebraic semantics for Statechart via a translation into algebra of communicating shared resources (ACSR). Also, we propose a formal verification method for Statechart specifications by showing an equivalence relationship between two Statechart specifications. This makes it possible to combine the advantages of a graphical language with the rigor of process algebra View full abstract»

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  • Coprocessor synthesis of multirate system using static scheduling theory

    Publication Year: 2000, Page(s):148 - 153
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (264 KB)

    Presents a way to perform hardware/software partitioning of multirate systems based on static priority scheduling theory. The problem is described by a set of interacting concurrent tasks. Each task is characterized by the lower bound on the time between successive arrivals of task, a deadline and a dataflow graph describing the computation to be performed on each invocation. All the tasks are imp... View full abstract»

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