2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390)

27-29 Feb. 2000

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  • 2000 Southwest Symposium on Mixed-Signal Design (Cat. No.00EX390)

    Publication Year: 2000
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    Freely Available from IEEE
  • Discussions on the CORDIC processor using leading zeros detector

    Publication Year: 2000, Page(s):175 - 178
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (169 KB)

    In this paper the application of CORDIC (COordinate Rotation DIgital Computer) processor using leading zeros detector (LZD) is discussed. In previous research, LZD was used in the normalization of the floating point number computation, also we find that it can be used in the CORDIC processor for reducing the number of iterations, deciding the sign of redundant number and speeding the computation o... View full abstract»

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  • Author index

    Publication Year: 2000, Page(s): 195
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    Freely Available from IEEE
  • A dual channel 20 bit current-input A/D converter for photo-sensor applications

    Publication Year: 2000, Page(s):57 - 60
    Cited by:  Papers (3)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (200 KB)

    A dual channel 20 bit current-input A/D converter is implemented in a 0.6 μm CMOS process with a single 5 V supply for use in direct photo-sensor digitization. Continuous charge integration is achieved through the use of a double switched capacitor integrator at each channel input. The front end provides a programmable full-scale input charge range from 50 pC to 1000 pC while also converting th... View full abstract»

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  • A strategy for implementing dynamic element matching in current-steering DACs

    Publication Year: 2000, Page(s):51 - 56
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (244 KB)

    Interesting comparisons of dynamic element matching (DEM) techniques, have been presented during the last decade. However, not many chip implementations of these DEM techniques have been presented so far. A brief review of different DEM techniques are presented in this paper together with a strategy for implementing the partial randomization DEM, PRDEM, technique in a 3.3 V supply, 14 bit CMOS cur... View full abstract»

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  • RF CMOS mixer design and optimization for wideband CDMA application

    Publication Year: 2000, Page(s):45 - 50
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (204 KB)

    This paper presents the design of a Gilbert downconversion mixer for wideband CDMA application. The mixer is designed using a 0.18 μm 1.5 V/3.3 V dual voltage digital CMOS technology. The design methodology is presented to achieve high linearity and low noise figure. A design flow is introduced targeting the automatic design and optimization for mixers View full abstract»

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  • A monolithic RF image-reject filter

    Publication Year: 2000, Page(s):41 - 44
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (152 KB)

    A CMOS inductorless image-reject filter based on active RLC circuitry is discussed and designed with the emphasis on low-noise, low-power, and gigahertz-range circuits. Two Q-enhancement techniques are utilized to circumvent the low Q characteristics inherent in the simple feedback circuit. The frequency tuning is almost independent of Q tuning, facilitating the design of the automatic tuning circ... View full abstract»

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  • The design of 433 MHz class AB CMOS power amplifier

    Publication Year: 2000, Page(s):36 - 40
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (188 KB)

    This paper reports the design and simulation results of a 433 MHz Power Amplifier (PA) which is designed in a 0.5 μm CMOS technology and can provide variable gain modes. The PA consists of a driver and an output stage, and the gain is adjustable using digital codes. In this paper, 16.5 dB and 3.5 dB gain modes are chosen. This amplifier matches a 50 ohm load and provides 20 mW of output power a... View full abstract»

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  • CMOS DSP and microprocessor cores using optoelectronic VLSI

    Publication Year: 2000, Page(s):9 - 13
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (208 KB)

    The use of inter-chip optical interconnects can lead to a dramatic increase in chip-level and system-level performance of high-performance computing and signal processing systems. In this paper, we describe our efforts to build chipsets for these applications using optoelectronic VLSI. The performance advantages of using optical interconnects are compared with the conventional approach View full abstract»

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  • A novel fully integrated fan controller for advanced computer systems

    Publication Year: 2000, Page(s):191 - 194
    Cited by:  Papers (6)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (184 KB)

    A low-cost, high-efficiency, compact architecture of a PWM (pulse-width-modulation) drive fan controller is designed for use in an embedded multicomputer system with an integrated hierarchical thermal management scheme. This pure digital design yields lower cost and higher conventional linear drive fan providing the functionality and advantages of PWM drive fan controllers. The implementation and ... View full abstract»

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  • OTA amplifiers using the principle of trapezoidal association of transistors on a sea-of-transistors digital array

    Publication Year: 2000, Page(s):31 - 35
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (164 KB)

    This paper presents Operational Transconductance Amplifiers (OTA) designed on a pre-diffused array of digital Sea-Of-Transistors (SOT) using trapezoidal association of transistors (TAT) to emulate a single equivalent full-custom transistor. The TAT transistor is a composite of minimum channel length transistors, that achieves a DC and AC performance comparable to its equivalent single transistor. ... View full abstract»

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  • Free-space optics for 3D multi-chip environment

    Publication Year: 2000, Page(s):7 - 8
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (116 KB)

    The 3D-OESP consortium is a government-industry-university collaboration dedicated to the development of the technologies required to integrate stacked silicon chips with optoelectronic devices for high-performance computing and switching applications. By utilizing the combined strengths of 3D chip packaging and optoelectronic array interconnect technologies, it is possible to bring a low-power ul... View full abstract»

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  • A 0.5-8.5 GHz fully-differential CMOS RF distributed amplifier

    Publication Year: 2000, Page(s):109 - 112
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (272 KB)

    A fully-differential four-stage distributed amplifier (DA) with 5.5 dB gain and 8.5 GHz bandwidth has been integrated in 1.3 mm×2.2 mm in a 0.6 μm digital CMOS process. The DA dissipates 216 mW from a single 3 V supply. A custom CAD tool was used to optimize the DA design including device and package parasitics View full abstract»

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  • Characteristics of linear-coded D/A converters

    Publication Year: 2000, Page(s):67 - 72
    Cited by:  Papers (3)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (212 KB)

    We evaluate the performance of flash D/A converters designed with a new approach based on linear coding of the weights. The evaluation is performed by estimating the relative performance of the new, linear-coded converter compared with thermometer coded, binary-scaled, and segmented converters. As a measure of performance we use glitch noise, which is of importance in high-speed D/A converter oper... View full abstract»

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  • Terabit/s optical I/O directly to VLSI chips

    Publication Year: 2000, Page(s):20 - 21
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (64 KB)

    The concept of a manufacturable technology that can provide parallel optical interconnects directly to a VLSI circuit now appears to be a reality. One such optoelectronic-VLSI (OE-VLSI) technology is based on the hybrid flip-chip area bonding of GaAs/AlGaAs multiple-quantum well (MQW) electro-absorption modulator devices directly onto active silicon CMOS circuits. The technology has reached the po... View full abstract»

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  • Substrate thermal model reduction for efficient transient electrothermal simulation

    Publication Year: 2000, Page(s):185 - 190
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (248 KB)

    A multiport RC network reduction technique based on congruence transformation was developed specifically for improving the efficiency of temperature calculation in electrothermal simulations. This technique helps reduce the size of the three-dimensional lumped RC network, which is commonly used to model substrate heat conduction, while still preserving the input/output characteristics at the port ... View full abstract»

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  • A dual edge transition based BIST approach for passive analog circuits

    Publication Year: 2000, Page(s):179 - 181
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (92 KB)

    A new mixed-signal Built-in Self-Test (BIST) approach that is based upon voltage transitions at the primary output of the analog block under test (CUT) is presented in this paper. This CUT output is the pulse response of the CUT for a rail-to-rail pulse stream. The technique can effectively detect both soft and hard faults and does not require an analog-to-digital converter (ADC) or/and digital-to... View full abstract»

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  • Biasing analog circuits using the nullor concept

    Publication Year: 2000, Page(s):27 - 30
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (128 KB)

    In an attempt to provide an efficient biasing scheme for analog circuits, this paper addresses the problem of designing the correct bias-circuitry using the nullor concept. First, the rules for biasing nullators and norators are introduced. Second, a technique for efficiently biasing analog circuits is proposed. Finally, the proposed biasing technique is demonstrated by implementing it in practica... View full abstract»

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  • Sensor plane processing for multiplex imaging

    Publication Year: 2000, Page(s):1 - 6
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (232 KB)

    Digital imaging systems are fundamentally different from analog ones because they differentiate the measurement space and the reconstruction space. Multiplex systems use this separation to optimize source reconstruction. We consider the requirements imposed on sensor plane processors by multiplex imaging systems. We consider system flexibility, analog/digital split, A/D dynamic range, bandwidth, a... View full abstract»

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  • System design considerations of wideband multi-standard receiver for 3rd generation mobile system applications

    Publication Year: 2000, Page(s):103 - 108
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (228 KB)

    Mobile communications systems will evolve towards a third generation at the beginning of the new millenium. Third generation is built on the backward compatibility with the second generation networks. Thus wideband multi-standard receivers, which are able to operate according to multiple mobile communication standards, will be required by the third generation system users. This paper presents a nu... View full abstract»

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  • Preliminary circuits for Smart Dust

    Publication Year: 2000, Page(s):87 - 92
    Cited by:  Papers (21)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (248 KB)

    In this paper we present a miniature system that is being designed for the Smart Dust project to test the communication link and simulate basic functionality. The system includes an optical receiver to process the incoming laser signal, digital circuits to generate a pseudorandom number sequence, a corner cube reflector (CCR) to passively transmit data to the base station, and a charge pump to gen... View full abstract»

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  • A digital method for the correction of I/Q phase errors in complex sub-sampling mixers

    Publication Year: 2000, Page(s):171 - 174
    Cited by:  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (148 KB)

    Complex sub-sampling mixers are used in various kinds of image rejection receiver. The image rejection performance of these receivers is mainly limited by I/Q phase error. A digital calibration technique is proposed in this paper to correct this error. The phase error is measured by a statistical method with a local test signal, and is corrected in the baseband digital domain. With this method, th... View full abstract»

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  • D/A conversion with linear-coded weights

    Publication Year: 2000, Page(s):61 - 66
    Cited by:  Papers (5)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (204 KB)

    In design of high-speed, high resolution D/A converters, glitches in the output are of major concern. To tradeoff between hardware complexity and glitch performance the current practice is to use a hybrid converter where the most significant bits are thermometer coded and the least significant bits are binary-scaled. As an alternative to this scheme, we propose a new method for D/A conversion base... View full abstract»

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  • Modeling and simulation of mixed technology micro systems

    Publication Year: 2000, Page(s):14 - 19
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (268 KB)

    Chatoyant is a system level opto-electro-mechanical CAD tool developed to meet the needs of mixed technology systems designers. In this paper, we present the modeling techniques we have implemented in Chatoyant for system level design of mixed technology micro-systems composed of optical, electrical and mechanical components View full abstract»

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  • Body-driving as a low-voltage analog design technique for CMOS technology

    Publication Year: 2000, Page(s):113 - 118
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (188 KB)

    This paper presents an overview of circuit topologies for achieving low-voltage analog designs using body-driving techniques. A new and novel low-voltage Class AB output stage is presented along with topologies for amplifiers and a four quadrant multiplier. A discussion of the application of body-driving in a silicon-on-insulator (SOI) technology is also included View full abstract»

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