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2013 Formal Methods in Computer-Aided Design

20-23 Oct. 2013

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Displaying Results 1 - 25 of 43
  • Conference organization

    Publication Year: 2013, Page(s):v - vi
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  • Preface

    Publication Year: 2013, Page(s): iv
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  • Table of contents

    Publication Year: 2013, Page(s):i - iii
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  • Syntax-guided synthesis

    Publication Year: 2013, Page(s):1 - 8
    Cited by:  Papers (41)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (298 KB) | HTML iconHTML

    The classical formulation of the program-synthesis problem is to find a program that meets a correctness specification given as a logical formula. Recent work on program synthesis and program optimization illustrates many potential benefits of allowing the user to supplement the logical specification with a syntactic template that constrains the space of allowed implementations. Our goal is to ide... View full abstract»

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  • Tutorial: Practical verification of network programs

    Publication Year: 2013, Page(s):9 - 10
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (43 KB) | HTML iconHTML

    In this tutorial, we will show participants how to program software defined networks (SDN) in a modular way, using Frenetic's abstractions. We will build several realistic network applications from the ground up, and also learn to use more sophisticated modules, such as NAT and MAC-learning, which are part of the Frenetic standard library. We will also look under the hood to see how the Frenetic c... View full abstract»

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  • Firmware validation: challenges and opportunities

    Publication Year: 2013, Page(s): 11
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (22 KB)

    Firmware validation is driven by imperatives and challenges distinct from those of application level software. In this tutorial we will survey the characteristics of firmware projects, focusing on those that make them particularly challenging and important to validate. Well look at the tasks accomplished using firmware, the environments in which it executes, and how firmware is shaped by the const... View full abstract»

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  • Using process modeling and analysis techniques to reduce errors in healthcare

    Publication Year: 2013, Page(s): 14
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (23 KB) | HTML iconHTML

    Summary form only given. As has been widely reported in the news lately, healthcare errors are a major cause of death and suffering. In the University of Massachusetts Medical Safety Project, we are exploring the use of process modeling and analysis technologies to help reduce medical errors and improve efficiency. Specifically, we are modeling healthcare processes using a process definition langu... View full abstract»

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  • Static verification based signoff - A key enabler for managing verification complexity in the modern soc

    Publication Year: 2013, Page(s): 15
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (30 KB)

    Summary form only given. Application-based verification, i.e., partitioning the verification process by verification concerns, has become an important approach for managing verification complexity in the billion-transistor SoC. This new verification paradigm has truly come into focus with the proliferation of layers of complexity in an SoC beyond the baseline complexity of its constituent componen... View full abstract»

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  • The FMCAD graduate student forum

    Publication Year: 2013, Page(s):16 - 17
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (39 KB) | HTML iconHTML

    FMCAD 2013 featured an event new to the FMCAD conference series, the Graduate Student Forum, held on Monday October 21, following the joint MEMOCODE/FMCAD Tutorial Day. The intention of the Forum was to specifically attract students to the conference, by providing them with a platform for introducing their research to the wider Formal Methods community, and obtain feedback on it. Submissions were ... View full abstract»

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  • Distributed synthesis for LTL fragments

    Publication Year: 2013, Page(s):18 - 25
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (336 KB) | HTML iconHTML

    We consider the distributed synthesis problem for temporal logic specifications. Traditionally, the problem has been studied for LTL, and the previous results show that the problem is decidable iff there is no information fork in the architecture. We consider the problem for fragments of LTL and our main results are as follows: (1) We show that the problem is undecidable for architectures with inf... View full abstract»

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  • Counter-strategy guided refinement of GR(1) temporal logic specifications

    Publication Year: 2013, Page(s):26 - 33
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (371 KB) | HTML iconHTML

    The reactive synthesis problem is to find a finite-state controller that satisfies a given temporal-logic specification regardless of how its environment behaves. Developing a formal specification is a challenging and tedious task and initial specifications are often unrealizable. In many cases, the source of unrealizability is the lack of adequate assumptions on the environment of the system. In ... View full abstract»

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  • Efficient handling of obligation constraints in synthesis from omega-regular specifications

    Publication Year: 2013, Page(s):34 - 41
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (339 KB) | HTML iconHTML

    A finite state reactive system (for instance a hardware controller) can be specified through a set of ω-regular properties, most of which are often safety properties. In the game-based approach to synthesis, the specification is converted to a game between the system and the environment. A deterministic implementation is obtained from the game graph and a system's winning strategy. However,... View full abstract»

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  • On the feasibility of automation for bandwidth allocation problems in data centers

    Publication Year: 2013, Page(s):42 - 45
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (287 KB) | HTML iconHTML

    Mapping virtual networks to physical networks under bandwidth constraints is a key computational problem for the management of data centers. Recently proposed heuristic strategies for this problem work efficiently, but are not guaranteed to always find an allocation even when one exists. Given that the bandwidth allocation problem is NP-complete, and the state-of-the-art SAT solvers have recently ... View full abstract»

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  • Computing prime implicants

    Publication Year: 2013, Page(s):46 - 52
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (245 KB) | HTML iconHTML

    Model checking and counter-example guided abstraction refinement are examples of applications of SAT solving requiring the production of models for satisfiable formulas. Better than giving a truth value to every variable, one can provide an implicant, i.e. a partial assignment of the variables such that every full extension is a model for the formula. An implicant is prime if every assignment is n... View full abstract»

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  • A circuit approach to LTL model checking

    Publication Year: 2013, Page(s):53 - 60
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (218 KB) | HTML iconHTML

    This paper presents a method for translating formulas written in assertion languages such as LTL into a monitor circuit suitable for model checking. Unlike the conventional approach, no automata is generated for the property, but instead the monitor is built directly from the property formula through a recursive traversal. This method was first introduced by Pnueli et. al. under the name of Tempor... View full abstract»

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  • Invariants for finite instances and beyond

    Publication Year: 2013, Page(s):61 - 68
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (310 KB) | HTML iconHTML

    Verification of safety properties of concurrent programs with an arbitrary numbers of processes is an old challenge. In particular, complex parameterized protocols like FLASH are still out of the scope of state-of-the-art model checkers. In this paper, we describe a new algorithm, called BRAB, that is able to automatically infer invariants strong enough to prove a protocol like FLASH. BRAB compute... View full abstract»

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  • Exploring interpolants

    Publication Year: 2013, Page(s):69 - 76
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (807 KB) | HTML iconHTML

    Craig Interpolation is a standard method to construct and refine abstractions in model checking. To obtain abstractions that are suitable for the verification of software programs or hardware designs, model checkers rely on theorem provers to find the right interpolants, or interpolants containing the right predicates, in a generally infinite lattice of interpolants for any given interpolation pro... View full abstract»

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  • Synthesizing multiple boolean functions using interpolation on a single proof

    Publication Year: 2013, Page(s):77 - 84
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (550 KB) | HTML iconHTML

    It is often difficult to correctly implement a Boolean controller for a complex system, especially when concurrency is involved. Yet, it may be easy to formally specify a controller. For instance, for a pipelined processor it suffices to state that the visible behavior of the pipelined system should be identical to a non-pipelined reference system (Burch-Dill paradigm). We present a novel procedur... View full abstract»

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  • Quantifier elimination via clause redundancy

    Publication Year: 2013, Page(s):85 - 92
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (917 KB) | HTML iconHTML

    We consider the problem of existential quantifier elimination for Boolean formulas in conjunctive normal form. Recently we presented a new method for solving this problem based on the machinery of Dependency sequents (D-sequents). The essence of this method is to add to the quantified formula implied clauses until all the clauses with quantified variables become redundant. A D-sequent is a record ... View full abstract»

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  • Interpolation for synthesis on unbounded domains

    Publication Year: 2013, Page(s):93 - 96
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    Synthesis procedures compile relational specifications into functions. In addition to bounded domains, synthesis procedures are applicable to domains such as mathematical integers, where the domain and range of relations and synthesized code is unbounded. Previous work presented synthesis procedures that generate self-contained code and do not require components as inputs. The advantage of this ap... View full abstract»

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  • Relational STE and theorem proving for formal verification of industrial circuit designs

    Publication Year: 2013, Page(s):97 - 104
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (302 KB) | HTML iconHTML

    Model checking by symbolic trajectory evaluation, orchestrated in a flexible functional-programming framework, is a well-established technology for correctness verification of industrial-scale circuit designs. Most verifications in this domain require decomposition into subproblems that symbolic trajectory evaluation can handle, and deductive theorem proving has long been proposed as a complement ... View full abstract»

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  • Satisfiability modulo ODEs

    Publication Year: 2013, Page(s):105 - 112
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (615 KB) | HTML iconHTML

    We study SMT problems over the reals containing ordinary differential equations,. They are important for formal verification of realistic hybrid systems and embedded software. We develop δ-complete algorithms for SMT formulas that are purely existentially quantified, as well as ∃∀-formulas whose universal quantification is restricted to the time variables. We demonstrate scala... View full abstract»

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  • Verifying global convergence for a digital phase-locked loop

    Publication Year: 2013, Page(s):113 - 120
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (788 KB) | HTML iconHTML

    We present a verification of a digital phase-locked loop (PLL) using the SpaceEx hybrid-systems tool. In particular, we establish global convergence - from any initial state the PLL eventually reaches a state of phase and frequency lock. Having shown that the PLL converges to a small region, traditional methods of circuit analysis based on linear-systems theory can be used to characterize the resp... View full abstract»

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  • Formal co-validation of low-level hardware/software interfaces

    Publication Year: 2013, Page(s):121 - 128
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (212 KB) | HTML iconHTML

    Today's microelectronics industry is increasingly confronted with the challenge of developing and validating software that closely interacts with hardware. These interactions make it difficult to design and validate the hardware and software separately; instead, a verifiable co-design is required that takes them into account. This paper demonstrates a new approach to co-validation of hardware/soft... View full abstract»

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  • An SMT based method for optimizing arithmetic computations in embedded software code

    Publication Year: 2013, Page(s):129 - 136
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (261 KB) | HTML iconHTML

    We present a new method for optimizing the C/C++ code of embedded control software with the objective of minimizing implementation errors in the linear fixed-point arithmetic computations caused by overflow, underflow, and truncation. Our method relies on the use of an SMT solver to search for alternative implementations that are mathematically equivalent but require a smaller bit-width, or implem... View full abstract»

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