By Topic

# IEEE Transactions on Semiconductor Manufacturing

## Filter Results

Displaying Results 1 - 25 of 31

Publication Year: 2013, Page(s):C1 - C4
| PDF (63 KB)
• ### IEEE Transactions on Semiconductor Manufacturing publication information

Publication Year: 2013, Page(s): C2
| PDF (136 KB)
• ### Guest Editorial Special Section on the 2012 International Conference on Microelectronic Test Structures

Publication Year: 2013, Page(s): 261
| PDF (45 KB) | HTML
• ### Fast and Accurate Characterization of MOS and Interconnect Capacitance Using Direct Charge Measurement (DCM)

Publication Year: 2013, Page(s):262 - 272
Cited by:  Papers (2)
| | PDF (1232 KB) | HTML

A fast and accurate capacitance measurement technique, direct charge measurement (DCM), is introduced to improve productivity of semiconductor parametric testing. The approach is simpler and much faster compared with conventional method using charge-based capacitance measurement (CBCM) or LCR meter. On-chip active device is not an essential necessity for DCM test structure and it is easy to implem... View full abstract»

• ### A Self-Amplifying Four-Transistor MOSFET Mismatch Test Structure

Publication Year: 2013, Page(s):273 - 280
| | PDF (561 KB) | HTML

Mismatch can be difficult to monitor in a production test environment as it can be small and, therefore, it requires precise, time-consuming, costly measurements. This paper describes a four-transistor test structure for measurement and characterization of MOS transistor mismatch that self-amplifies the effect of mismatch, thereby generating a large and easily measurable dc output voltage. Test an... View full abstract»

• ### Electrical Test Structure for the Measurement of Hermeticity in Electronic and MEMS Packages With Small Cavity Volumes

Publication Year: 2013, Page(s):281 - 287
Cited by:  Papers (1)
| | PDF (605 KB) | HTML

The design, fabrication, and characterization of a piezoresistive membrane deflection test structure for the electrical evaluation of hermeticity in low cavity volume packages is discussed. This test structure uses the zero-level silicon cap as a deflecting membrane to electrically monitor changes in package cavity pressure over time. The hermeticity of the package can then be determined in real-t... View full abstract»

• ### A Test Circuit for Extremely Low Gate Leakage Current Measurement of 10 aA for 80 000 MOSFETs in 80 s

Publication Year: 2013, Page(s):288 - 295
Cited by:  Papers (1)
| | PDF (952 KB) | HTML

We discuss the measurement accuracy of the test circuit, which can evaluate statistical characteristics of gate leakage current of small area metal-oxide-semiconductor field-effect transistors (MOSFETs) in a very short time. The accuracy and precision of the gate leakage current obtained by the test circuit are verified for a wide range. As a result it is confirmed that very accurate gate current ... View full abstract»

• ### Inhomogeneous Ring Oscillator for Within-Die Variability and RTN Characterization

Publication Year: 2013, Page(s):296 - 305
Cited by:  Papers (10)
| | PDF (968 KB) | HTML

This paper discusses the concept of an inhomogeneous structure for a ring oscillator (RO) to enhance the delay effect of a particular inverter stage. The frequency of the proposed inhomogeneous structure becomes a strong function of the inhomogeneous stage; thus, the variability becomes directly visible. With careful design of the inhomogeneous stage, the RO frequency can be made sensitive to a sm... View full abstract»

• ### A Ring Oscillator With Calibration Circuit for On-Chip Measurement of Static IR-drop

Publication Year: 2013, Page(s):306 - 313
| | PDF (16050 KB) | HTML

Resource estimation of a power distribution network (PDN) is a critical issue for the resource management of LSIs. To evaluate the impact of PDN parameters to the quality of power delivery, an accurate PDN simulation model is necessary. To reflect the real silicon's behavior to PDN simulation models, we propose a test structure that consists of an array of Ring Oscillators (ROs) with calibration c... View full abstract»

• ### Guest Editorial Special Section on the 2012 International Symposium on Semiconductor Manufacturing

Publication Year: 2013, Page(s): 314
| PDF (71 KB) | HTML
• ### Electrochemical Induced Pitting Defects at Gate Oxide Patterning

Publication Year: 2013, Page(s):315 - 318
Cited by:  Papers (3)
| | PDF (314 KB) | HTML

In this paper we discuss the detection, investigation and remediation of a silicon pitting defect in gate oxide patterning processes. The pitting defect is detected by optical inspection after an oxide wet etch operation. The cause of the physical defect is discovered as the result of Non-Visual Defect (NVD) inspection at process steps prior to the wet etch. A particular type of NVD, electric char... View full abstract»

• ### Multiparametric Virtual Metrology Model Building by Job-Shop Data Fusion Using a Markov Chain Monte Carlo Method

Publication Year: 2013, Page(s):319 - 327
Cited by:  Papers (3)
| | PDF (1223 KB) | HTML

This paper proposes a generic methodology for building a multiparametric virtual metrology (VM) model that predicts the chemical-mechanical polishing (CMP) rate in the mass production of many different products in small quantities using multiple tools in a job shop. The VM model must handle inter-individual differences in both products and tools, with multiple parameters. To identify the multipara... View full abstract»

• ### Ultrafine Particle Removal Using Gas Cluster Ion Beam Technology

Publication Year: 2013, Page(s):328 - 334
Cited by:  Papers (1)
| | PDF (742 KB) | HTML

In this paper, the ultrafine particle removal using CO2 gas cluster ion beam (GCIB) technology is investigated. The CO2 GCIB is irradiated the sample at an angle of 0 ° with respect to the surface normal. The higher particle removal efficiency can be achieved at the higher kinetic energy of the gas cluster, and the inside space of line and space pattern part... View full abstract»

• ### STI Crater Defect Reduction for Semiconductor Device Yield Improvement

Publication Year: 2013, Page(s):335 - 338
| | PDF (577 KB) | HTML

One type of yield killing defect called STI Crater is found on advanced CMOS devices during shallow trench isolation (STI) formation. The mechanism of the defect formation is discussed, and various cleaning and thermal treatment applications have been evaluated to eliminate the defects. We observe above 6% yield improvement with optimized cleaning process scheme. View full abstract»

• ### Prediction and Control of Transistor Threshold Voltage by Virtual Metrology (Virtual PCM) Using Equipment Data

Publication Year: 2013, Page(s):339 - 343
Cited by:  Papers (4)
| | PDF (724 KB) | HTML

This paper is a description of how to predict and control the transistor threshold voltage ( Vth) for an advanced system on chip (SoC) by virtual metrology (VM), which we call virtual process control module (PCM), by using equipment data. Impact analysis for Vth variation by using a Virtual PCM model indicates that the impact of source and drain (S/D) resistance and extension resistance are compar... View full abstract»

• ### The Effect of Cu CMP Pad Clean on Defectivity and Reliability

Publication Year: 2013, Page(s):344 - 349
Cited by:  Papers (1)
| | PDF (1021 KB) | HTML

A type of CMP scratches with an embedded particle and a comet-like tail has been studied. The nature of the embedded particle was found to be silica which suggested that the source came from barrier metal polishing step. The inclusion of a pad-cleaning step during barrier polishing was found to reduce the defect significantly. This pad cleaning step reduce hydrophobicity of the polishing pad. Thro... View full abstract»

• ### Detection of Micro-Arc Discharge Using ESC Wafer Stage With Built-In AE Sensor

Publication Year: 2013, Page(s):350 - 354
Cited by:  Papers (6)
| | PDF (4284 KB) | HTML

An electrostatic chuck (ESC) wafer stage with a built-in acoustic emission (AE) sensor is developed to detect micro-arc discharge occurring around a wafer. The built-in AE sensor detects acoustic waves caused by anomalous discharge with high sensitivity. The results demonstrate the effectiveness of this novel ESC wafer stage for detecting micro-arc discharge occurring around a wafer and will contr... View full abstract»

• ### Fluoride Contamination Induced ${rm NiSi}_{2}$ Film Formation in a Gate NiSi Line

Publication Year: 2013, Page(s):355 - 360
Cited by:  Papers (3)
| | PDF (597 KB) | HTML

Undulate high-resistance nickel silicide film is found in a gate electrode of a logic device. The undulate film is caused by fluoride contamination derived from a chemical dry-cleaning process for silicon (Si) substrate prior to nickel (Ni) sputtering. The undulate film was composed of a thicker nickel monosilicide (NiSi) film nearby a Si hillock and a thinner nickel disilicide (NiSi2) ... View full abstract»

• ### Manufacturing Challenges of GaN-on-Si HEMTs in a 200 mm CMOS Fab

Publication Year: 2013, Page(s):361 - 367
Cited by:  Papers (15)
| | PDF (13024 KB) | HTML

In this paper, we report on the challenges related to growth and processing of 200 mm GaN-on-Si wafers in a CMOS fab. We describe the Au free process we developed as well as how we assure wafer quality prior processing. For the first time, we analyze possible Ga contamination issues related to the processing of GaN wafers and we present the cleaning procedures we developed to avoid it. View full abstract»

• ### Real-Time Transfer Control Method for Linear Tools

Publication Year: 2013, Page(s):368 - 377
| | PDF (1437 KB) | HTML

This paper describes a real-time transfer control method to produce a high throughput for linear tools of semiconductor manufacturing equipment. We developed a transfer control method for various process times with two steps during operation of the equipment. The first step uses a local search to find a transfer sequence producing a high throughput in advance for various process times, and the sec... View full abstract»

• ### Machine Vision-Based Defect Detection in IC Images Using the Partial Information Correlation Coefficient

Publication Year: 2013, Page(s):378 - 384
Cited by:  Papers (5)
| | PDF (789 KB) | HTML

The normalized cross correlation coefficient is a prevalent pattern-matching algorithm in machine vision for industrial inspections. Despite its common use, there are problems with practical applications. For instance, false alarms occur since it is highly sensitive to environmental changes or inspection equipment, not to mention it requires complex calculations. This paper proposes the partial in... View full abstract»

• ### Compliance Metrics for a Reliable Assessment of Parametric Yield

Publication Year: 2013, Page(s):385 - 392
Cited by:  Papers (3)
| | PDF (838 KB) | HTML

Few would disagree that high parametric yields are indispensable for insuring product yield entitlement. It is, however, not as well recognized by non-practitioners that Cp, Cpk, Cpm, Cpmk, and Z-Score, arguably the most widely used metrics for assessment of process capability, are not very reliable indicators of the health of a manufacturing process. There have been numerous extensions to these c... View full abstract»

• ### Forecast of CMOS Imagers Yield Learning by the Gompertz Model

Publication Year: 2013, Page(s):393 - 399
Cited by:  Papers (2)
| | PDF (402 KB) | HTML

This paper presents a novel approach to modeling yield using the Gompertz function, which is widely used in biology to model the growth processes of plants, tumors, etc. We demonstrate that the yield-learning process in a semiconductor fab follows the same behavior of the growth of biological systems. We start with a simple time series model, which describes the learning process in terms of defect... View full abstract»

• ### Megasonic Cleaning of Blanket and Patterned Samples in Carbonated Ammonia Solutions for Enhanced Particle Removal and Reduced Feature Damage

Publication Year: 2013, Page(s):400 - 405
Cited by:  Papers (4)
| | PDF (479 KB) | HTML

An investigation of particle removal efficiency and feature damage has been conducted in NH4OH/NH4HCO3 cleaning solutions irradiated with megasonic energy. By adjusting the pH of the solution in the range of 8.2 - 8.5, high particle removal efficiency (PRE) was achieved while feature damage was reduced significantly. The sonoluminescence data collected from NH... View full abstract»

• ### Semiconductor Materials Optimization for a TFET Device With Central Nothing Region on Insulator

Publication Year: 2013, Page(s):406 - 413
Cited by:  Papers (8)
| | PDF (1102 KB) | HTML

This paper presents the work regimes of an atypical SOI device. The proposed device belongs to the Tunneling FET class, but the main body is a vacuum cavity. Each layer has a maximum of 10 nm. Firstly, the paper studies the static characteristics of the proposed device by simulations for different semiconductor materials: Si, SiC and Ge, with different doping concentrations, in different bias cond... View full abstract»

## Aims & Scope

The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Anthony Muscat
Department of Chemical and Environmental Engineering
Harshbarger Bldg., Room 134
1133 E. James Rogers Way
University of Arizona
Tucson, AZ  85721

Publications Office Contact:
Marlene James
445 Hoes Lane
Piscataway, NJ  08854  08854
USA
m.james@ieee.org