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Semiconductor Manufacturing Conference Proceedings, 1999 IEEE International Symposium on

Date 11-13 Oct. 1999

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  • 1999 IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings (Cat No.99CH36314)

    Publication Year: 1999
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    Freely Available from IEEE
  • Characterization algorithm of failure distribution for lsi yield improvement

    Publication Year: 1999 , Page(s): 119 - 122
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (244 KB)  

    This paper describes about an algorithm, which can efficiently characterize a process-induced random failure distribution and a design-induced systematic failure distribution from unknown-induced failure distributions of a memory LSI to predict a reason for yield degradation in it. Our developed algorithm analyzes a function "T(f) isn't greater than 1 or not" related kind and the content of the mathematics measure "f" comes from a histogram of all pair of failure distances to distinguish between a random distribution and a systematic distribution. The cause specification using this algorithm is based on the fact that process induced failure caused by particles or contamination results in a random distribution and design-induced failures have some kind of distribution shape or period depending on circuit layout. Memory LSI failure analysis with our algorithm is able to distinguish between an almost random (process-induced) distribution in one direction, and a systematic (design induced) distribution in the other. This algorithm is effective for a device containing an array of cells. View full abstract»

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  • Engineering to the least process monitoring

    Publication Year: 1999 , Page(s): 237 - 240
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    To achieve both goals of drastically reducing process monitoring and maintaining high product quality, CTM/D2 (California Technology and Manufacturing Group) at Intel has taken a new approach in monitor reduction in the 0.25 /spl mu/m Flash technology development and manufacturing. D2's new methodology stems from a fundamental mindset shift to a new paradigm: Engineering to the Least Process Monitoring. Intensive process monitoring only reflects deficiencies of quality in the process design. Without eliminating root causes, any monitor reduction will be limited and transitory. By the end of 1998, D2's new initiatives resulted in a 50% reduction in monitor cost per wafer, setting a new benchmark of cost effectiveness for flash technology manufacturing at Intel. Despite the aggressive monitor restrictions, D2 was able to meet the Flash technology certification goal on schedule. In addition, both line yield and die yield of the 0.25 /spl mu/m Flash technology reached record highs by the end of 1998. These records are unprecedented in Flash manufacturing at Intel. View full abstract»

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  • Improving throughput in 0.25 /spl mu/m technology development and manufacturing - CVD TiN liner barrier applications

    Publication Year: 1999 , Page(s): 313 - 316
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    During 0.25 /spl mu/m process development and transfer, functional yields were not obtained until the CVD TiN liner barrier process applications were used at five of the six barrier-levels. The process transfer and capital equipment plan did not comprehend this required technology improvement, resulting in these CVD TiN tools becoming a constraint. Aggressive capital equipment installations and manufacturing technology initiatives were implemented to provide the needed capacity to support the ramp plan. Integrated CVD TiN focus teams were sanctioned and chartered to improve the operation productivity. These efforts and results eliminated this tool set from becoming a technology or capacity constraint. View full abstract»

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  • Author index

    Publication Year: 1999 , Page(s): 467 - 469
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    Freely Available from IEEE
  • Automation of engineering lot split-less for research and development fab

    Publication Year: 1999 , Page(s): 93 - 96
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    Recently the market demands quick turn around time (TAT) to highly advanced R&D fab. The analysis on the lot TAT in our fab showed that the time for engineering lot split at ion implantation process reached to about 7.2% of the total lot TAT. The automation to enable split-less engineering lot at ion implantation could reduce the operation time in R&D fab. Engineering lot split-less systems could reduce the operation time with lot split operation by 3/4 for ion implantation. This system consists of manufacturing execution system (MES), master maintenance system (MMS), and engineering management system (EMS). This realized the 24 hours automated transfer of Engineering lot without any lot split operations View full abstract»

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  • Using an inverted FMEA to manage change and reduce risk in a FAB

    Publication Year: 1999 , Page(s): 15 - 18
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    This paper presents a Change Management System which incorporates the elements found in most semiconductor factories. They include the following: A Change Review Board; Checklist of characterization techniques; Specifications to guide engineers; Documentation and Communication of the Changes. The integral element of this system is the formal use of an inverted FMEA to guide the change agent to the appropriate evaluation methodology and qualification plan. Use of this method is found to be effective at preventing scrap and minimizing risk to the product performance View full abstract»

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  • Metal rework yield loss-mechanisms and solutions

    Publication Year: 1999 , Page(s): 143 - 146
    Cited by:  Patents (1)
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    Metal mask rework has been demonstrated to have a dramatic effect on product yield. We have undertaken an exhaustive study to determine the mechanisms behind the yield loss and to develop a benign metal mask rework solution. We have identified two separate mechanisms for potential yield loss associated with metal mask rework; copper precipitation from high temperature plasma strip and chemical penetration of thin TiN ARC layers View full abstract»

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  • Capacity planning for a twin fab

    Publication Year: 1999 , Page(s): 317 - 320
    Cited by:  Patents (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (264 KB)  

    A capacity planning system (CPS) is developed for a twin fab based on the assumption of infinite capacity. CPS consists of three major modules: WIP-pulling module, workload allocation and accumulation module, and wafer release module. To meet the master production schedule (MPS), the WIP-pulling module pulls WIP from the end of the process routine. The workload allocation and accumulation module then calculates the expected equipment loading in different time periods. If WIP cannot satisfy the MPS requirement, the wafer release module is used to determine the planned wafer start time and the start production fab. On the basis of experimental design, simulation results show that CPS can smooth equipment loading in different time periods and balance the workload between fabs View full abstract»

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  • IC performance prediction for test cost reduction

    Publication Year: 1999 , Page(s): 111 - 114
    Cited by:  Papers (5)  |  Patents (1)
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    This paper describes a methodology for building models predicting manufactured integrated circuit performances as a function of inline and wafer electrical test measurements. We show how these predictions can be used to predict the performance of an industrial microprocessor, and reduce the average number of speed bins that must be tested by 45% View full abstract»

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  • Ozone treatment of persistent organic chemical wastewater

    Publication Year: 1999 , Page(s): 275 - 278
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    We developed an ozone treatment process for wastewater containing persistent organic chemicals that are not easily treated by conventional processes. These include alkylbenzenesulfonic acids (ABS), phenol, and dimethylsulfoxide (DMSO). We confirmed that there are different optimal pH conditions with respect to the efficiency of ozone treatment for different types of organic compounds. The potential of the process was convincingly demonstrated; with proper pH adjustment it is extremely effective. Organic compounds, for which biological treatment is not suitable, can be converted to biologically degradable compounds without generating hazardous byproducts. Ozone treatment can be extremely cost-effective, particularly, for high-level wastewater View full abstract»

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  • Function-based cost modeling for wafer manufacturing and its application to strategic management

    Publication Year: 1999 , Page(s): 31 - 34
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (228 KB)  

    In this paper a function-based cost modeling methodology is proposed, which consists of three major steps: function analysis, cost modeling and strategic management. A system analysis technique IDEFO is used as the basis of function analysis. Function-based cost models are then constructed, and with which pie-chart analysis and sensitivity analysis provide managers important information for critical decision-making. A generic photolithography process is used as a test bed. Results show that IDEFO is an effective tool for modeling IC manufacturing processes and the manufacturing cost based on the proposed methodology is more easily and accurately calculated than the current practices View full abstract»

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  • Analysis of abnormal Pch Vt distribution in wafer caused by implanter

    Publication Year: 1999 , Page(s): 341 - 344
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    In this paper, we report an analysis in which the abnormal p-channel threshold voltage (Pch Vt) distribution in a wafer was found to be due to the malfunction of an implanter at the Pch Vt adjustment step. The analysis was performed using a pulse C-V method and experiments with production wafers. As the conventional thermal wave and Rs measurements were not sensitive enough for this problem, the methodology of the monitoring method is discussed through our experiences View full abstract»

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  • Production technology of high performance slurry without CMP dispersing agent

    Publication Year: 1999 , Page(s): 437 - 440
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    A new media-less wet jet mill method has been developed to produce high performance, long stability slurries for CMP (chemical-mechanical polishing). This method features the injection of the coagulated slurries into a nozzle through a small orifice under high pressure (25-200 MPa), which causes collision, inducing the dispersion of the coagulated slurries. With this machine, an experiment of fine dispersing process was carried out using the preliminary dispersed slurries (sample) of the primary particle size of 20 nm. The result proved that this new dispersing machine was capable of producing slurry of good dispersibility independently from any kind of dispersing agent. The slurry that had been adjusted to the median particle size of 70 nm and dispersed, was subjected to the stability test for 80 days. Despite that period, the result did not show any change in the particle size, which, in other words, confirms that any second coagulation did not occur in the slurry. From the foregoing, a good perspective to apply such slurry as an ultrahigh purity slurry for CMP was attained which makes work surfaces of high quality View full abstract»

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  • Clustertool optimization through scheduling rules

    Publication Year: 1999 , Page(s): 89 - 92
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (224 KB)  

    Clustertools play an increasing important role in modern semiconductor fabs. These tools are complex and have a large impact on fab performance. In this paper, a structured approach is presented to give insight in the dynamic behavior of clustertools and to optimize their performance. The approach is applied to the metal area of a waferfab. Scheduling rules are defined for clustertools of this area. A dynamic simulation model is used to evaluate the rules. Experiments show that an average improvement of 8 percent on cycle time and throughput is achieved by usage of scheduling rules View full abstract»

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  • Run-to-run control of CMP process considering aging effects of pad and disc

    Publication Year: 1999 , Page(s): 229 - 232
    Cited by:  Papers (1)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (176 KB)  

    CMP processes are known to be erratic and unstable. A simple control strategy is to predict the run-to-run process removal rate and then adjust the processing time based on the prediction. EWMA and PCC techniques are two most often used prediction techniques. In this work, we revise the PCC design to take into account the ages of the abrasive pad and conditioning disc. It is shown that the proposed age-based technique can significantly improve the prediction capability and, thus, the control efficiency over conventional techniques View full abstract»

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  • Killer defect detection using the IR-OBIRCH (infrared optical-beam-induced resistance-change) method

    Publication Year: 1999 , Page(s): 103 - 106
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    The IR-OBIRCH method has been applied to analyze real failures of DRAMs, ASICs, power MOSFETs, and microcomputers, which failed during mass production, development, user test, and ESD simulation. In the analysis of a microcomputer, in order to reproduce the failure state during IR-OBIRCH imaging, we applied test vectors from an ATE clocked to the IR-OBIRCH system. The results showed that the IR-OBIRCH is suitable not only for improving reliability but also for increasing yield View full abstract»

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  • Operator error prevention system of semiconductor foundry manufacturing

    Publication Year: 1999 , Page(s): 285 - 287
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    The purpose of this paper is to introduce the operator error prevention system. This system divides the prevention process of operator-related errors into several stages: (1) task analyses and human error identification; (2) classification of human errors; (3) deployment of optimal prevention action; (4) control of error preventive solutions, (5) monitoring and evaluation on potential human error risk. A brief example is provided to illustrate how to implement this system. Since this system was implemented from March 1998, the operator error events were reduced from 163 times in 1997 to 19 times in 1998. The loss from wafers scrapped was reduced from $3,000,000 dollars in 1997 to $360,000 dollars in 1998. The results show the effectiveness of the operator error prevention system View full abstract»

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  • Weighted configuration matrix approach to cluster tool metrics

    Publication Year: 1999 , Page(s): 179 - 182
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    A weighted configuration matrix method is introduced. With this method equipment users can easily configure a cluster tool and apply the existing industry metrics, such as E10 and OEE, to monitor the cluster tool performance. The detailed approach and advantages are discussed in this paper View full abstract»

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  • Staying ahead in manufacturing and technology-the development of an automation cost of ownership model and examples

    Publication Year: 1999 , Page(s): 35 - 38
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    Staying ahead in manufacturing and technology is a challenge for us to do more with less in all aspects of our business. This includes strategies to drive down costs by eliminating waste and enhancing productivity, while driving yields up and enhancing our pace to meet the rapid pace of market pressures. Some of the strategies include managing risk, closing capability gaps, and cost reduction, with this message as motivation, we have undertaken the effort to understand how automation is addressing several of these areas, with an eye toward the bottom line implications of these efforts reduced cost and risk at the High Volume Manufacturing (HVM) stage of a manufacturing process. The fundamental core to this work is a better understanding of cost, i.e., automation dollar cost contribution per wafer from development through HVM, and the benefits derived View full abstract»

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  • Optimization of conditions of Ta2O5/rugged Si capacitor process applied to high-density DRAMs using sub-0.2 μm process

    Publication Year: 1999 , Page(s): 441 - 444
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    We optimized rugged Si, phosphorus doping process, Ta2O 5 deposition and crystallization of amorphous Ta2O 5. Our investigation confirmed that Ta2O5 /rugged Si capacitor has good pause refresh characteristic and superior TDDB lifetime enabling volume production of high density DRAMs View full abstract»

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  • Synchronizing productivity enhancement and line control with a new method of target setting for logic plants

    Publication Year: 1999 , Page(s): 349 - 351
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    This paper describes a successfully implemented method to integrate line control into productivity enhancement efforts by synchronized throughput targets, line flow oriented analysis tools and an effective communication process between all parties involved. This system was introduced to ensure a continuous line flow at the multiple material flows of a logic fab as well as to improve the daily throughput target. Now line and productivity managers have effective measures to analyze the daily performance and to address and synchronize corrective actions instantly. To control their actions they can rely on real-time monitoring tools which prove the success of the new system View full abstract»

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  • The development of batch type low pressure spin dryer for water mark-less wafers

    Publication Year: 1999 , Page(s): 449 - 452
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    We developed a novel spin dryer, which is equipped with high speed rotation capability and a low pressure N2 purging system, to realize a water mark free surface. Water marks which remained on the Si wafer surface were made by chemical reaction of Si, O2, and H 2O during spin drying. In this paper, two experimental approaches: (1) to remove O2 from the reaction elements; and (2) to minimize reaction time, were demonstrated. The low pressure, high speed spin dryer with shower rinsing suppressed water marks significantly, i.e. only 500 ppm, compared with that of a conventional one View full abstract»

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  • Application of defect inspection in development of 0.25 and 0.18 micron technology

    Publication Year: 1999 , Page(s): 135 - 138
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (280 KB)  

    We present a general strategy for identifying systematic and random defect issues during the initial stages of development of 0.25 μm and 0.18 μm logic technology. This strategy includes Critical Area Analysis modeling, improved defect monitoring techniques, methodology for prioritizing tools for continuous improvement to reduce random particles, and the use of back-end-of-line monitors. Technology development requires stringent attention to systematic defects, which dominate early yield learning. For all defect issues, we discuss practical aspects of inspection tool recipe sensitization which optimize the capture rate of visual yield limiters, enabling fast feedback problem resolution and high confidence matching of electrical faults and physical defects View full abstract»

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  • Defect isolation and characterization in contact array/chain structures by using voltage contrast effect

    Publication Year: 1999 , Page(s): 195 - 198
    Cited by:  Patents (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (208 KB)  

    Voltage contrast effect measurement, a conventional technique for isolating open contacts, was applied to high-resistance contact isolation. The detectable lower limit was clarified experimentally and theoretically. The passive voltage contrast effect is a transitional phenomenon, so the analysis conditions must be optimized for the device properties and primary beam irradiation. The detectable lower resistance limit was 1E9 Ω at most. The biased voltage contrast effect is steady state, so it could be used to isolate failed via modules whose resistance was 1E4-1E5 Ω, even when the current of the primary beam was small View full abstract»

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