Date 10-13 Oct. 1999
Filter Results
Displaying Results 1 - 25 of 103
-
Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040)
|
PDF (505 KB)
-
-
32-bit architectures for embedded systems
|
PDF (53 KB)
-
Author index
|
PDF (40 KB)
-
-
-
Design for testability to combat delay faults
|
PDF (156 KB)
-
The non-critical buffer: using load latency tolerance to improve data cache efficiency
|
PDF (88 KB)
-
-
Fault simulation based test generation for combinational circuits using dynamically selected subcircuits
|
PDF (40 KB)
-
-
Conceptual modeling and simulation
|
PDF (36 KB)
-
Multilevel reverse-carry computation for comparison and for sign and overflow detection in addition
|
PDF (240 KB)
-
-
-
-
Generic universal switch blocks
|
PDF (208 KB)
-
-
-
-
Efficient crosstalk estimation
|
PDF (112 KB)
-
-
-
-
Switching characteristics of generalized array multiplier architectures and their applications to low power design
|
PDF (1184 KB)


