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Electronic Materials and Packaging (EMAP), 2012 14th International Conference on

Date 13-16 Dec. 2012

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  • [Front cover]

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  • [Title page]

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  • The 14th International Conference on Electronics Materials And Packaging (EMAP2012) [Copyright notice]

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  • Table of contents

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  • Recent advances in Anisotropic Conductive Adhesives (ACAs) technology: Materials and processing

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (742 KB) |  | HTML iconHTML  

    New ACA materials and processing technologies innovation have been made at various advanced packaging applications such as FOB, FOF, COF, COG, TSP (Touch Screen Panel) and 3D-TSV (Through Silicon Via) assemblies. In ACA materials innovation, noble nanofiber ACA materials with conductive particles incorporated polymer nanofiber finally solve the electrical shortage and unstable contact resistance problems of less than 20 micron ultra-fine pitch COG and COF interconnection, because conductive particle movement can be significantly limited by polymer nanofibers. In addition, new solder ACA materials can significantly solve the current handling capability and reliability limitation of conventional ACAs, because solder ACFs form solder alloy metallurgical joints rather than physical contact based joints of conventional ACFs with metal conductor particles. And new epoxy based photo Active(PA)-ACFs are also introduced to reduce the ACF bonding temperature down to 110 C. In addition, there were progresses made in the area of ACA processing technologies too. New vertical ultrasonic ACA bonding technology provides less than 3 seconds ACA bonding time, reduced assembly thermal damage, good adhesion strength, good contact resistances, and reliability compared with the conventional thermo-compression bonding method. The ultrasonic ACA bonding method has been successfully adapted at the touch screen panel(TSP), FOB and FOF assembly applications. Another ACA processing innovation is the invention of the wafer-level ACA process which significantly reduces the number of processing steps resulting in low cost COB, COF, COG assemblies using ACAs. Furthermore, this wafer-level ACA processing method can be successfully extended to the 3D-TSV vertical interconnection applications too. View full abstract»

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  • Potential-assisted assembly of thiol-based materials for reliable copper-epoxy interface

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (427 KB) |  | HTML iconHTML  

    Despite the fact that copper has continuously being used as leadframe materials in electronic packaging, adhesion strength between copper-epoxy joint is prone to be weaken during reliability test. In order to solve this problem, thiol-based self-assembled material (SAM) is applied as coupling agent between copper and epoxy system. A remarkable interfacial adhesion improvement was reported by different groups [1-2]. This work reports on adhesion enhancement effects of self-assembled organothiol treatment on copper/epoxy interface, as well as a significant reduction in treatment time under the influence of electric potential. The interfacial adhesion has a maximum enhancement of 20-fold through the treatment due to improved linkage between copper substrate and epoxy layer by chemisorbed organothiol molecules. The treatment time was greatly reduced by 32 times to 1800s with the proposed preparation method and maximum adhesion strength up to 97.2±6.1 Jm-2 was demonstrated. The use of potential enhances preparation efficiency with adhesion improvement comparable to passive adsorption method make up in 16hrs. View full abstract»

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  • Preparation of MWCNT-Ni0.5Zn0.5Fe2O4-Epoxy composites with both dielectric and ferromagnetic properties

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    In this work, ferromagnetic Ni0.5Zn0.5Fe2O4 (NZF) particles were prepared through the co-precipitation method. Then, dielectric ferromagnetic composites with multi-walled carbon nanotubes (MWCNT) and NZF embedded into E-51 Epoxy matrix were synthesized by a curing process using tetraethylenepentamine (TEPA) as the curing agent. In order to facilitate the contrast, the volume fraction of the NZF ferrite was fixed at 17%, and the permeability and permittivity of the composites have been investigated in detail with the Agilent 4294A from 40 Hz to 110 MHz. For the MWCNT filler, its one-dimensional structure and good electric properties could make the composites gain a great increase on dielectric constant. And the permittivity of the composites with fMWCNT=1.7% is twice higher than the composites with only NZF. Moreover, the permeability of all the composites nearly remains the same. All the above results indicate that the MWCNT-NZF-Epoxy composites own both dielectric and ferromagnetic properties. View full abstract»

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  • Joint properties of micro Sn-58Bi solder bumps on flexible substrate

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    The mechanical bending properties of the Sn-Bi bumps on flexible circuit board were investigated in this study. Cu pillar bumps were fabricated on a Si wafer and then Sn-58wt%Bi bumps were formed on the Cu pillar bumps with electroplating after fabrication of Si chip with bump, Si chips were bonded on flexible substrate by flip chip process. Flip chip bonding conditions were bonding force of 1N, 2N, and 3N with bonding temperature of 170°C and 15s of bonding time. After bonding, we performed shear test, thermal shock test, and bending test to evaluate mechanical property and reliability of joint. Shear strength of 1N and 3N were 6.70gf/bump and 6.75gf/bump respectively. In the case of 2N, shear strength was 7.16gf/bump. After shear test, we observed fracture surface by SEM and fracture were occurred at solder bump/Cu6Sn5 IMC layer, solder matrix, and UBM/Cu pillar bump side, respectively. After thermal shock test, crack initiated interface between Cu6Sn5 IMCs and Sn-Bi solder and then propagated within Sn-Bi solder and/or in interface between IMCs and solder. On the other hands, crack initiated interface between Cu6Sn5 IMCs and Sn-Bi solder and then propagated within Ni3Sn4 IMCs/solder and solder matrix in bending test. View full abstract»

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  • Controlling fusion zone shape and peak temperature produced by laser or electron beam

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    The fusion zone shape and peak temperature in melting or welding encountered in packaging and manufacturing technologies can be generally correlated as a function of four independent working parameters. They are dimensionless beam power, Marangoni, Prandtl and modified Peclet numbers. Dimensionless beam power includes the beam power and beam radius, Marangoni number represents the driving force, namely, surface-tension gradient coefficient and viscosity, Prandtl number stands for the ratio between momentum and thermal diffusivities, and the modified Peclet number includes scanning speed, specific heat, solid-to-liquid thermal conductivity ratio, difference in melting and ambient temperatures and latent heat. Determination of the fusion zone shape and peak temperature is crucial due to its close relationship with the strength and properties of the packaging and manufacturing products. The correlated results agree with numerical data, and available experimental data. This unified work can thus be successfully used to control the fusion zone shape and peak temperature prior to welding and melting. View full abstract»

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  • Improvement of pick & place yield in carrier tape packaging system through materials selection and cavity structure optimization

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (460 KB) |  | HTML iconHTML  

    Pick & place yield performance is among of the most important parameters for electronic components assembly, especially for today's miniaturized packages. For very small devices such as small outline transistor (SOT) with carrier tape packaging system, sticking of device on cover tape was often observed, which is believed to be caused by accumulated electrostatic charge on the surfaces of device and cover tape. To improve pick & place yield performance, electrostatic charges and electrostatic forces should be minimized. In this work, pick and place tests were performed for SOT devices packaged in different packaging systems using different materials and cavity structures. The results show that the pick & place yield can be significantly improved by the right material selection and cavity structure optimization. The relationships among material property, cavity structure, electrostatic charge, electrostatic force, pick & place yield were correlated, based on experimental tests and finite elemental simulation. This work would provide test and simulation methodologies and guidelines for materials selection and cavity structure design for carrier tape packaging systems. View full abstract»

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  • Effects of moisture absorption and temperature on the adhesion strength between Die Attach Film (DAF) and silicon die

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (825 KB) |  | HTML iconHTML  

    Nowadays, Die Attach Film (DAF) has been commonly employed as a bonding media for thin die attach package and it has the tendency of replacing the normal die attach glues. Package miniaturization and die thickness reduction are the main drivers for DAF implementation in electronic packaging industry, especially in applications which require that the die thickness should be less than 100μm. However, there are still some potential reliability problems in the industry over the application of this new material, particularly the package crack issue which is directly related to material properties of DAF, such as the interfacial adhesion strength and the water absorption rate. In this study, die shear test is employed to determine the interfacial adhesion strength between DAF and silicon die. The samples with DAF and die were adhered on a copper leadframe with a load of 100±5g, heated to 100°C then held at 175°C for 5 hours. With this sample preparation method, the failure was found to occur at the DAF/Die interface during the die shear test, so that the adhesion strength between DAF and die can be well characterized. Measurements with different shear speeds were firstly conducted to find out the best conditions for this test. The effects of the moisture absorption and test temperature on the adhesion strength between DAF and Die were thereby studied. The results show that after being soaked at 85°C/85RH for 168 hours, the shear strength between the DAF and silicon die decrease from 110N to 21N. When the test temperature is 250°C, the shear stress is only 8% of that determined at 25°C. To understand these moisture absorption and temperature effects, the material properties of the DAF, including coefficient of thermal expansion, glass transition temperature, dynamic mechanical property, water absorption rate, were characterized. In summary, this study demonstrates the effect of moisture absorption and temperature on - he adhesion strength between DAF and silicon die, which would provide useful and practical guidelines for industry for applications of DAF in different packages. View full abstract»

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  • Electrochemical deposition of Galfenol

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    This paper presents the results of the electrochemical deposition of Galfenol, an iron-gallium alloy, obtained from a Hull cell apparatus. In a Hull cell, the cathode is set at a pre-determined angle with respect to the anode electrode, which enables a wide range of current densities to be evaluated across a single sample. Copper clad substrates were electroplated using an aqueous based solution containing iron sulphate and gallium sulphate containing an insoluble platinum anode. Sodium citrate was used as a complexing agent to inhibit the formation of Fe(OH)3 within the plated film. Energy Dispersive X-Ray spectroscopy was carried out to determine the Fe and Ga percentages within the deposits. A proportion of 20% Ga and 80% Fe has been shown to give the maximum magnetostrictive response for Galfenol and this material percentage was achieved in this study. Current density and bath formulation were found to play a crucial role in deposit composition. High current areas yielded higher levels of Gallium within the deposits. X-ray Diffraction measurements determined that the deposited crystalline structure of the deposit contains BCC Fe phases within the 20% Ga composition plated film. However these results contradict the published phase diagrams and resultant Energy Dispersive X-Ray Spectroscopy results. View full abstract»

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  • Thin packages enabling thin mobile products

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (789 KB) |  | HTML iconHTML  

    The booming business of mobile applications like cell phones, tablet computers, etc., is intimately linked to their thin packaging format and is continuing the drive for ever thinner applications. Concomitantly, the electronic packages inside the applications need to shrink i.e. dice, substrates, interconnects and assembly all need to contribute to the shrinkage. A packaging roadmap will be presented that aligns with this industry trend and examples of package types satisfying the roadmap will be presented. For two specific package types, aQFN and a-S3 BGA, more details will be provided for the package cross-section as well as the manufacturing process flow on a substrate and assembly level. Package and board level reliability has been collected to demonstrate the viability of these packages which have already reached the high volume manufacturing stage. View full abstract»

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  • Air gap design of current sensor based on closed loop Hall Effect

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    Air gap is one of the key factors which can affect the performances of magnetism in Hall-Effect- based current sensor. In this paper, a precise model for iron core geometry of a current sensor was built and experimental tests were also conducted. The comparison between experimental and simulation results shows that simulation results agree well with the experimental ones when the current is less than 70A. View full abstract»

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  • Generation of arbitrary vector beams with a spatial light modulator

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    We report a convenient scheme for generating arbitrary polarized light with a spatial light modulator (SLM). The wavefront reconstruction of the output beam is achieved by controlling the polarization rotation and phase retardation of every pixel in the beam cross section. The Jones Matrix of the system is calculated. The potential application of this setup is discussed. View full abstract»

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  • Optical module for healthcare electronics

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    Optical module composed of light emitting diodes and photo-detector is the key component in measuring health information. We have developed a thin optical module with built-in EMI shield for measuring reflective blood oxygen saturation, pulse rate and breathing rate. With proper design in the shape of the encapsulation on the optical module, cross-coupling can be minimized. Also, with the new packaging design, the optical module can be easily modified for measuring blood oxygen saturation at different parts of the body. Reliability tests have been conducted on the optical module to investigate and evaluate its robustness including the shift in peak wavelength and emission power which will affect the accuracy of the pulse oximeter. View full abstract»

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  • Laminates for MEMS and BioMEMS

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    This paper describes a new way to build MEMS and BioMEMS devices using laminate technologies borrowed from the packaging industry. This approach to building MEMS departs from the traditional silicon approach, and offers many advantages, including the ability to design and build the package at the same time as the device itself. The use of MEMS fabrication techniques, combined with microelectronics manufacturing technology allows a host of integrated devices to be built using novel materials and processes. This frees the MEMS designer from the significant limitations imposed by silicon and its related materials and processes. Devices can be built that are intended for high power applications, optical applications, or biomedical applications. View full abstract»

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  • Opportunities on prolong battery stand-by time

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (882 KB) |  | HTML iconHTML  

    A foresight study has been successful conducted on minimizing leadless package leakage current to prolong the battery standby time. Nowadays, smart phone industry is booming in global marketplace and the latest metrics data shows a continuous rising. It can foresee that the market is looking for a longer and longer battery life. Package leakage current plays important roles for this need, especially for the minimization package with smaller lead pitch. A novel leadless package leakage current mechanism is built and concluded by an extensive analysis and process mapping etc.. It is found that the backside thermoplastic leadframe tape composes of poly-amide-imide layer could be activated by die bonding & wire bonding process with a high temperature and a long duration. During the molding process, the activated tape reacts with the catalysis in biphenyl epoxy based molding compound (EMC) and result a slightly conductive surface with amide group on the EMC. It is well known that amide can be hydrolyzed in acid or base with the formation of carboxylic acid or carboxylate anions. With the considerations of the facts that the chemicals used for deflash is mainly composed of sodium hydroxide with a high pH value and the chemical used for plating contains Solderon acid which is very acidic, it was believed that the polymer chains containing amide group on the molding compound surface was hydrolyzed in proceed processes. After hydrolysis, the carboxylic acid would attract the Sn ions in the plating bath. The existence of these ions on the molding compound surface would cause the current leakage. Based on this novel leakage mechanism, three independent remarkable industrial solutions are suggested and proven. 1) Use non-PAI adhesive layer leadframe tape. 2) Use EMC without the catalysis which can activate tape & EMC. 3) Skip the plating process. View full abstract»

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  • Inductive link design with optimal transfer efficiency and a high CMRR

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    In this paper, we present two key design approaches to optimize an inductive link for contactless energy transfer. Applications of the inductive link include 1.) a wireless technique to energize implanted biomedical devices; and 2.) wireless peripheral I/Os between chips. First, a new hybrid (i.e., surface mount components on a PCB) structure, which consists of a symmetrical coils and matching capacitors for improving the power link efficiency and immunity to misalignment was designed. The maximum transfer efficiency with and without impedance matching will be analyzed and shown. Since biomedical implants often relying on inductive links for power and data transfers, the interference between them is a major concern. Therefore, as the second design approach, this study proposes a full differential signaling scheme to eliminate out of band interference and provide a high CMRR in the interested frequencies. Based on EM modeling and analysis, the simulation result yields transfer responses that are in good agreement with experimental results. According to the results, the maximum transfer efficiency is 87% at 3mm vertical distance and the CMRR is higher than 50dB. At z=12mm, or a lateral misalignment of 9 mm, it is still able to achieve an optimal energy transfer (at 48%), after impedance re-matching. View full abstract»

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  • In-line monitoring of the change of residual stress in nano-scale transistors during their thin-film processing and packaging

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (618 KB) |  | HTML iconHTML  

    In this study, the change of the residual stress in transistors during their fabrication processes was analyzed by a finite element method (FEM) and measured by developed strain sensors. The sensors embedded in a PQC-TEG were applied to the measurement of the change of the residual stress in a nano-scale transistor structure during thin film processing. The change of the residual stress was successfully monitored through the process such as the deposition and etching of thin films. In addition, the fluctuation of the process such as the intrinsic stress of thin films and the height and the width of the etched structures was also detected by the statistical analysis of the measured data. The sensitivity of the measurement was 1 MPa and it was validated that the amplitude of the fluctuation during thin-film processing exceeded 100 MPa. This technique is also effective for detecting the spatial distribution of the stress in a wafer and its fluctuation among wafers. View full abstract»

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  • Development of thermal fatigue sensor for electrical and electronic equipment

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    In this paper, authors proposed an original sensor which can measure thermal fatigue life of electronic equipment. The measurement principle of the sensor is that the joint was damaged by the stress due to a mismatch of thermal expansion between two materials. Finally, the joint was ruptured by the repeated stress. The priority subject was the feasibility of measurement accuracy of the sensor. Generally, a high level control of failure in joint is very difficult. To solve this problem, authors conceived the original design of the sensor. Then, the availability study of the original sensor for fracture control in joint was carried out using the crack propagation analysis. In the result, a high level control method for failure in joint of the sensor was achieved. View full abstract»

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  • Supply chains for 3D IC integration manufacturing

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (361 KB) |  | HTML iconHTML  

    The supply chains for 3D IC integration manufacturing are studied in this investigation. Emphasis is placed on the ownerships of the technology supply chains such as the FEOL (front-end-of-line), MOL (middle-of-the-line), BEOL (back-end-of-line), TSV (through-silicon via), MEOL (middle-end-of-line), and package assembly and test. Some recommendations will be provided. View full abstract»

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  • Warpage, stresses and KOZ of 3D TSV DRAM package during manufacturing processes

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    The objective of this paper is to measure and simulate the warpage of 3D TSV (through-silicon via) die-stacked DRAM (dynamic random access memory) packages subject to thermal loading (from the room temperature to 260°C, solder reflow temperature) during manufacturing processes. The related die stresses and keep-out zone (KOZ) for the dies in the packages at the room temperature are further calculated with this validated simulation model. In the experiments, a full-field shadow moiré is used to measure the out-of-plane deformation (warpage) of packages under thermal heating conditions. A finite-element method (FEM) is applied for analyzing the thermally-induced deformation, stresses and KOZs in the packages to gain insight into their mechanics. The full-field warpages of the packages from the shadow moiré have been documented under temperature loading and compared well with FEM results. The stresses and KOZs at the proximity of a single TSV for each die in the package at the room temperature have been calculated with validated FEM model. It is found that the sizes of KOZs in four-die stacked DRAM package at the room temperature are dominated by the horizontal pMOS device and are almost double as large as the size in wafer-level die. And the sizes of KOZs are pretty much similar for each die in this four-die stacked DRAM package, even through the stresses at each die are apparently different. View full abstract»

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  • A 3D integration testing vehicle with TSV interconnects

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    3D integration is one of the potential solutions for extending Moore's momentum in the next decennium. Through silicon via (TSV) is a key interconnect technology for future's higher performance and system integration with vertical stacked chips in package, which can achieve smaller interconnection delay, heterogeneous technologies integration and potentially lower cost and reduce time-to-market. In this paper, a testing vehicle of 3D stacking dies with TSVs as the major interconnect was designed. A dummy die with 5 μm diameter TSVs was fabricated and assembled on a silicon interposer, which has TSVs as well. The dummy die/chip was bonded on the interposer through Cu-Sn-Cu bonding at 280°C, and then, the bonded module was assembled on designed testing board. View full abstract»

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