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Computing System Engineering (SBESC), 2012 Brazilian Symposium on

Date 5-7 Nov. 2012

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Displaying Results 1 - 25 of 58
  • [Front cover]

    Page(s): C4
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  • [Title page i]

    Page(s): i
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  • [Title page iii]

    Page(s): iii
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  • [Copyright notice]

    Page(s): iv
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  • Table of contents

    Page(s): v - ix
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  • Preface - SBESC 2012

    Page(s): x
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  • Conference Organization

    Page(s): xi
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  • WSE Reviewers

    Page(s): xii
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  • WSO Reviewers

    Page(s): xiii
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  • WTR Reviewers

    Page(s): xiv
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  • Reconfigurable Agents for Heterogeneous Wireless Sensor Networks

    Page(s): 1 - 6
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (412 KB) |  | HTML iconHTML  

    Heterogeneous wireless sensor networks combine static nodes and mobile nodes. These mobile nodes might present a more sophisticated and powerful computation platform if compared to static nodes. UAVs (Unmanned Aircraft Vehicle) can confer mobility feature to a node, as well as offer a powerful computation platform, including reconfigurable hardware as an execution platform alternative. These types of networks enable a vast and interesting spectrum of applications, like area surveillance, public security support, among others. An UAV might join or leave a network, and thereby migration of agents might occur among UAVs. In this scenario, this paper proposes a reconfigurable agent, which is able to be executed as pure software agent, as well as a hardware agent, depending on the available execution environment and application decisions. The proposed architecture for a reconfigurable agent presents the necessary transparency so that the rest of the system is not aware of the agents' nature. Moreover, the system enables a dynamic migration of an agent reconfiguring thereby itself to the target execution environment, in a transparent manner as well. Case studies and results are presented, showing the feasibility and costs related to the architecture proposed. View full abstract»

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  • Passive Monitoring Software Tool for Evaluation of Deployed WirelessHART Networks

    Page(s): 7 - 12
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    Deployment of Wireless Sensor Networks in real-world control and monitoring applications may reveal performance problems caused by several factors. To track down such problems, it is necessary to inspect the conditions of network and nodes after deployment. In this paper, we discuss a monitoring software architecture for inspection of WirelessHART networks. Capture of information is done in a passive way using sniffers deployed in the network area. Messages are decoded, decrypted, filtered and then visualized in a graphic interface. A WirelessHART network was deployed in a laboratory for performance evaluation using the developed tool. View full abstract»

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  • Exploiting Modbus Protocol in Wired and Wireless Multilevel Communication Architecture

    Page(s): 13 - 18
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    This paper proposes an architectural improvement for the Modbus RTU protocol to integrate equipments in industrial automation networks, employing hybrid communication with wired Modbus RTU and wireless IEEE 802.15.4. These environments have different electromagnetic interferences, requiring protocols with noise immunity to varied equipments such as motors and generators. Modbus RTU is a simple and robust master-slave protocol that accepts the integration of a master with up to 247 slaves into a bus topology. In addition, the IEEE 802.15.4 protocol emerged recently as a wireless solution to industrial environments since it allows electromagnetic spectrum evaluation, and the choice of avoiding communications in noise frequencies and decreasing the error rate between packets. The proposed hybrid communication protocol increases control and topological limits imposed by Modbus RTU by enabling a wired/wireless tree-bus topology and master multiplexing. Moreover, the academy-industry cooperation resulted in features implemented in a gateway, whose efficiency is evaluated with practical experiments in different topologies. View full abstract»

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  • Exploratory Study on the Linux OS Jitter

    Page(s): 19 - 24
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    The operating system (OS) Jitter phenomenon has been considered an import and critical factor in high-performance distributed computing. In this paper, we present the results of an experimental study that quantifies the effects of different sources of OS Jitter in the Linux operating system. We use the design of experiments (DOE) method to conduct controlled experiments statistically planned. Different than previous studies, we found that the processor topology, especially regarding the shared processor cache, has the most significant influence in terms of OS Jitter. Also, we found that in order to reduce the impact of OS Jitter on a given application, the number of computational phases in the algorithm is significantly more important than the number of distributed processes or compute nodes. View full abstract»

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  • Device to Assist the Visually Impaired in Reading Printed or Scanned Documents

    Page(s): 25 - 30
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    Individuals with visual impairment have their ability to access information limited by the lack of mass literature in Braille. This paper presents an embedded application to aid the visually impaired that allows reading and writing printed and/or digitized documents. The solution, designated PORTÁCTIL, is a device composed of five modules: (1) electromechanical Braille cells, (2) hand motion sensor, (3) processing unit, (4) wireless communication and (5) power supply. The text, locally stored or received by wireless communication, is translated to Braille and displayed following the movement of the hand of the reader. Thus, reading occurs in the same way as in books written in Braille. The device is powered by rechargeable batteries and is capable of receiving texts from smartphones and tablets through Bluetooth. Some prototypes were built and tested by several visually impaired users. The adaptation was very good as well as the acceptance. Properties such as weight / volume, energy consumption and performance were evaluated and are given in the full text. View full abstract»

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  • JingleOS: An Operating System to Embedded Devices with Language-Based Protection

    Page(s): 31 - 36
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    Language based protection and high-level language virtual machines (JVM, CLR) have solved many problems of portability and dependability. Development of operating systems with these characteristics for embedded systems could enjoy these benefits with the solution of basic problems related to resource consumption and performance. This paper presents the JingleOS, an operating system designed on these concepts for devices with a few kibibytes of RAM and 8 bits microcontrollers. To support the system design, advanced compiler techniques and extensions of the Java programming language were used, in order to allow low-level hardware access and bare metal execution. View full abstract»

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  • The Development of a Methodology with a Tool Support to the Distributed Simulation of Heterogeneous and Complexes Embedded Systems

    Page(s): 37 - 42
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    Nowadays, embedded systems contains a big computational power and consequently a big complexity. It is very common to find different kinds of applications being executed in embedded systems. With this scenario, it is necessary some method and/or tool that allows the simulation of those systems in an efficient and practice way. The goal of this paper is to expose the integration between Ptolemy II and HLA in order to enable the elaboration of one methodology, with a tool support, to model and simulate large scale heterogeneous embedded systems. View full abstract»

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  • Impact on Reliability in the Control-Flow of Programs under Compiler Optimizations

    Page(s): 43 - 48
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    This paper evaluates the impact on reliability in the control-flow of programs that compiler optimizations incur in terms of fault coverage for the Automatic Correction of Control-flow Errors technique. This technique was implemented in the LLVM framework, enabling the automated analysis of programs. In order to evaluate the efficiency of the technique of fault tolerance we performed a series of fault injection experiments using the MiBench benchmark suite as case study, measuring how individual and combined optimizations impact reliability. View full abstract»

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  • Development of a Low Cost Programmable Logic Controller

    Page(s): 49 - 52
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (3540 KB) |  | HTML iconHTML  

    Some Brazilian regions have an agricultural vocation and are undergoing on a significant industrialization process, which is mainly caused by the installation of biofuel industries. Therefore, demand for agricultural and industrial automation will be great in the next years. The aim of this study is to develop a low cost small module (hardware card), for use in the automation of simple machines and equipments. This programmable logic controller (PLC) will be part of an open platform that also contains a free software tool for programming PLC in C language, and an online tutorial with detailed instructions about building and programming the system. Thus, students and professionals can automate machinery and equipment in a simple and low cost way. This article shows the electronic design of the PLC, its programming and tests results of the breadboard setup. View full abstract»

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  • Energy Profile Evaluation of a Cyber-Physical System

    Page(s): 53 - 58
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    In Cyber-Physical Systems (CPS) the operation of electromechanical devices is tightly integrated with the embedded computer system. The diversity of components imply in different profiles of energy consumption. Thereby, it becomes useful to use techniques that can manage the energy consumption. In a previous work, this aspect was modeled using a technique that allows estimating the energy consumption of a battery-powered CPS. In this paper we present a practical implementation of such work, where the peripherals of a mobile robotic system are characterized to compose the energy profile of the system. Conducted experiments measured the electrical currents during a planned navigation of the robot. The results confirm the assumptions assumed by the modeling technique, which proposes a relationship between the embedded computer system and the electromechanical devices, i.e., there is a direct relation between the device's activation and the nature of the software task under execution. View full abstract»

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  • Performance and Energy Consumption Analysis of Embedded Applications Based on Android Platform

    Page(s): 59 - 64
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    This paper presents an analysis of embedded applications based on Android Platform. Analyzing performance and energy consumption from different algorithmic versions this work tries to find a performance and energy pattern for the paradigm used in each used algorithm. Thus, the developer can select the best algorithm version for each application based on the requirements. Android is a Linux based mobile operating system developed by Google in conjunction with the Open Handset Alliance. Nowadays, Android is the world's leading smartphone platform. The Android Platform provides a rich development environment (SDK) including an API, development and debug tool and so on. However, during the development process it is necessary to handle with the system functionalities and it must at the same time help the handling of the embedded systems tight constraints, like performance, energy and power. This paper shows some performance and energy consumption results for a set of applications using different algorithmic versions. View full abstract»

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  • Real-Time Dynamic Voltage Scaling for the EPOS Operating System

    Page(s): 65 - 70
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    Several implementations of Real-Time Dynamic Voltage and Frequency Scaling (RT-DVFS) have been made in the last decade. Most of them, however, are adaptations performed over some Linux-based operating system. The real-time support on Linux systems depend on complex modifications of the system kernel and is often not regarded as hard real-time support. This work presents the design and implementation of the DVFS support for the hard real-time schedulers of EPOS (Embedded Parallel Operating System) -- an application-driven operating system designed to support embedded applications. The design presented here supports the insertion of RT-DVFS heuristics into the system schedulers in a loosely-coupled fashion. The design is implemented in EPOS and evaluated in a XScale processor. Effectiveness of the RT-DVFS heuristic is assessed by implementing two classic RT-DVFS algorithms that were proposed as extensions to the Earliest Deadline First scheduler. View full abstract»

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  • Power Reduction on Embedded Systems Achieved by a Synchronous Finite State Machine Design Technique

    Page(s): 71 - 76
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    Embedded applications that can be modeled as a Synchronous Finite State Machine are prone to a significant reduction in energy consumption when a very straightforward implementation approach is used. The potential for energy consumption reduction is highly dependent of the clock of the Synchronous Finite State Machine. Although the method is limited to synchronous FSM applications the benefits are worth the effort to attempt this modeling approach. The implementation requires only a timer (hardware timer or RTOS timer) that provides the clock of the Synchronous FSM. The energy reduction is obtained by changing the state of the processor to a low power state. View full abstract»

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  • A LLVM Based Development Environment for Embedded Systems Software Targeting the RISCO Processor

    Page(s): 77 - 82
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    In this paper we describe the design and implementation of a compilation and code analysis toolchain for embedded systems software targeting the RISCO processor, using the LLVM project. Small systems embedded in a larger device are by far the most common kind of computational system in use today, deployed in various types of equipments. Because of their nature, an embedded system presents interesting size, efficiency and energy consumption restrictions, among others, that impose unique challenges on a project. In that scenario, the RISCO processor, a RISC architecture similar to MIPS, was created as a simple, efficient, processor that could prove to be a practical alternative to the available commercial options in its price range. The toolchain we developed permit the development, simulation and analysis of software in C and C++ for the RISCO platform, with open source tools. Besides compiling and executing high level code, the environment supports emitting control flow graphs for each module, enabling further analysis. As a case study on using CFGs and generated machine code information we developed a worst case execution time analysis tool for RISCO code. We discuss the scope of the tools, the design decisions involved in the development of the compilation and analysis system, and the results obtained through testing. View full abstract»

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  • SICXE: Improving Experience with Didactic Processors

    Page(s): 83 - 86
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    This paper presents the design, hardware description and test of SICXE processor, as well as a development environment and simulation tools for this architecture. Based on SIC processor, SICXE is a didactic 32-bit RISC that offers integer ALU, floating-point ALU, interrupts, addressing up to 4GB of program memory, programmed I/O based, DMA-based I/O and also supports a simple operating system. The physical model proposed fit in a compact design, operating at frequencies above 50 MHz and may compose larger projects of embedded systems. This entire software and hardware environment also may be applied for university courses in disciplines such as computer architecture, operating systems, system software and compilers. View full abstract»

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