By Topic

Circuits and Systems, 1991., Proceedings of the 34th Midwest Symposium on

Date 14-17 May 1992

Filter Results

Displaying Results 1 - 25 of 278
  • Proceedings of the 34th Midwest Symposium on Circuits and Systems (Cat. No.91CH3143-5)

    Publication Year: 1991
    Save to Project icon | Request Permissions | PDF file iconPDF (23 KB)  
    Freely Available from IEEE
  • Design of a network interface adapter for hybrid-LANs

    Publication Year: 1991 , Page(s): 455 - 458 vol.1
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (308 KB)  

    The authors discuss the design of a network interface adapter (NIA) suitable for hybrid local area networks (LANs). Efficient load sharing through two communication channels is an important function of the NIA. The design of the message distribution device for dynamic loading of messages is presented. This research provides a basic foundation for the implementation of hybrid-LANs as well as other hybrid-type architecture LANs View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • BiCMOS SRAM with array-integrated sense devices

    Publication Year: 1991 , Page(s): 1008 - 1010 vol.2
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (172 KB)  

    A 128-word by 44-b wide SRAM (static random-access memory) embedded array has been designed in a BiCMOS process that contains 0.45-μm FETs and 18-GHz bipolar transistors. The design integrates the sense-amp function into the array, and BiCMOS performance levels are maintained without utilizing the DC power of traditional BiCMOS sense-amplifier and level-shift circuits. The sense-amp function is realized through a unique combination of bipolar devices and FET storage cells distributed along a bit line. Each bipolar device acts as an address/data-controlled current switch that may or may not discharge a bit line. The discharge occurs very quickly, generating a full signal level capable of driving CMOS logic View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Bipolar, CMOS and BiCMOS circuit technologies examined for testability

    Publication Year: 1991 , Page(s): 1015 - 1020 vol.2
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (360 KB)  

    A circuit-level testability comparison of bipolar, CMOS and BiCMOS logic technologies is presented. Process defects from each technology are examined to determine the fault models that best detect these defects. Commonalities and differences of fault models among the circuit types are described. The test cost required to obtain the same quality in each technology is described. It is shown that bipolar circuits can be effectively tested by the stuck fault model. To achieve high test coverage in CMOS circuits, stuck fault and current testing should be applied. Current testing can be effective in CMOS if the appropriate patterns are generated. BiCMOS requires delay testing. While current measurement could detect a few defects, it is not enough to replace delay test in BiCMOS. Delay testing may not detect all defects even if test vectors are available. Furthermore, it is expensive in test generation and test hardware cost. This suggests that design-for-test features may even be more important for BiCMOS circuits than for CMOS or bipolar circuits View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Model order, convergence rates and information content in noisy partial realizations

    Publication Year: 1991 , Page(s): 432 - 435 vol.1
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (360 KB)  

    It is shown that convergence rates of recursive algorithms for parameter estimation from noisy partial realizations depend on the structure of the chosen model. The model is analyzed by considering information unique to the parameterization-the sensitivity and interconnectedness of the model parameters. The convergence analysis is independent of model order. Useful information about relative convergence rates can be inferred even when the model order does not match that of the identified system View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A design methodology for modelling CMOS gates based on Petri nets

    Publication Year: 1991 , Page(s): 1005 - 1007 vol.2
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (156 KB)  

    A design methodology for deriving switch level equivalent circuits for CMOS combinational logic circuits based on Petri nets is presented. Detailed Petri net models of the p- and n-type transistors are discussed, and the use of these models to construct the CMOS gates (i.e., NOT, NAND, NOR) for logic correctness is illustrated. How the proposed methodology can be extended to include timing verification is discussed View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Mixed A/D macromodels speed up power supply simulation

    Publication Year: 1991 , Page(s): 602 - 605 vol.2
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (316 KB)  

    Macromodels which allow a complete simulation of the power supply including switching transients to reduce the simulation time costs are introduced. These macromodels have been implemented using advanced features of PSPICE. These features include its mixed analog/digital and analog behavioral modeling capabilities. Some simulations are presented to highlight the advantages of both approaches View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A parallel single row routing algorithm for hypercube multiprocessor

    Publication Year: 1991 , Page(s): 459 - 462 vol.1
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (344 KB)  

    The authors develop a parallel single-row routing algorithm for a hypercube multiprocessor. The parallel algorithm is based on an earlier sequential O(n2 log n) algorithm and an efficient allocation scheme. The algorithm uses a graph decomposition technique and modified cut-number to partition the problem into several subproblems. Each problem is solved on a different processor and solutions are merged in parallel. It is proved that the algorithm has a linear speedup of (n2 log n)/N using N processors and that the allocation scheme is optimal. The experimental results show that the proposed algorithm achieves a speedup factor that is quite close to the theoretical bound while maintaining the quality of the solutions as compared to sequential algorithms View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A recursive identification method for continuous time-varying linear systems

    Publication Year: 1991 , Page(s): 436 - 439 vol.1
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (264 KB)  

    A method for online identification of continuous time-varying linear systems is proposed based on the block pulse functions. From the relations between entries of the block pulse operational matrices, simple regression equations corresponding to the original differential equation models with time-varying parameters can be obtained, and algorithms developed in discrete-time model identification can be applied directly to estimate the time-varying parameters of the continuous models without much modification. Compared with other methods for solving the same identification problem, no analog devices, no large computations in the data preparation stage, and no initial values are involved in this new method. Therefore, the estimation procedure is much simpler. Owing to the block pulse regression equations, the proposed recursive method is suitable for online identification of continuous time-varying linear systems from their sampled input and output data by means of digital computers View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Analog macromodeling of digital elements in SPICE

    Publication Year: 1991 , Page(s): 376 - 379 vol.1
    Cited by:  Papers (1)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (304 KB)  

    An approach to the accurate simulation of digital elements in a circuit simulator is described. The approach gives more detailed time-domain waveforms than logic simulation. It is more than an order of magnitude faster than transistor-level simulation, but has comparable accuracy. As the simulation is completely in the analog domain, no analog-digital interfaces are required. One can freely mix analog and digital elements, and all features of circuit simulators such as sensitivity analysis and pole-zero analysis are available. Special primitives built into SPICE can greatly facilitate macromodeling of digital elements. Details of the implementation of the primitives in SPICE 3c1 are given. The modeling of chips in the TTL (transistor-transistor logic) family is considered as an example. The analysis of an analog-to-digital converter is also given to bring out the mixed signal capability of this approach View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A new neural network architecture for rotationally invariant object recognition

    Publication Year: 1991 , Page(s): 320 - 323 vol.1
    Cited by:  Papers (3)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (384 KB)  

    Introduces a novel neural network architecture for rotationally invariant object recognition. Second-order neurons are used in combination with polar sampling to obtain invariance without incurring excessive network size. Multiple experiments are presented, demonstrating that incorporation of a variable range of rotational invariance results in improved performance over previous methods. The proposed architecture is computationally efficient and avoids the use of subsampling and the resulting loss of recognition accuracy. It has the additional benefit that the range of rotational invariance can be easily adapted to specific applications where full rotational invariance is not appropriate View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Gate usage strategies applied to BiCMOS sea-of-gates arrays

    Publication Year: 1991 , Page(s): 1011 - 1014 vol.2
    Cited by:  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (308 KB)  

    A methodology for comparing CMOS and BiCMOS gate usage strategies is applied to gate delay optimization. Advanced strategies mixing simple and buffered CMOS and BiCMOS gate configurations are shown to be significantly superior, in terms of speed and density, to full-CMOS or full-BiCMOS strategies. For typical capacitance distributions, the speed advantage can be as high as 70% compared to a pure BiCMOS solution. A similar method can be used to minimize area or power dissipation. A BiCMOS sea-of-gates master, designed by using this method, is presented View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Pipelined multi-bit oversampled digital to analog converters with capacitor averaging

    Publication Year: 1991 , Page(s): 336 - 339 vol.1
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (320 KB)  

    A combination of pipelined architecture and the dynamic element matching technique is applied to multibit oversampled D/A (digital-to-analog) converters. The approach translates the harmonic distortion components of the nonideal internal DAC (digital-to-analog converter) of the oversampled D/A converter to high-frequency components, which can then be filtered out by the analog low-pass filter for anti-imaging. Computer simulations have confirmed that, with this approach, a third-order oversampled D/A converter employing a 3-b quantizer, a 3-b pipelined internal DAC with a random mismatch of 0.1%, can achieve a 94-dB dynamic range with an oversampling ratio of 64, while eliminating the harmonic distortion View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • On efficiently calculating transient solutions of generalized stochastic Petri net models

    Publication Year: 1991 , Page(s): 1001 - 1004 vol.2
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (324 KB)  

    The author describes an efficient numerical algorithm for calculating transient solutions of generalized stochastic Petri net (GSPN) models. The method described is based on the randomization technique and a stable calculation of Poisson probabilities. A complete redesign and reimplementation of the appropriate components of the software package GreatSPN lead to a significant savings in computation time and memory space. The benefit of employing the described solution algorithm is illustrated by a GSPN model for the M/M/1/K queueing system. This example shows that transient solutions of GSPN models are calculated with significantly less computational effort and better error control by the algorithm described than by the method implemented in version 1.4 of the analysis tool GreatSPN View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An improved model for SOI enhancement and depletion JFETs with nonuniform channel parameters for low/high-speed applications

    Publication Year: 1991 , Page(s): 811 - 814 vol.2
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (364 KB)  

    The dynamic operation of various n-channel silicon-on-insulator (SOI) junction field effect transistors (JETs) is presented. A previously developed program, based on an accurate model of the SOI JFET I-V characteristics, taking into account the effect of SOI structure on the charge carrier mobility, is modified to include the calculations of the device parameters and high-speed figures of merit. The authors present the DC, AC, and transient response analysis of inverters with n-channel E-JFET drivers and depletion-type loads. (E/D inverters). Results are simulated for different device parameters and supply voltages for VLSI circuit applications. A fifteen-stage ring oscillator is used to rate the performance of the SOI E/D JFET inverters for future digital logic applications. SOI E/D inverter performance compared favorably with typical GaAs inverter structures View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Parameters of Butterworth, Tschebyscheff, and elliptic prototype reference transfer functions in discrete-time frequency transformations

    Publication Year: 1991 , Page(s): 235 - 238 vol.1
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (252 KB)  

    Explicit relationships are presented for the parameters of the normalized lowpass discrete-time prototype reference transfer function suitable for the derivation of denormalized lowpass, highpass, bandpass, and bandstop discrete-time transfer functions having Butterworth, Chebyshev, and elliptic loss-frequency characteristics. These parameters include the required order of the discrete-time prototype reference transfer function as well as the required passband and stopband edge frequencies for its loss-frequency characteristics View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A computationally efficient technique for deriving 2-variable VSHP and its application

    Publication Year: 1991 , Page(s): 696 - 699 vol.2
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (244 KB)  

    A method for the generation of 2-variable very strictly Hurwitz polynomial (VSHP) free of any nonessential singularities of the second kind is presented. The proposed technique utilizes the properties of positive definite and semidefinite matrices along with resistive matrices to avoid calculation of higher-order derivatives which are cumbersome. Through an example, the usefulness of the proposed technique and its applications in 2D filter design are demonstrated View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Matching analysis by voltage-standing waves

    Publication Year: 1991 , Page(s): 748 - 751 vol.2
    Cited by:  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (288 KB)  

    The matching problems are solved in the present analysis by voltage-standing waves on the transmission lines connecting linear lumped circuits. Transmission lines may be single, coupled, uniform, nonuniform, and a combination of these but not RC lines. Simulation shows that the voltage standing wave on a nonuniform line remains even if the total operating loss in 0 dB, when both terminations are the nominal impedances View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • About moments calculation based on run-length format

    Publication Year: 1991 , Page(s): 155 - 157 vol.1
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (120 KB)  

    The authors propose an extension to the delta method to compute moments up to any order. They also present a novel method, the semi-integral method, as a replacement for the delta method. In this method, the alternative approach arises by considering the image as the sum of segments each with unity height, i.e., a group of lines, and then applying analog integration along the x direction where the mathematical integral formulas are used rather than the delta method summation formulas. Computer simulation for moment calculation with different levels of digitization shows that the method provides better performance than the delta method View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A temperature dependent SPICE macro-model for power MOSFETs

    Publication Year: 1991 , Page(s): 597 - 601 vol.2
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (320 KB)  

    A power MOSFET SPICE macro-model suitable for use over the temperature range -55 to 125°C has been developed. The model is composed of a single parameter set with temperature dependence accessed through the SPICE.TEMP card. SPICE parameter extraction techniques for the model and model predictive accuracy are discussed. Though complex, the model and approach to parameter extraction are straightforward. As all the parameter extraction algorithms are analytic in nature, automation of the extraction process is straightforward and requires no special optimization routines. The addition of a power MOSFET model to the SPICE code would result in more robust and efficient simulations View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Online identification scheme via modified response error method

    Publication Year: 1991 , Page(s): 440 - 442 vol.1
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (148 KB)  

    The authors propose an online identification algorithm based on the response error method. The conventional least squares technique suffers from structural error while the other algorithms have stability problems. A comparison is made between the recursive maximum likelihood method and this method, and the performances are compared. System parameters are identified online without any stability problem from arbitrary initial conditions. The input sequences chosen for the purpose of identification are a rich input such as random binary numbers (RBN) and a square wave which is common in control applications. It can be seen that the accuracy is good in case of RBN input compared to the square wave input View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Application of neural network technique in implementation of constant weight codes

    Publication Year: 1991 , Page(s): 249 - 252 vol.1
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (324 KB)  

    Constant weight codes are very useful in high speed optical data links and spread spectrum systems. The error correction/detection depends on the length of the code (amount of redundancy added) and minimum distance of the code. The current technique, utilizing lookup tables for error correction/detection, is a problem as far as high throughput is concerned. A scheme utilizing a neural network approach is proposed. It results in better error correction and retransmission capability than does the current technique and can be used efficiently in frequency hopped systems. The neural network approach is much faster, and the decoding process has been reduced to simple vector-matrix multiplication View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Design and performance of UHF and L-band oscillators using thin-film resonators on semiconductor substrates

    Publication Year: 1991 , Page(s): 307 - 310 vol.1
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (284 KB)  

    The authors report on the use of sputter-deposited, thin-film, aluminum nitride resonators as the feedback element in hybrid single-mode, combline, and voltage-controlled UHF and L-band oscillators. The resonators have also been cointegrated on the same substrate with 2-GHz BJTs (bipolar junction transistors). Design techniques and suggestions for novel architectures using this technology are presented View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Implementation of pole-zero analysis in SPICE based on the MD method

    Publication Year: 1991 , Page(s): 380 - 383 vol.1
    Cited by:  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (304 KB)  

    The modification-decomposition (MD) method for finding the poles and zeros of a general circuit has been implemented in SPICE 3c1. The method is based on finding the eigenvalues of the time constant matrix, and convergence is guaranteed as long as the circuit has a DC solution. The method requires no complex operations and only one LU decomposition. It fits in very conveniently with the framework used in SPICE. Special elements like transcapacitances and transfer function blocks are taken care of in the implementation. Apart from a standard filter application involving RC elements and op amps, an ECL (emitter coupled logic) ring oscillator and root locus of a switching mode power supply are given as examples View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A taxonomy of the currently proposed large supra-high-speed packet switching networks

    Publication Year: 1991 , Page(s): 332 - 335 vol.1
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (284 KB)  

    The authors present a taxonomy of the approaches adopted so far, i.e., up to January 1991, for large (an area covered by a ⩾100-km-diameter circle) supra-high-speed packet switching network. A survey of the unclassified literature makes it possible to classify them into two major groups: (i) the direct or unilevel design method, and (ii) the indirect or multilevel or hierarchical design approach. Numerous examples from each category are provided View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.