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2012 Formal Methods in Computer-Aided Design (FMCAD)

22-25 Oct. 2012

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Displaying Results 1 - 25 of 35
  • Preface

    Publication Year: 2012, Page(s): iv
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    Freely Available from IEEE
  • Table of contents

    Publication Year: 2012, Page(s):i - iii
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  • Author index

    Publication Year: 2012, Page(s): 209
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  • Conference organization

    Publication Year: 2012, Page(s):v - vi
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  • Formal methods in cell Biology

    Publication Year: 2012, Page(s): 1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (89 KB)

    Summary form only given. Biological systems are extremely complex reactive systems. They operate as highly concurrent programs with millions of entities running in parallel and communicating with each other under various environmental conditions. Understanding how living systems operate in such harmony and precision, and how this harmony is being disrupted in diseased states, are key questions in ... View full abstract»

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  • Answer Set Programming

    Publication Year: 2012, Page(s): 2
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (105 KB) | HTML iconHTML

    Answer Set Programming (ASP; [1], [2], [3], [4]) is a declarative problem solving approach, combining a rich yet simple modeling language with high-performance solving capacities. ASP is particularly suited for modeling problems in the area of Knowledge Representation and Reasoning involving incomplete, inconsistent, and changing information. From a formal perspective, ASP allows for solving all s... View full abstract»

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  • Formal methods for aerospace applications

    Publication Year: 2012, Page(s): 3
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (96 KB)

    Formal methods are being progressively incorporated in the aircraft and spacecraft software design and verification process and become commonplace elements of the aerospace industry. Five aerospace software system experts will present their views on this process and where it is headed. Focusing first on design issues, PETE MANOLIOS (Northeastern University, USA) will discuss design aspects and cos... View full abstract»

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  • Application of SMT solvers to hybrid system verification

    Publication Year: 2012, Page(s): 4
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (91 KB)

    Summary form only given. Hybrid automata are a widely used framework to model complex critical systems, where continuous physical dynamics are combined with discrete transitions. Application areas include automotive, railway, aerospace, and industrial production. The expressive power of Satisfiability Modulo Theories (SMT) solvers can be used to symbolically model networks of hybrid automata, usin... View full abstract»

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  • Algebra of concurrent design

    Publication Year: 2012, Page(s): 5
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (76 KB)

    Summary form only given. I introduce some familiar algebraic laws governing the operators of sequential and concurrent composition of designs. They can be combined with the familiar operators of propositional calculus. The resulting logic seems to apply equally to hardware design and to software design; and perhaps also to the planning of other designs and plans for behaviour that evolves in space... View full abstract»

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  • Efficient predictive analysis for detecting nondeterminism in multi-threaded programs

    Publication Year: 2012, Page(s):6 - 15
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (604 KB) | HTML iconHTML

    Determinism is often a desired property in multithreaded programs. A multi-threaded program is said to be deterministic if for a given input, different thread interleavings result in the same system state in the execution of the program. This, in turn, requires that different interleavings preserve the values read by each read operation. A related, but less strict condition is for the program to b... View full abstract»

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  • Automatic lock insertion in concurrent programs

    Publication Year: 2012, Page(s):16 - 23
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (230 KB) | HTML iconHTML

    Triggering errors in concurrent programs is a notoriously difficult task. A key reason for this is the behavioral complexity resulting from the large number of interleavings of operations of different threads. An even more challenging task is fixing errors once they are detected. In general, automatically synthesizing a correct program from a buggy one is a hard problem. However for simple correct... View full abstract»

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  • Multi-pushdown systems with budgets

    Publication Year: 2012, Page(s):24 - 33
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (205 KB) | HTML iconHTML

    We address the verification problem for concurrent programs modeled as multi-pushdown systems (MPDS). In general, MPDS are Turing powerful and hence come along with undecidability of all basic decision problems. Because of this, several subclasses of MPDS have been proposed and studied in the literature [1]-[4]. In this paper, we propose the class of bounded-budget MPDS where we restrict them in t... View full abstract»

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  • Quantifier elimination by Dependency Sequents

    Publication Year: 2012, Page(s):34 - 43
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (256 KB) | HTML iconHTML

    We consider the problem of existential quantifier elimination for Boolean CNF formulas. We present a new method for solving this problem called Derivation of Dependency-Sequents (DDS). A Dependency-sequent (D-sequent) is used to record that a set of quantified variables is redundant under a partial assignment. We introduce the join operation that produces new D-sequents from existing ones. We show... View full abstract»

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  • Preprocessing techniques for first-order clausification

    Publication Year: 2012, Page(s):44 - 51
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (189 KB) | HTML iconHTML

    It is well known that preprocessing is crucial for efficient reasoning on large industrial problems. Although preprocessing is well developed for propositional logic, it is much less investigated for first-order logic. In this paper we introduce several preprocessing techniques for simplifying firstorder formulas aimed at improving clausification. These include definition inlining and merging, sim... View full abstract»

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  • A liveness checking algorithm that counts

    Publication Year: 2012, Page(s):52 - 59
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (267 KB) | HTML iconHTML

    We present a simple but novel algorithm for checking liveness properties of finite-state systems, called k-Liveness, which is based on counting and bounding the number of times a fairness constraint can become true. Our implementation of the algorithm is completely SAT-based, works fairly well in practice, and is competitive in performance with alternative methods. In addition, we present a pre-pr... View full abstract»

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  • A formal model of a large memory that supports efficient execution

    Publication Year: 2012, Page(s):60 - 67
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (309 KB) | HTML iconHTML

    The validation and application of formal processor models benefits fundamentally from both efficient execution and automated reasoning about the models. We present a memory model written in the ACL2 logic, with both reasoning support and a runtime environment, that accomplishes these objectives. Our memory model provides a space-efficient implementation for an address space of 248 bytes... View full abstract»

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  • Verification with small and short worlds

    Publication Year: 2012, Page(s):68 - 77
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (296 KB) | HTML iconHTML

    We consider the verification of safety properties in systems with large arrays and data structures. Such systems are common at the low levels of software stacks; examples are hypervisors and CPU emulators. The very large data structures in such systems (e.g., address-translation tables and other caches) make automated verification based on straightforward statespace exploration infeasible. We pres... View full abstract»

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  • Decompilation into logic — Improved

    Publication Year: 2012, Page(s):78 - 81
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (117 KB) | HTML iconHTML

    This paper presents improvements to a technique which aids verification of machine-code programs. This technique, called decompilation into logic, allows the verifier to only deal with tractable extracted models of the machine code rather than the concrete code itself. Our improvements make decompilation simpler, faster and more generally applicable. In particular, the new technique allows the ver... View full abstract»

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  • Complete and effective robustness checking by means of interpolation

    Publication Year: 2012, Page(s):82 - 90
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (564 KB) | HTML iconHTML

    Technology scaling continues to downscale feature sizes. As a side-effect this has some serious drawbacks, in particular increasing vulnerability of circuits against transient faults caused, e.g., by radiation. Even under malfunctions of internal components the circuit must behave as specified. Several techniques have been proposed to overcome this problem. However, the implementation of those tec... View full abstract»

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  • Symbolically synthesizing small circuits

    Publication Year: 2012, Page(s):91 - 100
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (220 KB) | HTML iconHTML

    Reactive synthesis, where a finite-state system is automatically generated from its specification, is a particularly ambitious way to engineer correct-by-construction systems. In this paper, we propose implementation-extraction based on computational learning of Boolean functions as a final synthesis step in order to obtain small and fast circuits for realizable specifications in a symbolic way. O... View full abstract»

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  • Automated debugging of missing input constraints in a formal verification environment

    Publication Year: 2012, Page(s):101 - 105
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (236 KB) | HTML iconHTML

    In the past decade, formal tools have increased functional verification efficiency by exhaustively searching for hard to find bugs. Often the counter-examples returned are not due to design bugs but due to missing constraints that are needed to model the surrounding environment. These types of false positives have become a great concern in the industry today. To address this issue, input constrain... View full abstract»

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  • Algorithms for software model checking: Predicate abstraction vs. Impact

    Publication Year: 2012, Page(s):106 - 113
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (233 KB) | HTML iconHTML

    CEGAR, SMT solving, and Craig interpolation are successful approaches for software model checking. We compare two of the most important algorithms that are based on these techniques: lazy predicate abstraction (as in Blast) and lazy abstraction with interpolants (as in Impact). We unify the algorithms formally (by expressing both in the CPA framework) as well as in practice (by implementing them i... View full abstract»

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  • Incremental upgrade checking by means of interpolation-based function summaries

    Publication Year: 2012, Page(s):114 - 121
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (170 KB) | HTML iconHTML

    During its evolution, a typical software/hardware design undergoes a myriad of small changes. However, it is extremely costly to verify each new version from scratch. As a remedy to this problem, we propose to use function summaries to enable incremental verification of the evolving systems. During the evolution, our approach maintains function summaries derived using Craig's interpolation. For ea... View full abstract»

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  • Verification of parametric system designs

    Publication Year: 2012, Page(s):122 - 130
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (224 KB) | HTML iconHTML

    System designs are often modeled as sets of threads whose activations are controlled by a domain-specific scheduler. Especially in the early design phases, the interactions between the threads and the scheduler often depend on parameters (such as the duration of thread suspensions) for which a value is not available. In this paper, we tackle the verification of designs with parametric scheduler-th... View full abstract»

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  • Deciding floating-point logic with systematic abstraction

    Publication Year: 2012, Page(s):131 - 140
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (615 KB) | HTML iconHTML

    We present a bit-precise decision procedure for the theory of binary floating-point arithmetic. The core of our approach is a non-trivial generalisation of the conflict analysis algorithm used in modern SAT solvers to lattice-based abstractions. Existing complete solvers for floating-point arithmetic employ bit-vector encodings. Propositional solvers based on the Conflict Driven Clause Learning (C... View full abstract»

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