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# 1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)

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Displaying Results 1 - 25 of 256
• ### 1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)

Publication Year: 1998
| PDF (879 KB)
• ### IC manufacturing options to break the cost/performance bottleneck

Publication Year: 1998
| | PDF (36 KB)

Summary form only given, as follows. With the IC industry projected to grow to $273 billion by the year 2000 and worldwide electronic production to$1 trillion in the same period, the author discusses the macroeconomics and demographic trends that will sustain this growth. Applications, opportunity drivers and production are all discussed, by region. The Semiconductor Industry Association's Nation... View full abstract»

• ### Metal-polymer interfaces

Publication Year: 1998
Cited by:  Papers (1)
| | PDF (49 KB)

Summary form only given, as follows. The increasing application of polymers in microelectronics has aroused much interest in metal-polymer interfaces. In this talk it is reviewed how structure and formation of metal-polymer interfaces are controlled by the preparation process and the nature of the materials involved. Emphasis is put on noble metal deposition onto fully cured polyimides and polycar... View full abstract»

• ### Electromigration mechanisms in Cu lines

Publication Year: 1998
Cited by:  Papers (1)
| | PDF (42 KB)

Summary form only given. The electromigration in 0.15 /spl mu/m to 10 /spl mu/m wide and 0.3 /spl mu/m thick Cu lines deposited by physical vapor deposition has been investigated using both resistance and edge displacement techniques in the sample temperature range 225/spl deg/C-405/spl deg/C. For wide polycrystalline lines (>1 /spl mu/m), the dominant diffusion mechanism is a mixture of grain bou... View full abstract»

• ### A VLSI design of a pipeline FFT in GF(256)

Publication Year: 1998, Page(s):373 - 376
| | PDF (202 KB)

A pipeline VLSI design of FFT based on Good-Thomas algorithm is presented. To implement FFT with 255 points in GF(256), this design only needs 60 eight bits galois multipliers, a ROM to store 30 twiddles and some registers. The latency is 255+17 clock cycles, and the maximum combination delay is the sum of one multiplier in GF(256) and four stage XOR gates. This design is modular, regular, simple ... View full abstract»

• ### Discussion on the low-power CMOS latches and flip-flops

Publication Year: 1998, Page(s):477 - 480
Cited by:  Papers (1)
| | PDF (244 KB)

Latches and flip-flops used in low power circuits are discussed in this paper. Two kinds of latches of 5-T and 4-T are evolved from the standard 8-T static latch for low power application. Simulation results show that the 4-T latch has the lowest power consumption with no speed penalty. The 4-T latch is usually considered as dynamic. However, detailed analysis shows that it may be static under cer... View full abstract»

• ### Microstructure and fatigue resistance of solder interfaces

Publication Year: 1998
| | PDF (70 KB)

Summary form only given. The relationship between microstructure and fatigue resistance of solder interfaces was studied by examining micromechanisms and micromechanics of fatigue crack growth along a series of model interfaces. While the fatigue crack was seen to prefer staying in the solder when propagating at high rates, interfacial crack sliding was predominant in the near-threshold regime. A ... View full abstract»

• ### Nanocalorimetry measurements of materials having small dimensions

Publication Year: 1998
| | PDF (39 KB)

Summary form only given. The trend in microelectronic technology is toward nanometer size scales. Thermodynamic properties of material having small nanometer dimensions can be considerably different as compared to material in bulk form (e.g., the reduction of melting point). This occurs because of the tremendous influence of the surface energy. Calorimetry is the standard experimental technique us... View full abstract»

• ### Lead zirconate titanate thin films on GaAs for microwave device applications

Publication Year: 1998
Cited by:  Papers (2)  |  Patents (1)
| | PDF (52 KB)

Summary form only given. Bulk Acoustic Wave (BAW) resonant devices based on quartz crystals are widely used in electronic systems at frequencies up to a few tens of MHz. However for operation at higher frequencies the crystal must be made much thinner and consequently-ceases to be mechanically self supporting. Similarly, Surface Acoustic Wave (SAW) device dimensions shrink at high frequencies requ... View full abstract»

• ### Heat conduction in low-dimensional structures

Publication Year: 1998
| | PDF (329 KB)

Summary form only given, as follows: Understanding phonon heat conduction mechanisms in low-dimensional structures is of great interest for thermoelectric and microelectronic applications. In this paper, we discuss modeling and experimental results for heat conduction in 2-D and 1-D systems. For 2-D systems, models based on solving the phonon Boltzmann transport equation are developed for heat con... View full abstract»

• ### Discussion on the optical-coupling in silicon optical-type micromechanical sensors

Publication Year: 1998, Page(s):953 - 956
| | PDF (172 KB)

A flow-sensor and a resonator are fabricated on silicon substrate using the micromechanical technology. The devices are with a structure based on a silicon cantilever with waveguide on the surface to detect the movement of the silicon cantilever. The method to couple the laser into the waveguide is discussed and the performance of the fabricated devices are characterized. View full abstract»

• ### Author index

Publication Year: 1998, Page(s):962 - 973
| PDF (348 KB)
• ### Design of a high speed 12-bit subranging A/D converter

Publication Year: 1998, Page(s):389 - 392
Cited by:  Patents (1)
| | PDF (212 KB)

A high-speed 12-bit subranging analog-to-digital converter (ADC) is presented in the paper. Adapted in the circuit is a 3-stage subranging architecture of “3-bit+3-bit+8-bit”, in which the 8-bit ADC is a folding and interpolating ADC, and the error correction is accomplished by analog correction and digital encoding. For fabrication techniques, the 2 μm design rule, polysilicon-gate... View full abstract»

• ### A method to improve field alignment registration accuracy in VLSI lithography

Publication Year: 1998, Page(s):109 - 112
| | PDF (216 KB)

A method which put some base marks onto a wafer prior to the first layer exposure to improve the registration accuracy of a field alignment lithographic system like Ultratech 1500 stepper has been introduced. The method can avoid a production disaster which may seriously affect the package yield and provide a high device yield, similar to the average yield of conventional processed lots View full abstract»

• ### Optimization of analog modeling and simulation

Publication Year: 1998, Page(s):385 - 388
Cited by:  Papers (1)  |  Patents (1)
| | PDF (192 KB)

In this paper a comprehensive method of analog modeling and simulation is given, in which models at different hierarchy levels are used in an optimized combination. To meet the conflicting requirements of simulation efficiency and accuracy, analog HDL is used as the bridge between high level behavioral models and low level transistor models. In this way both requirements are satisfied. A 5th order... View full abstract»

• ### Exposure of PMMA with STM under ambient condition

Publication Year: 1998, Page(s):106 - 108
| | PDF (156 KB)

The development of quantum electronics depends mainly on the development of nano-processing. STM is a powerful tool for nano-processing. Before, the exposure of PMMA with STM could only be done in ultra high vacuum. The problem for exposure of PMMA under ambient conditions is the instability of the tip at tunnel conditions. We used two measures to attack the problem: (1) We adopted a special proce... View full abstract»

• ### Advanced silver metallization for ULSI applications

Publication Year: 1998, Page(s):202 - 205
| | PDF (180 KB)

In an attempt to make Ag-metallization more compatible with current IC manufacturing, we have successfully dry-etched Ag in oxygen plasma. The metallisation system uses an Ag/Ti/SiO2 stack structure View full abstract»

• ### Speed performance evaluation of SOI CMOS ring oscillators

Publication Year: 1998, Page(s):738 - 740
Cited by:  Papers (1)
| | PDF (132 KB)

Ring oscillators are used to evaluate the speed performance of SOI CMOS circuits. The design and fabrication of SOI CMOS ring oscillators is reported. The dependence of propagation delay time of ring oscillators on device design parameters is discussed View full abstract»

• ### Analog VLSI parameter fault diagnosis via neural network

Publication Year: 1998, Page(s):381 - 384
Cited by:  Papers (1)
| | PDF (148 KB)

A new method for analog integrated circuit fault parameter diagnosis is presented in this paper. It is based on neural network theory and has several advantages over normal methods. The method is applied to several examples and it works very well View full abstract»

• ### Low-ohmic contacts by excimer laser annealing of implanted polysilicon

Publication Year: 1998, Page(s):102 - 105
| | PDF (216 KB)

High power excimer laser annealing is used to activate dopants implanted in polysilicon layers. Sheet resistances as low os 50 Ω/□ are achieved for thin polysilicon layers on oxide, and low ohmic contacts have been produced to implanted junctions elevated by a polysilicon layer. The influence of the thickness of either the poly or the underlying oxide is evaluated View full abstract»

• ### Technologies for high performance CMOS active pixel imaging system-on-a-chip

Publication Year: 1998, Page(s):180 - 183
Cited by:  Papers (1)
| | PDF (260 KB)

Active pixel sensors (APS) based on CMOS technology challenges CCD image sensors in many aspects for high performance imaging systems, such as, low-voltage operation, low-power consumption, random image access, highly integrated functionality, high resolution, fast readout, CMOS compatible fabrication and low cost. In this paper various active CMOS pixel designs and circuit components for high per... View full abstract»

• ### Electro-chemical deposition technology for ULSI multilevel copper interconnects

Publication Year: 1998, Page(s):198 - 201
| | PDF (228 KB)

Copper is a promising candidate to replace aluminum for better conductivity, reliability as well as lower cost. A new electrochemical copper deposition (ECD) process has been developed for the manufacturing of ULSI damascened, or in-laid, Cu interconnects. The new Cu ECD process-is designed for filling trenches and vias with high aspect ratio (AR) conductor structures for 0.25 um device generation... View full abstract»

• ### Laterally capacity sensed accelerometer fabricated with the anodic bonding and the high aspect ratio etching

Publication Year: 1998, Page(s):921 - 924
Cited by:  Papers (3)  |  Patents (5)
| | PDF (92 KB)

This paper presents a new kind of laterally capacity sensed accelerometer fabricated with silicon/glass anodic bonding and the ICP (Induced Coupled Plasma) high aspect ratio etching. The detailed testing from -1g to +1g (1g represents one acceleration of gravity) shows quite good performance View full abstract»

• ### Technique and instrument for the characterization of deep traps in GaAs MESFET structures

Publication Year: 1998, Page(s):668 - 669
| | PDF (128 KB)

The effective concentration of vacant deep traps in the buffer layer and substrate of a GaAs MESFET structure governs the overall effect of these traps on the MESFET performance. The onset of emptying of the deep traps at the layer-layer interfaces is responsible for the rising portion of the low-frequency capacitance-voltage characteristic. A low-frequency capacitance-voltage technique, which use... View full abstract»

• ### Structural and optical changes in GaAs/InAs/GaAs structure induced by thermal annealing

Publication Year: 1998, Page(s):641 - 644
| | PDF (164 KB)

Self-organized InAs quantum dots sheets are grown on an GaAs(100) substrate and capped by 80 nm GaAs layer with molecular beam epitaxy. Samples were annealed and characterized with Raman spectra, transmission electron microscopy (TEM) and photoluminescence (PL). The Raman spectra indicates arsenic clusters in the GaAs capping layer. The TEM analysis revealed the relaxation of strain in some InAs i... View full abstract»