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Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2012 IEEE

Date Sept. 30 2012-Oct. 3 2012

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  • Call for papers

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  • Author index

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  • Table of contents

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  • Sponsors

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  • Welcome

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  • Characteristics of GaAs spike doped collectors

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (436 KB) |  | HTML iconHTML  

    Spike-doped collector designs have recently been studied in both Si BJT and GaAs HBTs as a way to improve the device linearity while still maintaining ruggedness. In this work, we present and discuss - for the first time - the very interesting output characteristics of these devices (unique Ic-Vce curves) and how they are influenced by the device design. We also explore the improvement in cut-off frequency versus current and application of these devices to actual power amplifiers and the resulting changes in ruggedness. View full abstract»

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  • Design and analysis of new silicided nano crystal dots field programmable ESD protection structures in BiCMOS

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (430 KB) |  | HTML iconHTML  

    This paper discusses design and analysis of new nano crystal quantum dot (NC-QD) based field programmable electrostatic discharge (ESD) protection structures. Prototype NC-QD ESD structures were verified experimentally, achieving a wide ESD triggering voltage tuning range of 2.5V, very fast response time of ~100pS, ESD protection level of 25mA/μm in human body model (HBM) and 400mA/μm in charged device model (CDM), and very low leakage current of Ileak~15pA. View full abstract»

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  • Examination of Horizontal Current Bipolar Transistor (HCBT) with double and single polysilicon region

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1170 KB) |  | HTML iconHTML  

    Horizontal Current Bipolar Transistor (HCBT) with implanted n+ collector (single-poly HCBT) has a higher fT and fmax by 50 % and 36%, respectively, comparing to HCBT with polysilicon n+ collector (double-poly HCBT). The physical mechanisms responsible for the improvement of fT and fmax of single-poly HCBT are examined by the measurements of transistors, test structures and by simulations. Besides the current crowding effect, it is shown that RC dominantly limits fT in double-poly HCBT. The dominant component of RC is identified to be the resistance of the interface oxide between the n+ polysilicon and the n-hill collector regions. View full abstract»

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  • Impact of the emitter stored charge on RF noise of junction bipolar transistors

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (263 KB) |  | HTML iconHTML  

    In this paper a new noise model is presented which accounts for the effect of the emitter stored charge on the RF noise behavior of bipolar junction transistors. The model is derived combining the general Van Vliet noise model for bipolar transistors and the non-quasi-static (NQS) theory in quasi-neutral base and emitter regions. Model equations are then interpreted with the help of a small-signal equivalent circuit of a bipolar transistor which includes additional circuit elements in order to take the NQS effects in the base and in the emitter into account. It is shown finally that the emitter diffusion charge can have a considerable impact on the noise FOM's of bipolar transistors, compared to the impact of the NQS effects in the quasi-neutral base region. View full abstract»

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  • High speed op amps: Performance, process and topologies

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (276 KB) |  | HTML iconHTML  

    Complementary bipolar processes developed in the mid 1980's allowed the development of integrated circuit operational amplifiers with bandwidths over 50MHz [1]. In the early 1990's, complementary bipolar processes implemented on SOI extended the attainable bandwidth to 1GHz. In the new millennium, SOI processes incorporating SiGe heterojunction transistors are used to produce IC op amps with bandwidths to nearly 10GHz. Industry trends towards lower supply voltages have made low voltage design techniques increasingly important. Class A/B circuit techniques exploiting complementarity have enhanced slew and distortion performance versus supply current. The demand for low supply voltage operation and differential signal processing has driven the development of differential amplifier topologies. View full abstract»

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  • A circuit-based approach for the compensation of self-heating-induced timing errors in bipolar comparators

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (405 KB) |  | HTML iconHTML  

    Self-heating effects in bipolar comparators manifest themselves as signal-dependent output transition timing variation. A circuit-based approach for the compensation of these effects is presented here. A comparator circuit utilizing the proposed compensation scheme has been designed, and simulation results comparing the timing accuracy of this comparator to that of an uncompensated comparator and of a comparator employing simplified compensation scheme are presented. View full abstract»

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  • SFDR considerations for current steering high-speed digital to analog converters

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (185 KB) |  | HTML iconHTML  

    In this paper the spurious free dynamic range (SFDR) of a current steering digital-to-analog converter (DAC) is related to the process parameters used for its implementation. It is shown that the realization of such DACs in advanced processes provides power and area reduction combined with faster signaling. However, it is very challenging to improve the SFDR at a certain given output swing and sampling frequency. It is demonstrated that the SFDR can be doubled by using an optimized cascode switch. It is also concluded that compared to MOSFET based approaches higher sampling frequencies can be achieved by bipolar transistor based DACs if the SFDR and transition frequency are fixed. The reason is the higher Early voltage of bipolar transistors. View full abstract»

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  • From the future to the mainstream, has GaAs reliability finally come of age?

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (321 KB) |  | HTML iconHTML  

    Compound semiconductor circuits are flourishing in high volume production which has been expected and predicted for several years. As these GaAs circuits become more widely considered for use in applications of various electronic systems, instruments, and devices, questions regarding reliability arise. View full abstract»

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  • Long-term reliability of high-performance SiGe:C heterojunction bipolar transistors

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (807 KB) |  | HTML iconHTML  

    The reliability of high-performance SiGe:C HBTs was studied under mixed-mode stress conditions. We applied much longer stress-times than previous investigations and observed a not yet described saturation of the base current degradation with stress-time. This saturation behavior was integrated into an ageing function enabling improved prediction of HBT and RF circuit ageing during a 10 year life-time frame. Additionally, reverse stress tests confirmed also an increase of the baseemitter capacitance. View full abstract»

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  • Considerations for forward active mode reliability in an advanced hetero-junction bipolar transistor

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1690 KB) |  | HTML iconHTML  

    The implementation of safe operating area (SOA) is discussed in this paper to quantify electrical, thermal, and Hot Carrier (HC) limits for a SiGe hetero-junction bipolar transistor (HBT) in a forward active mode. An electrical limit should be constructed to prevent an unexpected catastrophic failure at a circuit level considering impedance to the base node of HBTs simultaneously affected by current and voltage, unlike an individual HBT measured by parameter analyzers. Also, an investigation of the critical parameter degradation such as Beta is observed in a full range of active mode, calculating the maximum tolerable current, bias, and power relative to the performance of a HBT. We demonstrate the unique behavior of current dependence of Beta degradation by a simulation of impact ionization location and rate, accompanied by Kirk effect. In addition, we associate a 1/VBC model for time-to-fail (TTF) extrapolated into the use condition compared to a conventional VBC model. View full abstract»

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  • On-die self-healing of mixer image-rejection ratio for mixed-signal electronic systems

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (797 KB) |  | HTML iconHTML  

    An integrated wideband (6-20 GHz) image-reject mixer and test signal source for "self-healing" of image-rejection ratio (IRR) is demonstrated for the first time. The mixer can be adapted to deliver consistent performance over process variations, environmental changes, and/or aging effects. An IRR of over 36 dB is obtained in measurement for a wide range of IF frequencies. The healing is achieved by means of an automated procedure controlled by MATLAB algorithms. The test signal source consists of an on-die wideband differential ring oscillator with an amplitude-control mechanism to provide a 20 dB range of adjustable power at the input of the mixer. The circuits were fabricated in a commercially-available 180 nm SiGe BiCMOS platform. View full abstract»

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  • Best practices to ensure the stability of sige HBT cascode low noise amplifiers

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (872 KB) |  | HTML iconHTML  

    This work provides a detailed examination of the stability of SiGe cascode low noise amplifiers (LNAs). The upper base is identified as a problematic node for stability. S-probe simulations are used to extract reflection coefficients internal to the circuit and provide insight on how to improve the stability of a cascode amplifier and thereby establish “best practices” for designers. These techniques are incorporated into a cascode LNA design fabricated on a 180 nm, 150 GHz fT SiGe BiCMOS technology. The measured SiGe LNA has a gain of 16.5 dB and a noise figure of 2.1 dB at a center frequency of 9.2 GHz. A series of measurements using tuners at both the input and output confirm the LNA is stable for all impedances covered by the tuners (|Γ| <; 0.8). View full abstract»

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  • A V-band Differential SiGe VCO with varactor-less tuning

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (643 KB) |  | HTML iconHTML  

    A SiGe V-band voltage-controlled oscillator (VCO) with varactor-less tuning is presented. The frequency tuning of the VCO is accomplished using the CCB capacitance of the core transistors themselves. Removing the varactors within the VCO is particularly useful for millimeter-wave applications since varactors significantly degrade the quality factor of the resonator within the VCO and consequently the phase noise. This VCO utilizes a differential cross-coupled topology. The 67 GHz VCO was implemented in a commercial 180 nm SiGe BiCMOS platform and achieves a 6.7% tuning range and 0.3 dBm differential output power. The VCO achieves -90 dBC/Hz phase noise at 1 MHz offset from the 67 GHz signal. View full abstract»

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  • A low phase noise Colpitts VCO for Ku-band applications

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (668 KB) |  | HTML iconHTML  

    A 12.74 GHz low phase noise Colpitts VCO has been designed and fabricated in a 0.25μm SiGe:C BiCMOS technology. The balanced VCO uses a transformer coupled tank and two additional inductors to reduce the current in the feedback loop. The efficiency of energy transfer from active devices to the tank has been improved by these two methods, which leads to a larger output swing for the same DC current. Measured phase noise is better than -100dBc /Hz at 100 kHz offset over the tuning range from 12.43 to 13.08GHz. View full abstract»

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  • Temperature and geometry dependence of the electrothermal instability of bipolar transistors

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (207 KB) |  | HTML iconHTML  

    We present an extensive investigation into the temperature and geometry dependence of the electrothermal instability of bipolar transistors. It is shown that the stable operating region increases with decreasing transistor size, which is explained by the geometry dependence of the thermal and base resistances. Next, data taken over a large range of temperatures (-40 to 150 oC) are analyzed. It is shown that, for the technology at hand, an additional margin of ~1V above BVCEO is present for the full temperature range. Moreover, it is shown that the temperature-dependent data can be reduced to a single `master curve' by plotting the instability point versus the collector current at VCB =0 V. This leads to a simple rule-of-thumb that can be used by circuit designers to estimate the limit of stable operation at all temperatures. View full abstract»

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  • Modeling collector current noise PSD of SiGe HBTs including self-heating and non-quasi-static effects

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (305 KB) |  | HTML iconHTML  

    Limitations of existing models for collector current noise power spectral density of silicon germanium heterojunction bipolar transistors are figured out and suitable model modifications are proposed based on non-quasi-static delay and self-heating effects. Modeling results show excellent agreement with device simulated data obtained using hydrodynamic technique. View full abstract»

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  • Characterization of mutual heating inside a SiGe ring oscillator

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (474 KB) |  | HTML iconHTML  

    This paper reports on the electrical and thermal characterization of a state of the art SiGe ring oscillator (RO) with 2.2 ps gate delay fabricated in a Si/SiGe:C technology featuring fT and fmax of ~300 GHz and ~400 GHz, respectively. The transistor model is verified through DC and RF characteristics taken from the same die as the circuit measurements. Excellent agreement between measurements and compact model simulation is shown. A simple method is presented that calculates the nonlinear circuit temperature rise in the local circuit area resulting from mutual heating of all active and passive components. Once taken into account the circuit temperature, the accuracy of circuit simulation is significantly improved. View full abstract»

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  • Dynamic electrothermal analysis of bipolar devices and circuits relying on multi-port positive fraction Foster representation

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (284 KB) |  | HTML iconHTML  

    In this paper, a novel multi-port RC network is proposed to describe the dynamic thermal feedback in bipolar devices/circuits with multiple heat sources. The parameters of the circuit can be reliably identified by standard electrical macro-modeling techniques. The representation is shown to be more compact than the usual Foster topology due to the limited number of dynamic elements. The approach is successfully applied to predict thermally-triggered hogging phenomena in basic bipolar differential amplifiers subject to considerable thermal effects. View full abstract»

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  • A SiGe BiCMOS cascode power amplifier with monolithic SOI envelope modulators for high-efficiency envelope tracking

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (740 KB) |  | HTML iconHTML  

    In this paper, a fully differential cascode power amplifier (PA) is designed and fabricated using a 0.35-μm SiGe BiCMOS process. In the continuous wave (CW) measurement, the PA achieves a saturated power (PSAT) of 24.8 dBm at 3.3 V with power-added-efficiency (PAE) above 50% at 2.3 GHz. Two monolithic envelope modulators (EMs) are designed in a 0.18-μm SOI CMOS technology using a switching buck converter stage with two different linear amplifier topologies: a low-dropout (LDO) regulator vs. a conventional class AB Op-Amp. The envelope tracking PA (ET-PA) systems are measured for maximum linear POUT and efficiency with corresponding design trade-offs discussed. The conventional class AB Op-Amp based EM proved better combined efficiency /linearity at 20 dBm POUT with 30% PAE using an LTE 16QAM 5 MHz signal for our assessment. View full abstract»

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  • Innovative architectures for advanced handset power amplifier performance

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1405 KB) |  | HTML iconHTML  

    This paper describes the development of a new innovative low-band RF power amplifier for cellular handsets. The amplifier module is realized in a compact 3×3×1 mm3 package, yet is load insensitive and has excellent performance characteristics. The small size was achieved through a number of design innovations. The active die was implemented on a high-performance biHEMT process, which comprises E and D-mode pHEMT FETS with HBT bipolar transistors. This enabled a highlevel on on-chip integration. For the quadrature combiner a new circuit was developed which is very compact compared to classic architectures and has low insertion loss. Likewise, a high-performance compact on-die four-port quadrature splitter was developed for the interstage. The latter was smaller than previous solutions with improved performance. In a further innovation, the output harmonic terminations, bias chokes and combiner were implemented on an Integrated Passive Device (IPD) process for reasons of size and cost. The GaAs and IPD die were both Cu bump flip-chip mounted bringing advantages in size, cost, and device yield. Cost and performance variability were reduced as no critical RF functions were included in the laminate. View full abstract»

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