2012 IEEE 20th Annual Symposium on High-Performance Interconnects

22-24 Aug. 2012

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  • [Cover art]

    Publication Year: 2012, Page(s): C4
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  • [Title page i]

    Publication Year: 2012, Page(s): i
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  • [Title page iii]

    Publication Year: 2012, Page(s): iii
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  • [Copyright notice]

    Publication Year: 2012, Page(s): iv
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  • Table of contents

    Publication Year: 2012, Page(s):v - vi
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  • Message from the General Co-chairs

    Publication Year: 2012, Page(s):vii - viii
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  • Message from the Technical Program Committee Chair

    Publication Year: 2012, Page(s):ix - x
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  • Organizing Committee

    Publication Year: 2012, Page(s): xi
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  • Technical Program Committee Members

    Publication Year: 2012, Page(s): xii
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  • Steering Committee

    Publication Year: 2012, Page(s): xiii
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  • Reviewers

    Publication Year: 2012, Page(s): xiv
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  • Keynotes - HOTI 2012 [four abstracts]

    Publication Year: 2012, Page(s):xv - xix
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (108 KB)

    Provides an abstract for each of the four keynote presentations and a brief professional biography of each presenter. View full abstract»

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  • Invited Talks - HOTI 2012 [three abstracts]

    Publication Year: 2012, Page(s): xx
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (69 KB)

    Summary form only given. The keynote is not provided, neither is an abstract. Only the author's professional biography is given. View full abstract»

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  • Panels - HOTI 2012 [two panel session listings]

    Publication Year: 2012, Page(s):xxi - xxii
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  • Tutorials - HOTI 2012

    Publication Year: 2012, Page(s):xxiii - xxviii
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (100 KB)

    This keynotes discusses the following: Hands-on Tutorial on Software-Defined Networking; Interconnection Networks for Cloud Data Centers; Designing Scientific, Enterprise, and Cloud Computing Systems with InfiniBand and High-Speed Ethernet: Current Status and Trends; The Evolution of Network Architecture towards CloudCentric Applications. View full abstract»

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  • ParaSplit: A Scalable Architecture on FPGA for Terabit Packet Classification

    Publication Year: 2012, Page(s):1 - 8
    Cited by:  Papers (15)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (392 KB) | HTML iconHTML

    Packet classification is a fundamental enabling function for various applications in switches, routers and firewalls. Due to their performance and scalability limitations, current packet classification solutions are insufficient in ad-dressing the challenges from the growing network bandwidth and the increasing number of new applications. This paper presents a scalable parallel architecture, named... View full abstract»

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  • A Low-Latency Library in FPGA Hardware for High-Frequency Trading (HFT)

    Publication Year: 2012, Page(s):9 - 16
    Cited by:  Papers (18)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (480 KB) | HTML iconHTML

    Current High-Frequency Trading (HFT) platforms are typically implemented in software on computers with high-performance network adapters. The high and unpredictable latency of these systems has led the trading world to explore alternative "hybrid" architectures with hardware acceleration. In this paper, we survey existing solutions and describe how FPGAs are being used in electronic trading to app... View full abstract»

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  • Rx Stack Accelerator for 10 GbE Integrated NIC

    Publication Year: 2012, Page(s):17 - 24
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (390 KB) | HTML iconHTML

    The miniaturization of CMOS technology has reached a scale at which server processors are starting to integrate multi-gigabit network interface controllers (NIC). While transistors are becoming cheap and abundant in solid-state circuits, they remain at a premium on a processor die if they do not contribute to increase the number of cores and caches. Therefore, an integrated NIC (iNIC) must provide... View full abstract»

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  • Caliper: Precise and Responsive Traffic Generator

    Publication Year: 2012, Page(s):25 - 32
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (269 KB) | HTML iconHTML

    This paper presents Caliper, a highly-accurate packet injection tool that generates precise and responsive traffic. Caliper takes live packets generated on a host computer and transmits them onto a gigabit Ethernet network with precise inter-transmission times. Existing software traffic generators rely on generic Network Interface Cards which, as we demonstrate, do not provide high-precision timin... View full abstract»

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  • Weighted Differential Scheduler

    Publication Year: 2012, Page(s):33 - 39
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB) | HTML iconHTML

    The Weighted Differential Scheduler (WDS) is a new scheduling discipline for accessing shared resources. The work described here was motivated by the need for a simple weighted scheduler for a network switch where multiple packet flows are competing for an output port. The scheme can be implemented with simple arithmetic logic and finite state machines. We are describing several versions of WDS th... View full abstract»

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  • Performance Evaluation of Open MPI on Cray XE/XK Systems

    Publication Year: 2012, Page(s):40 - 47
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (388 KB) | HTML iconHTML

    Open MPI is a widely used open-source implementation of the MPI-2 standard that supports a variety of platforms and interconnects. Current versions of Open MPI, however, lack support for the Cray XE6 and XK6 architectures -- both of which use the Gemini System Interconnect. In this paper, we present extensions to natively support these architectures within Open MPI, describe and propose solutions ... View full abstract»

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  • Performance Analysis and Evaluation of InfiniBand FDR and 40GigE RoCE on HPC and Cloud Computing Systems

    Publication Year: 2012, Page(s):48 - 55
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (530 KB) | HTML iconHTML

    Communication interfaces of high performance computing (HPC) systems and clouds have been continually evolving to meet the ever increasing communication demands being placed on them by HPC applications and cloud computing middleware (e.g., Hadoop). The PCIe interfaces can now deliver speeds up to 128 Gbps (Gen3) and high performance interconnects (10/40 GigE, InfiniBand 32 Gbps QDR, InfiniBand 54 ... View full abstract»

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  • Bufferless Routing in Optical Gaussian Macrochip Interconnect

    Publication Year: 2012, Page(s):56 - 63
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (233 KB) | HTML iconHTML

    In optical multichip system, called Gaussian macro chip, where embedded chips are interconnected by an optical Gaussian network. By taking advantage of the underlying Hamiltonian cycles in the Gaussian network, we design a buffer less routing algorithm for the Gaussian macro chip, which routes packets along the shortest path in the absence of deflection, and guarantees that deflected packets reach... View full abstract»

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  • Occupancy Sampling for Terabit CEE Switches

    Publication Year: 2012, Page(s):64 - 71
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (662 KB) | HTML iconHTML

    One consequential feature of Converged Enhanced Ethernet (CEE) is loss lessness, achieved through L2 Priority Flow Control (PFC) and Quantized Congestion Notification (QCN). We focus on QCN and its effectiveness in identifying congestive flows in input-buffered CEE switches. QCN assumes an idealized, output-queued switch, however, as future switches scale to higher port counts and link speeds, pur... View full abstract»

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  • Author index

    Publication Year: 2012, Page(s): 72
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