Date Jan. 31 2012-Feb. 2 2012
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Displaying Results 1 - 25 of 109
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Preface
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PDF (31 KB)
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Electrical, thermal and mechanical impact of 3D TSV and 3D stacking technology on advanced CMOS devices — Technology directions
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PDF (315 KB)
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Low temperature bonding for 3D interconnects
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PDF (443 KB)
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Ultrathin wafer handling in 3D Stacked IC manufacturing combining a novel ZoneBOND™ temporary bonding process with room temperature peel debonding
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PDF (838 KB)
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3D stacking using Cu-Cu direct bonding
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PDF (307 KB)
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TSV process solution for 3D-IC
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PDF (879 KB)
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Study on high performance and productivity of TSV's with new filling method and alloy for advanced 3D-SiP
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PDF (571 KB)
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Comparative study of side-wall roughness effects on leakage currents in through-silicon via interconnects
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PDF (1405 KB)
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Wafer-level 3D integration with Cu TSV and micro-bump/adhesive hybrid bonding technologies
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PDF (399 KB)
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Novel detachable bonding process with wettability control of bonding surface for versatile chip-level 3D integration
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PDF (752 KB)
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3D stacking using ultra thin dies
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PDF (550 KB)
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Impact of containment and deposition method on sub-micron chip-to-wafer self-assembly yield
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PDF (481 KB)
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3D integration of MEMS and CMOS via Cu-Cu bonding with simultaneous formation of electrical, mechanical and hermetic bonds
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PDF (400 KB)
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Fabrication tolerance evaluation of high efficient unidirectional optical coupler for though silicon photonic via in optoelectronic 3D-LSI
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PDF (231 KB)
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