DAC Design Automation Conference 2012

3-7 June 2012

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Displaying Results 1 - 25 of 207
  • Awards

    Publication Year: 2012, Page(s):1 - 3
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  • Executive committee

    Publication Year: 2012, Page(s):1 - 12
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  • General Chair's message

    Publication Year: 2012, Page(s):i - ii
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  • Perspective paper abstracts [3 abstracts]

    Publication Year: 2012, Page(s):1 - 2
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (240 KB)

    Summary form only given. Provides an abstract for each of the three keynote presentations and a brief professional biography of each presenter. View full abstract»

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  • [Copyright notice]

    Publication Year: 2012, Page(s): iii
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  • Reviewers

    Publication Year: 2012, Page(s):xxv - xxviii
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  • Table of contents

    Publication Year: 2012, Page(s):1 - 24
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  • Technical panel abstracts

    Publication Year: 2012, Page(s):1 - 3
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (391 KB)

    Provides an abstract for each of the panel presentations and a brief professional biography of each presenter. The complete presentations were not made available for publication as part of the conference proceedings. View full abstract»

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  • My First Design Automation Conference - 1982 [Thursday keynote address]

    Publication Year: 2012, Page(s): 1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (178 KB)

    Summary form only given, as follows. It was June 1982 that I had my first technical paper in the EDA area presented at the 19th Design Automation Conference. It was exactly 20 years after I completed my doctoral study and exactly 30 years ago from today. I would like to share with the audience how my prior educational experience prepared me to enter the EDA field and how my EDA experien... View full abstract»

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  • Scaling for 2020 Solutions [Tuesday keynote address]

    Publication Year: 2012, Page(s): 1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (130 KB)

    Summary form only given, as follows. Comparing the original ARM design of 1985 to those of today's latest microprocessors, Mike will look at how far has design come and what EDA has contributed to enabling these advances in systems, hardware, operating systems, and applications and how business models have evolved over 25 years. He will then speculate on the needs for scaling designs into solution... View full abstract»

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  • Designing High Performance Systems-on-Chip [Wednesday keynote address]

    Publication Year: 2012, Page(s):1 - 2
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (165 KB)

    Summary form only given, as follows. Experience state-of-the art design through the eyes of two experts that help shape these advanced chips! In this unique dual-keynote, the design process at two leading companies will be discussed. The speakers will cover key challenges, engineering decisions and design methodologies to achieve top performance and turn-around time. The presentations describe whe... View full abstract»

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  • Biomedical electronics serving as physical environmental and emotional watchdogs

    Publication Year: 2012, Page(s):1 - 5
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (502 KB) | HTML iconHTML

    Over forty years of happy CMOS scaling brought the room-sized super-computer for the nerds into everyone's pocket, literally connecting every-body on earth. In an economy which is based on double digit growth, the obvious next step is to connect everything on earth. This move redirects the focus from electronics-for-infotainment to electronics helping to solve the mounting societal challenges our ... View full abstract»

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  • Integrated biosensors for personalized medicine

    Publication Year: 2012, Page(s):6 - 11
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (213 KB) | HTML iconHTML

    Biosensors are heterogenous devices, incorporating biological structures combined with electronics, optical or other readout systems. They have been developed for detecting different biomolecules and/or pathogens and represent a key technology for advanced and point-of-care diagnostics as well as patient monitoring. In this paper we present a systematic classification of biosensors described in li... View full abstract»

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  • Design challenges for secure implantable medical devices

    Publication Year: 2012, Page(s):12 - 17
    Cited by:  Papers (20)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (262 KB) | HTML iconHTML

    Implantable medical devices, or IMDs, are increasingly being used to improve patients' medical outcomes. Designers of IMDs already balance safety, reliability, complexity, power consumption, and cost. However, recent research has demonstrated that designers should also consider security and data privacy to protect patients from acts of theft or malice, especially as medical technology becomes incr... View full abstract»

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  • Design of pin-constrained general-purpose digital microfluidic biochips

    Publication Year: 2012, Page(s):18 - 25
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1076 KB) | HTML iconHTML

    Digital microfluidic biochips are being increasingly used for biotechnology applications. The number of control pins used to drive electrodes is a major contributor to fabrication cost for disposable biochips in a highly cost-sensitive market. Most prior work on pin-constrained biochip design determines the mapping of a small number of control pins to a larger number of electrodes according to the... View full abstract»

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  • Path scheduling on digital microfluidic biochips

    Publication Year: 2012, Page(s):26 - 35
    Cited by:  Papers (19)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2961 KB) | HTML iconHTML

    Since the inception of digital microfluidics, the synthesis problems of scheduling, placement and routing have been performed offline (before runtime) due to their algorithmic complexity. However, with the increasing maturity of digital microfluidic research, online synthesis is becoming a realistic possibility that can bring new benefits in the areas of dynamic scheduling, control-flow, fault-tol... View full abstract»

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  • Realizing reversible circuits using a new class of quantum gates

    Publication Year: 2012, Page(s):36 - 41
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (512 KB) | HTML iconHTML

    Quantum computing offers a promising alternative to conventional computation due to the theoretical capacity to solve many important problems with exponentially less complexity. Since every quantum operation is inherently reversible, the desired function is often realized in reversible logic and then mapped to quantum gates. We consider the realization of reversible circuits using a new class of q... View full abstract»

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  • Physical synthesis onto a Sea-of-Tiles with double-gate silicon nanowire transistors

    Publication Year: 2012, Page(s):42 - 47
    Cited by:  Papers (14)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1409 KB) | HTML iconHTML

    We have designed and fabricated double-gate ambipolar field-effect transistors, which exhibit p-type and n-type characteristics by controlling the polarity of the second gate. In this work, we present an approach for designing an efficient regular layout, called Sea-of-Tiles (SoTs). First, we address gate-level routing congestion by proposing compact layout techniques and novel symbolic-layout sty... View full abstract»

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  • A semiempirical model for wakeup time estimation in power-gated logic clusters

    Publication Year: 2012, Page(s):48 - 55
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (546 KB) | HTML iconHTML

    Wakeup time is an important overhead that must be determined for effective power gating, particularly in logic clusters that undergo frequent mode transitions for run-time leakage power reduction. In this paper, a semiempirical model for virtual supply voltage in terms of basic parameters of the power-gated circuit is presented. Hence a closed-form expression for estimation of wakeup time of a pow... View full abstract»

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  • Cost-effective power delivery to support per-core voltage domains for power-constrained processors

    Publication Year: 2012, Page(s):56 - 61
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (386 KB) | HTML iconHTML

    Per-core voltage domains can improve performance under a power constraint. Most commercial processors, however, only have one chip-wide voltage domain because splitting the voltage domain into per-core voltage domains and powering them with multiple off-chip voltage regulators (VRs) incurs a high cost for the platform and package designs. Although using on-chip switching VRs can be an alternative ... View full abstract»

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  • A hybrid and adaptive model for predicting register file and SRAM power using a reference design

    Publication Year: 2012, Page(s):62 - 67
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1211 KB) | HTML iconHTML

    This paper presents a predictive SRAM power model that reduces the changes required to adapt existing models to handle new circuit topologies, process corners, and design space exploration. Analytical equations model the impact of varying common characteristics such as bit-width, entries, segmentation, gating, and sizing while topology specific characteristics are captured empirically from a refer... View full abstract»

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  • Coding-based energy minimization for Phase Change Memory

    Publication Year: 2012, Page(s):68 - 76
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (469 KB) | HTML iconHTML

    We devise new coding methods to minimize Phase Change Memory write energy. Our method minimizes the energy required for memory rewrites by utilizing the differences between PCM read, set, and reset energies. We develop an integer linear programming method and employ dynamic programming to produce codes for uniformly distributed data. We also introduce data-aware coding schemes to efficiently addre... View full abstract»

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  • A code morphing methodology to automate power analysis countermeasures

    Publication Year: 2012, Page(s):77 - 82
    Cited by:  Papers (14)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (449 KB) | HTML iconHTML

    We introduce a general framework to automate the application of countermeasures against Differential Power Attacks aimed at software implementations of cryptographic primitives. The approach enables the generation of multiple versions of the code, to prevent an attacker from recognizing the exact point in time where the observed operation is executed and how such operation is performed. The strate... View full abstract»

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  • Security analysis of logic obfuscation

    Publication Year: 2012, Page(s):83 - 89
    Cited by:  Papers (47)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3772 KB) | HTML iconHTML

    Due to globalization of Integrated Circuit (IC) design flow, rogue elements in the supply chain can pirate ICs, overbuild ICs, and insert hardware trojans. EPIC [1] obfuscates the design by randomly inserting additional gates; only a correct key makes the design to produce correct outputs. We demonstrate that an attacker can decipher the obfuscated nctlist, in a time linear to the number of keys, ... View full abstract»

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  • Hardware Trojan horse benchmark via optimal creation and placement of malicious circuitry

    Publication Year: 2012, Page(s):90 - 95
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (400 KB) | HTML iconHTML

    This paper proposes Hardware Trojan (HT) placement techniques that yield challenging HT detection benchmarks. We develop three types of one-gate HT benchmarks based on switching power, leakage power, and delay measurements that are commonly used in HT detection. In particular, we employ an iterative searching algorithm to find rarely switching locations, an aging-based approach to create ultra-low... View full abstract»

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