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[1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems

9-12 Aug. 1992

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  • Proceedings of the 35th Midwest Symposium on Circuits and Systems (Cat. No.92CH3099-9)

    Publication Year: 1992
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  • Unified VLSI lattice architectures for discrete sinusoidal transforms

    Publication Year: 1992, Page(s):286 - 298 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (851 KB)

    The problems of unified efficient computations of the discrete cosine transform (DCT), discrete sine transform (DST), discrete Hartley transform (DHT), and their inverse transforms are considered. A new scheme employing the time-recursive approach to compute these transforms is presented. Unified parallel lattice structures that can dually generate the DCT and DST simultaneously as well as the DHT... View full abstract»

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  • A determination of the best macromodel circuits for a phase-locked loop

    Publication Year: 1992, Page(s):1112 - 1115 vol.2
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (476 KB)

    Macromodel circuits designed to model the components of a phase-locked loop and intended for use with circuit simulator programs are compared and evaluated to determine those most suitable for modeling the loop time-domain performance. Macromodels considered included those for the voltage-controlled oscillator, the phase detector, the frequency divider, and the loop filter. The macromodel characte... View full abstract»

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  • An electronically adjustable bandpass filter

    Publication Year: 1992, Page(s):1116 - 1119 vol.2
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (284 KB)

    An electronically adjustable bandpass filter based on the state-variable configuration is developed such that independent control of center frequency, quality factor, and gain is achieved. Electronic tuning of these parameters is accomplished with operational transconductance amplifiers is subcircuits which simulate floating resistors. Linearity of center frequency versus control input and relativ... View full abstract»

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  • A low noise CMOS operational amplifier in a 1.2 μm digital technology

    Publication Year: 1992, Page(s):1120 - 1123 vol.2
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (392 KB)

    A low noise CMOS operational amplifier has been fabricated in a standard 1.2-μm digital technology. The op amp has a 3.0-mm2 area. The layout and fabrication are described. The design requirements of the op amp included low power consumption, low input offset voltage, a gain-bandwidth product of at least 250 kHz, a 1/f noise corner of 100 Hz or lower, a midband equivalent ... View full abstract»

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  • A topological method of class-fault diagnosis [of analog circuits]

    Publication Year: 1992, Page(s):489 - 491 vol.1
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (260 KB)

    A topological method of class-fault diagnosis of analog circuits is proposed. Certain topological classification theorems and techniques are developed. By using them, one can classify branch sets directly from the circuit configuration before test. A class-fault identification technique is also given which may uniquely determine the fault class after test. The method requires very little computati... View full abstract»

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  • The limiting performance of a CMOS bistable register based on waveform considerations

    Publication Year: 1992, Page(s):130 - 133 vol.1
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (304 KB)

    Closed-form solutions describing the output response of a CMOS bistable register are presented. From these results, the fundamental latching behavior of a CMOS register is developed in terms of its physical and circuit characteristics. Necessary and sufficient conditions for latching data are described in terms of small signal circuit parameters. From these necessary and sufficient conditions, the... View full abstract»

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  • Electromigration-induced failure analysis of VLSI interconnection components

    Publication Year: 1992, Page(s):631 - 634 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (216 KB)

    An analysis of electromigration-induced failure effects in various VLSI interconnection components is conducted using the series model of the failure mechanism. The components include a straight segment, a bend, a step, a via, a multisection interconnection and a power/ground bus. By considering the effects of the average flux density and the bamboo phenomenon on the grain boundary migration, each... View full abstract»

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  • Modelling of bipolar DCS DOT circuits

    Publication Year: 1992, Page(s):1124 - 1127 vol.2
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (224 KB)

    The authors present the results of studies that were performed on bipolar differential cascode switch (DCS) logic family fault models. A large number of process defects in DCS DOT circuits were not detected by the stuck fault models. A new approach to modeling DCS DOT circuits was developed to accurately represent process defects. Procedures are outlined to determine the best models for complex DC... View full abstract»

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  • A VLSI neural network design approach using a priori knowledge

    Publication Year: 1992, Page(s):1187 - 1190 vol.2
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (272 KB)

    Analyzing neural network (NN) algorithms, a priori knowledge can be often obtained from: the number of classes in pattern classification; the patterns in content-addressable memory: the coefficients in the element, e.g., weight value; and the adapting patterns in layered networks. The passive procedures to embody such knowledge can be implemented by lookup table technology. A NN design approach us... View full abstract»

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  • Compensation of clock feedthrough induced offset in analog adaptive FIR filters based on the LMS algorithm

    Publication Year: 1992, Page(s):587 - 590 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (284 KB)

    Offset voltage due to clock feedthrough in the adapting part of analog least mean square (LMS) adaptive filters causes serious degradation of the filter's convergence and error performance. A compensation scheme and its circuit level implementation are described. The scheme eliminates the clock-induced offset because the latter is the same for all weight integrators. Computer simulations at both a... View full abstract»

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  • Orthogonal implementations of state variable models

    Publication Year: 1992, Page(s):492 - 495 vol.1
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (408 KB)

    The problem of implementing a specified state variable model using orthogonal computations is addressed. Three approaches, namely, realization embedding, inner product, and matrix factorization are proposed. Output roundoff error and magnitude perturbances are also studied via simulations. The results presented show that orthogonality of the computation can be achieved while simultaneously specify... View full abstract»

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  • Magneto-resistive elements-an alternative to floating gate technology

    Publication Year: 1992, Page(s):134 - 136 vol.1
    Cited by:  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (164 KB)

    Magnetoresistive elements have previously been fabricated and tested for storage of data. Due to the nonvolatile property of these elements they can be used to replace floating gate storage cells. A programmable logic array (PLA) using on-chip magnetoresistive elements is simulated and its layout shown to illustrate the applicability of these elements. The die size for the 6×16×4 PLA i... View full abstract»

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  • Weight storage elements for analog implementation of artificial neural networks

    Publication Year: 1992, Page(s):1520 - 1523 vol.2
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (280 KB)

    Novel switched-capacitor (SC) circuits for storing analog weight voltages for use in the CMOS VLSI realization of analog artificial neural networks (ANNs) are presented. The circuits are dynamic in operation requiring low clock rates and operate by compensating for the leakage currents that are always present in CMOS devices. In addition, weight voltages can be changed in a manner similar to that ... View full abstract»

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  • Noninvasive voltage measurement through an on-chip test structure [IC testing]

    Publication Year: 1992, Page(s):340 - 343 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (332 KB)

    A method to evaluate internal voltages through a built-in test structure is presented. Multiplexers are used to increase accessibility. The test structure does not affect normal operation of the circuit. Individual subcircuits can be tested selectively based on evaluated internal voltages View full abstract»

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  • Development of a GaAs HBT integrated circuit chip performance simulator

    Publication Year: 1992, Page(s):635 - 638 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (204 KB)

    For an integrated circuit chip based on GaAs heterojunction bipolar transistor (HBT) technology, a computer simulator called GCHIPSIM has been developed for chip performance indicators including maximum clock frequency, power consumption, fabrication yield and size. GCHIPSIM is used to study the dependence of the indicators on technology feature size and chip integration level View full abstract»

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  • A new biquad circuit realizing high-order MOSFET-C filters

    Publication Year: 1992, Page(s):1 - 4 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (176 KB)

    The MOSFET-C continuous-time biquadratic building block proposed by A.E. Said et al. (1991) does not realize all generic transfer functions. When implemented in a high-order realization, it requires the addition of unity gain inverters. A new biquad circuit is proposed to overcome the above problems. It achieves a complete MOS nonlinearity cancellation and does not require the use of fully balance... View full abstract»

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  • Limit cycles in state-space pipelined scattered look-ahead filters

    Publication Year: 1992, Page(s):1128 - 1131 vol.2
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (332 KB)

    Limit cycles of various pipelined scattered look ahead (SLA) filters are analyzed. Regions free of overflow limit cycles using two's complement arithmetic are obtained in both parameter space and in the z-domain for SLA filters. Results for zero-input quantization limit cycle stability using two's complement truncation and rounding are extended to direct form (DF) SLA filters. Combining t... View full abstract»

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  • Application of non-linear electronic components in the modelling of human gall bladder system

    Publication Year: 1992, Page(s):1191 - 1192 vol.2
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (88 KB)

    To analyze the dynamics of the gall stone, it is necessary to investigate the complex physiological process of the gall bladder system. The authors deal with development of an electronic analog equivalent circuit using nonlinear electronic circuit components. This model provides the theoretical framework for further investigation of the structure, physiology, and electronic analog properties of th... View full abstract»

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  • The determination of the generalized frequency response for linear periodically shift-variant digital filters

    Publication Year: 1992, Page(s):591 - 593 vol.1
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (172 KB)

    An efficient approach is presented for determining the generalized frequency response of periodically shift-variant digital filters based on the state-space description. A numerical example is given to illustrate the approach. The generalized frequency response can be evaluated by solving a finite system of linear algebraic equations following from the coefficient matrices of the state space repre... View full abstract»

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  • Comprehensive performance analysis of radars using different types of sweep modulation

    Publication Year: 1992, Page(s):170 - 175 vol.1
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (296 KB)

    A comprehensive analysis of different types of sweep modulation is presented, together with suggestions for the transmitting pulse which fulfil the basic requirements of modern radars. Linear frequency modulation is effective at lower altitudes under the condition that the time-bandwidth product is not too large. Exponential modulation is suited to medium altitudes, and linear period modulation to... View full abstract»

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  • Analysis of real-time distributed systems: a case study [of robot juggling system]

    Publication Year: 1992, Page(s):496 - 499 vol.1
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (340 KB)

    Petri nets as a formalized analytic model for real-time specifications are used in a case study of a robot juggling system. The analysis reveals that it is hard to detect delays due to synchronization and resource contention. The analysis of the system as a whole can be obtained through the analysis of subsystems in a hierarchical manner. The case study shows how a complex system can be efficientl... View full abstract»

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  • Switched-capacitor realization of the associative memory

    Publication Year: 1992, Page(s):137 - 139 vol.1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (136 KB)

    A new switched capacitor (SC) realization of the Hou-Kayshap associative memory is proposed. Existing simulation networks use current summation to achieve the summation effect. Here, this effect is obtained by employing voltage summation using passive SC three-ports and low-gain voltage buffers. Thus, the structure is capable of operating at high speed View full abstract»

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  • LBAQ: a pattern recognition neural network that learns by asking questions

    Publication Year: 1992, Page(s):1524 - 1526 vol.2
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (232 KB)

    LBAQ (learning by asking questions) is a fast learning neural architecture that forms internal representations of the given examples and asks the teacher about labels for each of them. A considerable reduction in the length of the training session is achieved with LBAQ on the order of 1:500 over the time needed by a backpropagation network. The simulation performance results of this network on sta... View full abstract»

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  • Circuit design with post-fabrication tuning

    Publication Year: 1992, Page(s):344 - 347 vol.1
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (288 KB)

    A new concept, which is based on projection, is introduced for solving the post-fabrication tuning problem. The concept focuses on projection of the acceptable region into a response shell according to some tuning parameters, and determination of repairability of an outcome. The fundamental concepts of design tolerancing and tuning together with the main algorithms are presented View full abstract»

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