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Parallel, Distributed and Network-Based Processing (PDP), 2012 20th Euromicro International Conference on

Date 15-17 Feb. 2012

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Displaying Results 1 - 25 of 99
  • [Front cover]

    Publication Year: 2012, Page(s): C1
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  • [Title page i]

    Publication Year: 2012, Page(s): i
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  • [Title page iii]

    Publication Year: 2012, Page(s): iii
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  • [Copyright notice]

    Publication Year: 2012, Page(s): iv
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  • Table of contents

    Publication Year: 2012, Page(s):v - xii
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  • Preface from the Program Chairs

    Publication Year: 2012, Page(s): xiii
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  • Preface from the Organizing Chair

    Publication Year: 2012, Page(s): xiv
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  • Organization

    Publication Year: 2012, Page(s): xv
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  • Program Committee

    Publication Year: 2012, Page(s):xvi - xvii
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  • Additional Reviewers

    Publication Year: 2012, Page(s):xviii - xix
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  • A Lightweight C++ Interface to MPI

    Publication Year: 2012, Page(s):3 - 10
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (216 KB) | HTML iconHTML

    The Message Passing Interface (MPI) provides bindings for the three programming languages commonly used in High Performance Computing (HPC): C, C++ and Fortran. Unfortunately, MPI supports only the lowest common denominator of the three languages, providing a level of abstraction far lower than typical C++ libraries. Lately, after the decision of the MPI committee to deprecate and remove the C++ b... View full abstract»

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  • RobustTrav: NAT Optimisation for the RobustCooperation Suite

    Publication Year: 2012, Page(s):11 - 18
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1000 KB) | HTML iconHTML

    Cooperative systems supporting remote teams are based on distributed software architectures. Underneath most of these architectures is the Internet Protocol version 4 (IPv4), which acts as technological backbone. Despite its strengths, the IPv4 also entails challenges for developers of such systems for getting system messages through firewalls without increasing latency and bringing delays for use... View full abstract»

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  • TCP: Thread Contention Predictor for Parallel Programs

    Publication Year: 2012, Page(s):19 - 26
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (272 KB) | HTML iconHTML

    With proliferation of chip multicores (CMPs) on desktops and embedded platforms, multi-threaded programs have become ubiquitous. Existence of multiple threads may cause resource contention, such as, in on-chip shared cache and interconnects, depending upon how they access resources. Hence, we propose a tool - Thread Contention Predictor (TCP) to help quantify the number of threads sharing data and... View full abstract»

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  • Parallel Patterns + Macro Data Flow for Multi-core Programming

    Publication Year: 2012, Page(s):27 - 36
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (363 KB) | HTML iconHTML

    Data flow techniques have been around since the early '70s when they were used in compilers for sequential languages. Shortly after their introduction they were also considered as a possible model for parallel computing, although the impact here was limited. Recently, however, data flow has been identified as a candidate for efficient implementation of various programming models on multi-core arch... View full abstract»

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  • DIMVHCM: An On-line Distributed Monitoring Data Collection Model

    Publication Year: 2012, Page(s):37 - 41
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (241 KB) | HTML iconHTML

    In this work we present a hierarchical distributed data collection model for monitoring systems, called DIMVHCM. Its goal is to provide data for the on-line analysis of the behavior of distributed systems and applications. In our work we focus on analysis through visualization. We implemented a prototype of this model, which was integrated to the DIM Visual prototype and to the TRIVA visualization... View full abstract»

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  • Tackling Algorithmic Skeleton's Inversion of Control

    Publication Year: 2012, Page(s):42 - 46
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (263 KB) | HTML iconHTML

    Algorithmic Skeletons are a high-level parallel programming model which suffers from inversion of control. This paper argues that extending Algorithmic Skeletons with Event-Driven Programming (EDP) can reduce the negative side effects produced by the inversion of control by: i) providing online information about the runtime execution without lowering the skeleton's high-level abstraction, and ii) ... View full abstract»

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  • An Effective Approach for Home Services Management

    Publication Year: 2012, Page(s):47 - 51
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (242 KB) | HTML iconHTML

    Domotic systems aim to offer functionalities like energy management, security, conveniences, and much more. Many domotic networks exist to provide a subset of these applications, but these networks are not necessarily compatible due to different communication mediums or protocols. Literature presents different studies that introduce high-level systems that solve the lack of incompatibility, but it... View full abstract»

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  • SCTA Tracer: A Distributed Environment for Standardized Awareness Support Assessments

    Publication Year: 2012, Page(s):52 - 56
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2198 KB) | HTML iconHTML

    Awareness support in cooperative environments has been a research issue in the area of distributed systems for computer-supported cooperative work for more than two decades. Measuring its effectiveness remains a complex task since it is difficult to grasp awareness in situ. Consequently, techniques and tools are required generating results while a user's awareness is still present. The Standardize... View full abstract»

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  • LDPC Decoding on the Intel SCC

    Publication Year: 2012, Page(s):57 - 65
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1362 KB) | HTML iconHTML

    Low-Density Parity-Check (LDPC) codes are powerful error correcting codes used today in communication standards such as DVB-S2 and WiMAX to transmit data inside noisy channels with high error probability. LDPC decoding is computationally demanding and requires irregular accesses to memory which makes it suitable for parallelization. The recent introduction of the many-core Single-chip Cloud Comput... View full abstract»

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  • Improving Linear Algebra Computation on NUMA Platforms through Auto-tuned Nested Parallelism

    Publication Year: 2012, Page(s):66 - 73
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (285 KB) | HTML iconHTML

    The most computationally demanding scientific and engineering problems are solved with large parallel systems. In some cases those systems are Non-Uniform Memory Access multiprocessors made up of a large number of cores which share a hierarchically organized memory. Basic linear algebra routines of the type of BLAS typically constitute the kernel of the computation for those problems, and the effi... View full abstract»

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  • ArTA: Adaptive Granularity in Transactional Applications

    Publication Year: 2012, Page(s):74 - 80
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (190 KB) | HTML iconHTML

    Software Transactional Memory (STM) is a programming paradigm which simplifies parallel programming for multi-core processors. A key requirement in STMs is the mechanism to track memory accesses and detect conflicts among speculative transactions. Current STMs exploit a fixed-size tracking scheme to detect conflicts, i.e. at the word level. However, the choice of access granularity significantly a... View full abstract»

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  • Assessing HPC Failure Detectors for MPI Jobs

    Publication Year: 2012, Page(s):81 - 88
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (252 KB) | HTML iconHTML

    Reliability is one of the challenges faced by exascale computing. Components are poised to fail during large-scale executions given current mean time between failure (MTBF) projections. To cope with failures, resilience methods have been proposed as explicit or transparent techniques. For the latter techniques, this paper studies the challenge of fault detection. This work contributes a study on g... View full abstract»

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  • A Performance Study of Virtual Machines on Multicore Architectures

    Publication Year: 2012, Page(s):89 - 96
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (433 KB) | HTML iconHTML

    Cloud computing has promoted the widespread use of virtualized machines. A question arises: How does virtualization influence the performance of running applications? The answer must be a common interest of application developers and users. This paper describes the results of our performance evaluation on a virtualized multicore machine. We tested a set of benchmark applications and detected some ... View full abstract»

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  • Reduced Data Communication for Parallel CMA-ES for REACTS

    Publication Year: 2012, Page(s):97 - 101
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (221 KB) | HTML iconHTML

    Covariance Matrix Adaptation - Evolutionary Strategy (CMA-ES) is a black-box optimization method useful for applications where no direct inversion is possible. We present the development of a parallel CMA-ES algorithm that reduces the runtime for a specific geophysical data analysis, dipole localization. We compare our parallel algorithm against several other parallel CMA-ES variants on a sample d... View full abstract»

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  • Optimal Configuration of High-Radix Combined Switches

    Publication Year: 2012, Page(s):102 - 111
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (290 KB) | HTML iconHTML

    High-radix switches are an attractive option to improve network performance and to reduce network cost, especially in large switch-based interconnection networks. However, there are some problems related to the integration scale to design such single-chip switches. In this paper we describe an interesting alternative for building high-radix switches which basically consists in combining several cu... View full abstract»

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