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Architecture and Implementation of High Performance Communication Subsystems, 1992. (HPCS '92) IEEE Workshop on the

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Architecture and Implementation of High Performance Communication Subsystems, 1992. (HPCS '92) IEEE Workshop on the

Date 17-19 Feb. 1992

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Title History

IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems (HPCS'92) - front matter

Memory management in high-speed communication subsystems

A high-throughput network interface to a RISC workstation

Group address recognition with perfect hashing hardware - Extended abstract

Performance issues in the design of network interfaces for high speed networks

Tandem servers with finite buffers in a multi-tasking environment: performance guarantees via leaky buckets

Parallelism for high speed networks

Transferring images over high-speed, wide-area networks

Adaptive and Cooperative Bandwidth Management in ATM Networks

Performance of a high-speed switching subsystem under simplex and duplex communication modes

A MAC-level protocol for High Speed Ring Networks

The fair distributed queue protocol for high speed networking

Traffic characterization on high-speed token-ring networks

The x-chip: an experiment in hardware demultiplexing

Design and implementation of the real-time internet protocol

Cost effective network adapters

Author index

Alternative Approaches to ATM/Internet Interoperation

Efficient buffer allocation on shared-memory multiprocessors

Performance of Gigabit Atm Switch Designs

Fairness via Remote Management in a Dqdb Man

Very High Speed Lans for Medical Imaging

Los Alamos Multiple Crossbar Network Crossbar Interfaces

Analysis of the Nectar Communication Processor

Parallel Protocol Implementations an Transputers - Experiences with OSI TP4, OSI CLNP, and XTP

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