Date 3-5 Oct. 2011
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Displaying Results 1 - 25 of 82
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A fault-tolerant NoC using combined link sharing and partial fault link utilization scheme
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PDF (939 KB)
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System-level infrastructure for boot-time testing and configuration of networks-on-chip with programmable routing logic
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PDF (921 KB)
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Multirate hybrid continuous-time/discrete-time cascade 2–2 ΣΔ modulator for wideband telecom
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PDF (1312 KB)
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A high performance band-pass DAC architecture and design targeting a low voltage silicon process
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PDF (1376 KB)
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Architecture and design of a programmable 3D-integrated cellular processor array for image processing
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PDF (1371 KB)
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Cycle avoidance in 2D/3D bidirectional graphs using shortest-path dynamic programming network
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PDF (1067 KB)
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A battery-free energy harvesting system with the switch capacitor sampler (SCS) technique for high power factor in smart meter applications
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PDF (1094 KB)
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A subthreshold digital maximum power point tracker for micropower piezoelectric energy harvesting applications
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PDF (1739 KB)
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Design and analysis of on-chip charge pumps for micro-power energy harvesting applications
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PDF (1012 KB)
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Context-aware compiled simulation of out-of-order processor behavior based on atomic traces
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PDF (1799 KB)
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Positive realization of reduced RLCM nets
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PDF (944 KB)
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A more efficient arrangement of the sparse LU factorization for the large-scale circuit analysis
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PDF (920 KB)
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High-throughput pipelined realization of adaptive FIR filter based on distributed arithmetic
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PDF (820 KB)


