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2011 41st IEEE International Symposium on Multiple-Valued Logic

23-25 May 2011

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  • [Front cover]

    Publication Year: 2011, Page(s): C1
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  • [Title page i]

    Publication Year: 2011, Page(s): i
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  • [Title page iii]

    Publication Year: 2011, Page(s): iii
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  • [Copyright notice]

    Publication Year: 2011, Page(s): iv
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  • Table of contents

    Publication Year: 2011, Page(s):v - x
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  • Message from the Symposium Chair

    Publication Year: 2011, Page(s): xi
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  • Message from the Program Chair

    Publication Year: 2011, Page(s): xii
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  • Program Committee

    Publication Year: 2011, Page(s): xiii
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  • Reviewers

    Publication Year: 2011, Page(s): xiv
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  • Index Generation Functions: Recent Developments

    Publication Year: 2011, Page(s):1 - 9
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (371 KB) | HTML iconHTML

    This survey first introduces index generation functions, which are useful for pattern matching in communication circuits. Then, it shows various methods to realize index generation functions using memories. A linear transformation is used to reduce the number of variables and thus memory size. An extension to the multiple-valued case is also presented. View full abstract»

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  • Autosymmetric Multiple-Valued Functions: Theory and Spectral Characterization

    Publication Year: 2011, Page(s):10 - 15
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (254 KB) | HTML iconHTML

    Auto symmetric functions are a class of Boolean functions whose regular structure can be exploited by synthesis algorithms in order to reduce the minimization time and to derive more compact algebraic forms. In this paper we propose a generalization of this class of functions to the multiple-valued logic framework. We also study the spectral properties of auto symmetric functions and provide a com... View full abstract»

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  • Numeric Function Generators Using Piecewise Arithmetic Expressions

    Publication Year: 2011, Page(s):16 - 21
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (177 KB) | HTML iconHTML

    This paper proposes new architectures for numeric function generators (NFGs) using piecewise arithmetic expressions. The proposed architectures are programmable, and they realize a wide range of numeric functions. To design an NFG for a given function, we partition the domain of the function into uniform segments, and transform a sub-function in each segment into an arithmetic spectrum. From this ... View full abstract»

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  • Design of High Performance Quaternary Adders

    Publication Year: 2011, Page(s):22 - 26
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (814 KB) | HTML iconHTML

    Design of the binary logic circuits is limited by the requirement of the interconnections. A possible solution could be arrived at by using a larger set of signals over the same chip area. Multiple-valued logic (MVL) designs are gaining importance from that perspective. This paper presents two types of multiple-valued full adder circuits, implemented in Multiple-Valued voltage-Mode Logic (MV-VML).... View full abstract»

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  • A Graph-Based Approach to Designing Multiple-Valued Arithmetic Algorithms

    Publication Year: 2011, Page(s):27 - 32
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (348 KB) | HTML iconHTML

    This paper presents a graph-based approach to designing multiple-valued arithmetic circuits. Our method describes arithmetic circuits in a hierarchical manner with high-level multiple-valued graphs, which are determined by specific algebra and arithmetic formulae. The proposed circuit description can be effectively verified by symbolic computations such as polynomial reduction using Groebner Bases... View full abstract»

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  • Classification of Ternary Logic Functions by Self-Dual Equivalence Classes

    Publication Year: 2011, Page(s):33 - 37
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB) | HTML iconHTML

    Self-dual equivalence class of ternary logic functions is investigated using ternary parametron logic. Based on multiplexor (MUX) realization of a function, a self-dual function is constructed by introducing Goto's self-dualizing variable which feeds constant values to MUX circuit. Self-dual operation is an operation to transform from one function to another among functions realized by different v... View full abstract»

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  • Error-Correcting Decision Diagrams for Multiple-Valued Functions

    Publication Year: 2011, Page(s):38 - 43
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (245 KB) | HTML iconHTML

    Decision diagrams are an efficient way of representing switching functions and they are easily mapped to technology. The layout of a circuit is directly determined by the shape of the decision diagram. By combining the theory of error-correcting codes with decision diagrams, it is possible to form robust circuit layouts, which can detect and correct errors. The method of constructing robust decisi... View full abstract»

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  • A Three-Valued Approach to the Master Argument

    Publication Year: 2011, Page(s):44 - 49
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (178 KB) | HTML iconHTML

    The Master Argument due to Diodorus Cronos claims that nothing is possible that neither is true nor will be true and that therefore every (present) possibility must be realized at a present or future time. Unfortunately, it leads to logical determinism. In this paper, based on Prior's insight, a three-valued approach to the Master Argument is presented by developing a three-valued modal tense logi... View full abstract»

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  • Some Types of Filters in Hoops

    Publication Year: 2011, Page(s):50 - 53
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (244 KB) | HTML iconHTML

    Abstract-In this paper we consider fundamental properties of some types of filters (implicative, positive implicative and fantastic filters) of hoops and prove that for any hoop A and filter F of A, (a) F is an implicative filter if and only if A/F is a relatively pseudo-complemented semilattice, that is, Brouwerian semilattice; (b) F is a positive implicative filter if and only if A/F is a {... View full abstract»

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  • Multiple-Valued Logic Networks with Regular Structure Obtained from Fast Fourier Transforms on Finite Groups

    Publication Year: 2011, Page(s):54 - 61
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (249 KB) | HTML iconHTML

    In this paper, we discuss the Fast Fourier transform (FFT) on finite groups as a useful method in synthesis for regularity. FFT is the algorithm for efficient calculation of the Discrete Fourier transform (DFT) and has been extended to computation of various Fourier-like transforms. The algorithm has a very regular structure that can be easily mapped to technology by replacing nodes in the corresp... View full abstract»

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  • Representation of Multiple-Valued Bent Functions Using Vilenkin-Chrestenson Decision Diagrams

    Publication Year: 2011, Page(s):62 - 68
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (221 KB) | HTML iconHTML

    Bent functions are a class of discrete functions which exhibit the highest degree of nonlinearity. As such bent functions form an essential part of cryptographic systems. Original concept of bent functions defined in GF(2) can be extended to multiple-valued case. Multiple-valued bent functions are defined in therms of properties of their Vilenkin-Chrestenson spectra. Decision diagrams are a method... View full abstract»

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  • Weak Uninorm Based Logic and Its Filter Theory

    Publication Year: 2011, Page(s):69 - 72
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (261 KB) | HTML iconHTML

    We give an axiomatic system of a logic called here a weak uninorm based logic (wUL), which is proved to be characterized by the class of all (not necessary bounded nor integral) commutative residuated lattices. We see that the logic is algebraizable. Since many well-known logics, e.g., UBL by Watari and al., UL by Metcalfe and Montanga, ML by Hohle, MTL by Esteva and L. Godo, BL by Hajek, and so o... View full abstract»

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  • Notes on the Exclusive Disjunction

    Publication Year: 2011, Page(s):73 - 77
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (193 KB) | HTML iconHTML

    This short paper just contains some reflections on the symmetric difference operator translating into an algebraic framework the connective exclusive disjunction, the linguistic either/or. In particular, it tries to find an upper bound for the fuzzy operators generalizing the classical symmetric difference, that is, those to deal with imprecise statements. This search is made throughout the preser... View full abstract»

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  • From Truth Tables to Programming Languages: Progress in the Design of Reversible Circuits

    Publication Year: 2011, Page(s):78 - 85
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (410 KB) | HTML iconHTML

    It is a widely supported prediction that conventional computer hardware technologies are going to reach their limits in the near future. Consequently, researchers are working on alternatives. Reversible circuits are one promising direction with applications e.g. in low-power design or quantum computation. However, no real design flow for this new kind of circuits exists so far. In this paper, the ... View full abstract»

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  • Two-Qubit Quantum Gates to Reduce the Quantum Cost of Reversible Circuit

    Publication Year: 2011, Page(s):86 - 92
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (478 KB) | HTML iconHTML

    This paper presents a quantum gate library that consists of all possible two-qubit quantum gates which do not produce entangled states. The quantum cost of each two-qubit gate in the proposed library is one. Therefore, these gates can be used to reduce the quantum costs of reversible circuits. Experimental results show a significant reduction of quantum cost in benchmark circuits. The resulting ci... View full abstract»

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  • Fault Tolerant Computing Paradigm for Random Molecular Phenomena: Hopfield Gates and Logic Networks

    Publication Year: 2011, Page(s):93 - 98
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (212 KB) | HTML iconHTML

    This paper contributes to robust fault-tolerant computing for expected nano-centric processing hardware. We developed (a) techniques for fault tolerant logic network design given a library of AND, OR, NAND, and NOR Hop field gates, and (b) report experimental results on fault tolerant properties of designed networks. In particular, several hundred iterations are required to achieve correct outputs... View full abstract»

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