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Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)

16-16 Sept. 1998

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Displaying Results 1 - 25 of 92
  • Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)

    Publication Year: 1998
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    Freely Available from IEEE
  • ASIC Applications [session summary]

    Publication Year: 1998, Page(s): 1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (55 KB)

    Summary form only given, as follows. We find ASIC technology in a wide variety of demanding applications where high performance, low power, small weight or low parts count is a driving factor in design. This session has six articles describing a wide set of diverse applications. We begin with three articles describing ASICs for industrial applications. The first work describes a precision scale co... View full abstract»

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  • Design for test [session summary]

    Publication Year: 1998, Page(s): 73
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    This session contains papers from different areas in ASIC design that focus on design for testability issues. The session starts with an invited paper by Christopher A. Ryan, Texas Instruments, presenting an embedded core test strategy and built-in self-test for systems on a chip. With the increasing number of embedded cores on a single chip the problems to make each core testable also increases. ... View full abstract»

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  • Low Power [session summary]

    Publication Year: 1998, Page(s): 101
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    Summary form only given, as follows. Power considerations for today??s systems are very important. Portable applications, remote applications and consumer products are all driving the need for reduced power consumption. Battery based systems are becoming much more prevalent and consumers do not wish to sacrifice performance. Thus minimizing power consumption is a very hot topic and the focus of th... View full abstract»

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  • Tutorial workshops

    Publication Year: 1998, Page(s): 415
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (50 KB)

    First Page of the Article
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  • Author index

    Publication Year: 1998, Page(s):422 - 424
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    Freely Available from IEEE
  • Current-testable high-frequency CMOS operational amplifiers

    Publication Year: 1998, Page(s):95 - 99
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (492 KB)

    A new test approach for high-frequency operational amplifiers based on current injection is presented in this paper. Current-based test stimuli allow detection of some faults which are difficult to detect or are untestable when conventional voltage-based test stimuli are used. In addition, the selection of test stimuli is simpler since faulty behaviours are observable in the whole frequency band w... View full abstract»

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  • CMOS-based sensors and actuators

    Publication Year: 1998, Page(s):393 - 397
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (600 KB)

    In many applications, up to millions of sensors or actuators have to be connected to the outside world, making the monolithic integration of circuits mandatory. Monolithic integration is also pursued for mass-produced transducers. Today, monolithic devices include visible and IR imagers, displays, inkjet heads, biochemical and physical sensors. Monolithic integration of transducer-specific process... View full abstract»

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  • Design and test of a CMOS low-power mixed-analog/digital ASIC for radiation detector readout front ends

    Publication Year: 1998, Page(s):89 - 93
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (392 KB)

    A new CMOS low-power mixed A/D ASIC for radiation detector readout front ends is presented. First, we recall the principle of radiation detection system before describing the whole architecture of the circuit. The discussion is then focused on the low-power issue. By means of an innovative 128:1 analog multiplexer, we show how we drastically reduced the mean power consumption without sacrificing c... View full abstract»

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  • Single-chip implementation of a 32-bit microcontroller for motor drive

    Publication Year: 1998, Page(s):3 - 6
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (540 KB)

    A single-chip 32-bit microcontroller was designed for a motor drive; the architecture and the implementation issues such as the clock distribution and the chip test results including the power dissipation are presented in this paper. The microcontroller includes the SPARC processor a FPU, a memory controller, an interrupt controller and peripheral devices in a single-chip. The microcontroller was ... View full abstract»

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  • Integrated scheduling and allocation of high-level test synthesis

    Publication Year: 1998, Page(s):81 - 87
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (804 KB)

    This paper presents a high-level test synthesis algorithm for operation scheduling and data path allocation. Data path allocation is achieved by a controllability and observability balance allocation technique which is based on testability analysis at register-transfer level. Scheduling, on the other hand, is carried out by rescheduling transformations which change the default scheduling to improv... View full abstract»

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  • Digital design of discrete wavelet transform for MPEG-4

    Publication Year: 1998, Page(s):333 - 336
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (288 KB)

    It has been proposed to use the Discrete Wavelet Transform (DWT) in the draft MPEG-4 standard, which is expected play an important role in low bit-rate applications such as video telephony. A digital design for the DWT is presented in this paper. Related issues including the basic concept, boundary treatment, and the distributed arithmetic algorithm are addressed View full abstract»

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  • Image sensors in industrial/machine vision applications

    Publication Year: 1998, Page(s):387 - 391
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (300 KB)

    This tutorial presents the basic characteristics of industrial applications of solid state image sensors. The contents of this paper are an abbreviated version of the tutorial presented at the ASIC'98 Conference. Image sensor technology requirements are described. Various system architectures are discussed. Important system criteria for industrial imaging are examined. The tutorial concludes with ... View full abstract»

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  • Development of Mitsubishi precision scale controller

    Publication Year: 1998, Page(s):19 - 21
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (260 KB)

    We have developed a Mitsubishi precision scale controller ASIC using a cell based IC. This scale is a position detector applied to industrial machines. The newly developed controller is manufactured using a 0.35 μm process and operates at 140 MHz. It can improve the resolution of a scale by 10 times View full abstract»

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  • Automated synthesis of a multiple-sequence test generator using 2-D LFSR

    Publication Year: 1998, Page(s):75 - 79
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (392 KB)

    Given a set of pre-computed test vectors obtained by an automatic test pattern generation (ATPG) tool for detecting random-pattern-resistant faults or particular hard-to-test faults presented in a circuit under test (CUT), a simple test generator based on a 2D linear feedback shift register (LFSR) structure is presented in this paper to generate a given test, followed by random patterns. Not only ... View full abstract»

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  • Asic Architectures

    Publication Year: 1998, Page(s): 239
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (56 KB)

    First Page of the Article
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  • Design of integrated systems including MEMS and ASICs

    Publication Year: 1998, Page(s):383 - 386
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (384 KB)

    Design of products containing MEMS/MST subsystems requires a top-down approach to system design. We present a methodology to support the subsystem designers with behavioral models and simulation tools, which enable the specification of subsystem functions at the level of the system architect. 3-D multi-physics simulations are used to create the computationally efficient models required for system ... View full abstract»

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  • Timing optimization for testable convergent tree adders

    Publication Year: 1998, Page(s):245 - 249
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (404 KB)

    Carry lookahead adders have been, over the years, an integral part of microprocessor architecture. Structures and levels of adders vary depending on the carry output. In this paper, analysis and optimization processes are first performed on a testable convergent tree adder. It is shown that the structure of the tree provides for a high fanout with an imbalanced tree structure which contributes to ... View full abstract»

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  • A nonlinear integrator model used to design a robust 16-bit, 40 kSPS switched capacitor sigma-delta modulator

    Publication Year: 1998, Page(s):67 - 71
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (416 KB)

    The design of robust high-order sigma-delta modulator circuits is difficult since linear analysis cannot be used to accurately estimate performance characteristics such as signal-to-noise ratio (SNR) and signal-to-distortion ratio (SDR). Designers rely on time-domain simulation of the modulator loop to evaluate these critical performance characteristics. A new model for a switched capacitor integr... View full abstract»

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  • Designing Real-Life Applications Using Synopsys Behavioral Compiler

    Publication Year: 1998, Page(s): 419
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    First Page of the Article
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  • A flexible pipelined image processor

    Publication Year: 1998, Page(s):325 - 332
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (844 KB)

    This paper describes the design of a flexible, pipelined general image processor (GIP) using VHDL to model the top level design and functional blocks consisting of histogram modification, convolution, halftone, error diffusion, and threshold. The GIP was simulated to have a processing speed of 70 Mpixels/second. A four pixel wide image data path is used so a clock of 17.5 MHz can be used. Mentor G... View full abstract»

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  • Design of standard cells used in low-power ASIC's exploiting the multiple-supply-voltage scheme

    Publication Year: 1998, Page(s):119 - 123
    Cited by:  Papers (13)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (496 KB)

    ASIC design utilizing the multiple-supply-voltage (MSV) scheme has been shown to be efficient in reducing the power consumption. A new layout style of standard cells to be used in ASIC designs is proposed to effectively exploit the advantages afforded by the MSV scheme. Each standard cell is designed to use two power rails that are fed with different supply voltages. Then, the cells can be butted ... View full abstract»

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  • Designing a Java microprocessor core using FPGA technology

    Publication Year: 1998, Page(s):13 - 17
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (512 KB)

    Ever since its introduction from Sun Microsystems three years ago, Java has been widely accepted in the computing and Internet industry. However the run-time performance is still not good enough for Java to become a general purpose programming language. This paper shows how to implement a Java microprocessor core in silicon to speed up the execution of Java. For a reconfigurable and flexible desig... View full abstract»

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  • A sixth-order CMOS sigma-delta modulator

    Publication Year: 1998, Page(s):63 - 66
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (300 KB)

    A sixth-order sigma-delta modulator is presented. Sixth-order noise shaping is achieved though four stage cascaded noise cancellation network. Behavioral simulation shows that cascaded 2-1-1-2, (second order-first order-first order-second order) is very robust and suitable for VLSI implementation. An experimental prototype was fabricated using 2 μm CMOS process by MOSIS. Measurement result show... View full abstract»

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  • A voltage-regulated static keeper technique for high-performance ASICs

    Publication Year: 1998, Page(s):361 - 364
    Cited by:  Papers (3)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (320 KB)

    A Voltage-Regulated Static Keeper (VRSK) technique is proposed. The VRSK can be applied to any dynamic circuit without size optimization and dissipates only one-third power of a static keeper. A 4-bit demultiplexer incorporating the VRSK can operate up to 2.0 GHz with a power consumption of only 5.8 mW View full abstract»

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