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Parallel Computing in Electrical Engineering (PARELEC), 2011 6th International Symposium on

Date 3-7 April 2011

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  • [Front cover]

    Publication Year: 2011 , Page(s): C1
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  • [Title page i]

    Publication Year: 2011 , Page(s): i
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  • [Title page iii]

    Publication Year: 2011 , Page(s): iii
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  • [Copyright notice]

    Publication Year: 2011 , Page(s): iv
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  • Table of contents

    Publication Year: 2011 , Page(s): v - viii
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  • Welcome message from the Symposium Organizers

    Publication Year: 2011 , Page(s): ix
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  • Message from the International Workshop Chair

    Publication Year: 2011 , Page(s): x
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  • Conference Committee

    Publication Year: 2011 , Page(s): xi
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  • International Program Committee

    Publication Year: 2011 , Page(s): xii
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  • Reviewers

    Publication Year: 2011 , Page(s): xiii
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  • Sponsors

    Publication Year: 2011 , Page(s): xiv
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  • Message from SCOPE-2011 International Workshop Organizers

    Publication Year: 2011 , Page(s): xv
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  • SCOPE-2011 Organizing Committee

    Publication Year: 2011 , Page(s): xvi
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  • Message from the Workshop Chair on Green Computing and Sustainability

    Publication Year: 2011 , Page(s): xvii
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  • Keynote speakers

    Publication Year: 2011 , Page(s): xviii
    Request Permissions | Click to expandAbstract | PDF file iconPDF (111 KB) |  | HTML iconHTML  

    The POP-C++ and POP-Java programming languages are implementations, as extensions of the programming languages C++ respectively Java, of the Parallel Object Oriented model. The POP model is based on the very simple idea that objects are suitable structures to distribute data and executable codes over heterogeneous distributed hardware and to make them interact between each other. The object orient... View full abstract»

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  • Static Average Case Analysis Fork-Join Framework Programs Based on MOQA Method

    Publication Year: 2011 , Page(s): 1 - 6
    Request Permissions | Click to expandAbstract | PDF file iconPDF (336 KB) |  | HTML iconHTML  

    With the advancement of multi-core processors, parallel algorithms especially multithreaded algorithms, are of increasing importance to developers. The requirement for parallel algorithm analysis also increased. In this paper we present a new way to analyze fork-join multithreaded algorithms. Our approach is based on a novel static average case analysis method named MOQA. By extending MOQA theory ... View full abstract»

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  • Parallelizing a Coarse Grain Graph Search Problem Based upon LDPC Codes on a Supercomputer

    Publication Year: 2011 , Page(s): 7 - 12
    Request Permissions | Click to expandAbstract | PDF file iconPDF (402 KB) |  | HTML iconHTML  

    Codes on graphs have become the most important way to reach channel capacity. A new problem for High Performance Computing has been constructed with this work. The graph search problem as posed in this work is the coarsest version of the problem which corresponds to the exhaustive search case. The coarse grain graph search (CGGS) problem chooses an optimal parity-check matrix, based on minimum val... View full abstract»

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  • An Approach towards Automation Firmware Modeling for an Exploration and Evaluation of Efficient Parallelization Alternatives

    Publication Year: 2011 , Page(s): 13 - 18
    Request Permissions | Click to expandAbstract | PDF file iconPDF (410 KB) |  | HTML iconHTML  

    Due to stagnating CPU cycles, future performance gains in automation firmware are unlikely to be achieved without parallelization for multi-core architectures. However, for a sophisticated system comprising millions of lines of code, this process induces significant effort, especially when having to keep real time and safety conditions. As efficiency matters in corporate software development, obta... View full abstract»

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  • Communication on the Fly for Hierarchical Systems of Chip Multi-processors

    Publication Year: 2011 , Page(s): 19 - 24
    Cited by:  Papers (1)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (431 KB) |  | HTML iconHTML  

    Systems based on many Chip Multi-Processor (CMP) modules interconnected by global networks constitute now a feasible solution, which brings back to life challenges of massively parallel systems. The paper presents new methods for data communication inside CMP modules and for inter-CMP-module data communication. Inside CMP modules data communication through shared variables is improved by the use o... View full abstract»

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  • Optimising Heterogeneous 3D Networks-on-Chip

    Publication Year: 2011 , Page(s): 25 - 30
    Cited by:  Papers (1)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (666 KB) |  | HTML iconHTML  

    The emergence of the third dimension in Network-on-Chip (NoC) design as a quest to improve the quality of service (QoS) of on-chip communication has evolved with enormous interest. However the underlying router architecture of 3D NoCs have more area footprint than 2D routers. In this paper, we investigate heterogeneous 3D NoC topologies with the focus on finding a balance between the manufacturing... View full abstract»

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  • A Dynamic Core Grouping Approach to Improve Raw Architecture Many-core Processor Performance

    Publication Year: 2011 , Page(s): 31 - 35
    Request Permissions | Click to expandAbstract | PDF file iconPDF (226 KB) |  | HTML iconHTML  

    The ongoing move of hardware platforms to many-core processor challenges the traditional software design methodology. It is critical to develop new programming paradigms and efficient ways to port legacy applications. This paper analyzed a typical packet processing application and also the cache hierarchy and behavior of Raw architecture many-core processor. It presented an easy to implement run-t... View full abstract»

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  • Event-driven Scheduling for Parallel Stream Processing

    Publication Year: 2011 , Page(s): 36 - 41
    Request Permissions | Click to expandAbstract | PDF file iconPDF (262 KB) |  | HTML iconHTML  

    To optimize real-time stream-processing applications for chip-level multi processors, several challenges have to be met. Poor scalability and poor internal data pressure may result from serial dependencies within or between the algorithms. Load imbalances introduced by the parallel-processing hardware and execution environment may also limit performance. To maximize the throughput and minimize the... View full abstract»

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  • Optimal Placement of the Wind Generators in the Medium Voltage Power Grid

    Publication Year: 2011 , Page(s): 42 - 45
    Request Permissions | Click to expandAbstract | PDF file iconPDF (290 KB) |  | HTML iconHTML  

    The minimization of power losses in the medium voltage (MV) grid requires adjustment of network of power sources. This problem is particularly important for renewable energy sources, for example for the farms of wind generators. Their placement and nominal power should be selected according to the configuration of the network and the largest loads. The implementation of the genetic algorithm (GA) ... View full abstract»

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  • Optimal Placement of Wind Generators in Medium Voltage Power Grids -- Investigations of Genetic Algorithm

    Publication Year: 2011 , Page(s): 46 - 49
    Request Permissions | Click to expandAbstract | PDF file iconPDF (239 KB) |  | HTML iconHTML  

    The paper presents investigations of a genetic algorithm for computations of power losses in the MV power grid. In this case, the vector of start population PO0 and mutation likelihood was investigated. Diagrams of power losses in the grid dependent on the value of the mutation operator as well as the vector size of start population p are presented. The construction of the parallel genetic algorit... View full abstract»

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  • Potential of General Purpose Graphic Processing Unit for Energy Management System

    Publication Year: 2011 , Page(s): 50 - 55
    Cited by:  Papers (1)
    Request Permissions | Click to expandAbstract | PDF file iconPDF (328 KB) |  | HTML iconHTML  

    This paper investigates the potential of General Purpose Graphic Processing Unit (GPGPU) for the serve rand HMI parts of Energy Management System (EMS). TheHMI investigation focuses on the applicability and performance improvement of GPGPU for scattered data interpolation algorithms typically used to visually represent the overall state of a power network. The server side investigation focuses onf... View full abstract»

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