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Mask and Lithography Conference (EMLC), 2009 25th European

Date 12-15 Jan. 2009

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Displaying Results 1 - 25 of 45
  • Lithography Development and Research Challenges for the = 22 nm Half-pitch

    Publication Year: 2009 , Page(s): 1 - 10
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (2722 KB)  

    For the 32 and 22 nm half-pitch nodes of the International Technology Roadmap for Semiconductors, the industry will face the challenge of introducing new lithography technologies into manufacturing. Some can build on the extension of current optical lithography technologies. However, others require a tool, optics, mask, and resist infrastructure quite different from those supporting today¿s manufacturing. Developing new technology solutions for use in manufacturing takes a long time and the final stages of infrastructure development and commercialization are very costly. The readiness of lithography technologies needs to be assessed based on development progress, but it also needs to consider whether a technology receives the necessary support to intersect a given technology node. In addition to being technically challenging, enabling an infrastructure capable of supporting pilot line and then high volume manufacturing insertion on an aggressive timeline is also a significant business challenge. To share the risk and cost, the industry must consider new business models for efficient collaboration with tool and infrastructure suppliers on the one side and device manufacturers on the other. View full abstract»

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  • Mask Industry Assessment Trend Analysis

    Publication Year: 2009 , Page(s): 1 - 11
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (3744 KB)  

    Microelectronics industry leaders routinely name the cost and cycle time of mask technology and mask supply as top critical issues. A survey was created with support from SEMATECH to gather information about the mask industry as an objective assessment of its overall condition. This year¿s survey data were presented in detail at BACUS and the detailed trend analysis presented at EMLC. The survey is designed with the input of semiconductor company mask technologists and merchant mask suppliers. This year¿s assessment is the seventh in the current series of annual reports. With continued industry support, the report can be used as a baseline to gain perspective on the technical and business status of the mask and microelectronics industries. The report will continue to serve as a valuable reference to identify the strengths and opportunities of the mask industry. The results will be used to guide future investments on critical path issues. This year¿s survey is basically the same as the surveys in 2005 through 2007. Questions are grouped into seven categories: General Business Profile Information, Data Processing, Yields and Yield Loss, Mechanisms, Delivery Times, Returns, and Services. (Examples are given below). Within each category is a multitude of questions that creates a detailed profile of both the business and technical status of the critical mask industry. View full abstract»

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  • Mask salvage in the age of capital contraction

    Publication Year: 2009 , Page(s): 1 - 5
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (880 KB)  

    An advanced photomask is rarely made meeting all specifications in one attempt. In the photomask industry, yield is the critical component to all key performance measures including cost and delivery time. Defect-free advanced masks are extremely difficult to manufacture but leading-edge masks simultaneously meeting atomic level pattern placement, angstrom level CD uniformity, and defectivity to virus size sensitivity are a rarity. While the patterning and inspection segments have been the long-time nemeses of cost, the ideal mask fabrication process will perform these operations only once per mask order. To enable this, mask salvage processes are essential. Defects are the primary priority and are addressed with cleaning and repair techniques of various types targeted to needs. CD uniformity is addressed with predictive and feedback mapping techniques. CD uniformity is also addressed with post-mask fabrication gray-mask correction and dose correction at the scanner. Mask pattern placement correction by systematic error mapping is done but post-mask-patterning correction represents an opportunity for salvage process development. Until consistently superior mask registration can be achieved during or after patterning, self-aligned wafer processing will continue to be the primary enabling method for optical double-exposure while normal scaling issues will challenge EUV mask development. It is the ability to perform the high-cost operations only once to create each mask and then recover individual specification parameters with salvage operations which will differentiate mask makers in the future. View full abstract»

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  • Effects of mask absorber thickness on printability in EUV lithography with high resolution resist

    Publication Year: 2009 , Page(s): 1 - 12
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (4887 KB)  

    The effects of mask absorber thickness on printability in EUV lithography was studied from the viewpoint of lithographic requirements which can give high imaging contrast and reduce shadowing effect. From lithography simulation, optimum thickness range of mask absorber (LR-TaBN) for exposure latitude was predicted, and the effect of absorber thickness on MEF and H-V (Horizontal - Vertical) printed CD difference was determined using resist blur model. From printability experiments with a Small Field Exposure Tool (SFET) and with high resolution resist, optimum thickness of LR-TaBN absorber was demonstrated. When thinner absorber mask is employed in EUVL for ULSI chip production, it becomes necessary to introduce EUV light shield area in order to suppress the leakage of EUV light from neighboring exposure shots. Resist pattern CD change from the neighboring exposure shots was estimated by lithography simulation. View full abstract»

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  • Deflection Unit for Multi-Beam Mask Making

    Publication Year: 2009 , Page(s): 1 - 12
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (3380 KB)  

    Two main challenges of future mask making are the decreasing throughput of the pattern generators and the insufficient line edge roughness of the resist structures. The increasing design complexity with smaller feature sizes combined with additional pattern elements of the Optical Proximity Correction generates huge data volumes which reduce correspondingly the throughput of conventional single e-beam pattern generators. On the other hand the achievable line edge roughness when using sensitive chemically amplified resists does not fulfill the future requirements. The application of less sensitive resists may provide an improved roughness, however on account of throughput, as well. To overcome this challenge a proton multi-beam pattern generator is developed [1]. Starting with a highly parallel broad beam, an aperture-plate is used to generate thousands of separate spot beams. These beams pass through a blanking-plate unit, based on a CMOS device for de-multiplexing the writing data and equipped with electrodes placed around the apertures switching the beams ï¿¿ï¿¿ï¿¿onï¿¿ï¿¿ï¿¿ or ï¿¿ï¿¿ï¿¿offï¿¿ï¿¿ï¿¿, dependent on the desired pattern. The beam array is demagnified by a 200x reduction optics and the exposure of the entire substrate is done by a continuous moving stage. One major challenge is the fabrication of the required high aspect deflection electrodes and their connection to the CMOS device. One approach is to combine a post-processed CMOS chip with a MEMS component containing the deflection electrodes and to realize the electrical connection of both by vertical integration techniques. For the evaluation and assessment of this considered scheme and fabrication technique, a proof-of-concept deflection unit has been realized and tested. Our design is based on the generation of the deflection electrodes in a silicon membrane by etching trenches and oxide filling afterwards. In a 5mm x 5mm area 43,000 apertures with the corresponding electrodes have been structured and wired individually- - or in groups with aluminum lines. The aperture-plate for shaping the beams has been aligned and mounted on top of the blanking-plate. Afterwards this sandwich has been fixed on a base-plate with a pin plug as interface. The electrical connection has been performed with a standard chip bonding process to the aluminum pads on the blanking-plate. Finally, the proof-of-concept deflection unit was evaluated in a test bench. The results of electrical- and exposure tests are presented and discussed in detail. View full abstract»

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  • SEMATECH Mask Program

    Publication Year: 2009 , Page(s): 1 - 4
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (561 KB)  

    Defect free masks are a critical component to enable extreme ultraviolet lithography (EUVL). It is projected EUVL will be inserted for the 22nm hp node with a timeframe of 2012-2013 for leading IC manufacturers. To meet the goal of defect free masks, a concerted effort is required with emphasis on mask blank development and mask infrastructure readiness. With this in mind, SEMATECH mask program has been uniquely positioned to make important contributions to these areas. Together with several partners, an overall strategy has been defined focused on meeting EUVL mask requirements including setting mask standards and enabling the mask-making infrastructure. This paper will highlight the overview of key projects and accomplishments from the mask blank development program. It is critical that SEMATECH and its partners be ready to meet the overall pilot line defect density requirement of 0.04 defects/cm2 at 18nm defect sensitivity by the end of 2010. Although important progress has been made, much work remains to meet these challenging goals. View full abstract»

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  • Mask parameter variation in the context of the overall variation budget of an advanced logic wafer Fab

    Publication Year: 2009 , Page(s): 1 - 13
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (3057 KB)  

    Within our paper we are going to discuss the variation within the patterning process in the context of the overall electrical parameter variation in an advanced logic Fab. The evaluation is based on both the variation of ring oscillators that are distributed across the chip as well as on local variation of matched transistor pairs. Starting with a view back to the 130nm technology, we will show how things and requirements changed over time. In particular we focus on the gate layer where we do a detailed ACLV-comparison from the 130nm technology node down to today¿s 45nm node. Within the patterning variation we keep special attention on the mask performance. Within that section, we do a detailed wafermask correlation analysis. Additionally to the low-MEEF gate layer we show the importance of the mask CDperformance for a typical high MEEF-layer. Finally, we discuss the mask contribution to the overall overlay error for the most critical contact to gate overlay. In all of the cases, we will show that the mask performance is not the limiter within today¿s most advanced technology, as long as we get access to a world class mask shop. View full abstract»

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  • Extended Abbe approach for fast and accurate lithography imaging simulations

    Publication Year: 2009 , Page(s): 1 - 11
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1744 KB)  

    This paper presents an extended Abbe based imaging algorithm for faster and more accurate simulations of current and future projection lithography systems. The basics of the physical model and several methods for the evaluation of the new image simulation software are explained. The comprehensive evaluation of the new image simulation software includes convergence tests, comparisons with analytical results, and various methods for the assessment of computed imaging results in terms of intensity difference plots, simulated linewidths, and image slopes. Tests include simulations for two- and three-dimensional thin and rigorous simulated masks, scalar and vectorial computations of intensity distributions in air/immersion liquid (aerial images) and photoresist (bulk images), respectively. The test scenarios range from special settings which result in simple two-beam interferences to large area simulations of more complex mask layouts. The excellent accuracy and computational performance of the new imaging algorithm is demonstrated by a comparison with the well-established imaging algorithm of Fraunhofer IISB. The new imaging algorithms are integrated in the research and development lithography simulator Dr.LiTHO of Fraunhofer IISB. View full abstract»

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  • Decomposition Algorithm for Double Patterning of Contacts and Via Layers

    Publication Year: 2009 , Page(s): 1 - 7
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (971 KB)  

    The Semi Conductors manufacturing processes have been, over the years, striving to shrink the dimensions of the devices that can be realized on silicon wafers from one technology node to the next. Utilization of optical lithography in the manufacturing process has enabled predictable process adjustments that can be put in place to allow for the next generation of smaller silicon devices. However after reaching ArF wavelength for source illumination, it became obvious that moving to the next smaller wavelength would cost a lot. Innovative Resolution Enhancement Techniques had to be researched, developed and implemented to enable the dimension shrink while utilizing the same illumination wavelength. Double patterning is among the techniques that can enable devices of 45nm and below dimensions. The technique relies on decomposing the exposure mask into two masks; each of the decomposed masks will have a relaxed mask features¿ pitch compared to the original mask, such that the relaxed pitches are resolvable by the illumination process. In this paper we present an implementation of a fast algorithm for pitch splitting of contact and via layer. View full abstract»

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  • Mask contribution on CD & OVL errors budgets for Double Patterning Lithography

    Publication Year: 2009 , Page(s): 1 - 13
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (3021 KB)  

    Double Patterning Technology (DPT) is now considered as the mainstream technology for 32 nm node lithography. The main DPT processes have been developed according targeted applications: spacer and pitch splitting either by dual line or dual trench approaches. However, the successful implementation of DPT requires overcoming certain technical challenges in terms of exposure tool capability, process integration, mask performance and finally metrology. For pitch splitting process, the mask performance becomes critical as the technique requires a set of two masks. This paper will focus on the mask impact to the global critical dimension (CD) and overlay (OVL) errors for DPT. The mask long-distance and local off-target CD variation and image placement were determined on DP features at 180 nm and 128 nm pitches, dedicated to 45 nm and 32 nm nodes respectively. The mask data were then compared to the wafer CD and OVL results achieved on same DP patterns. Edge placement errors have been programmed on DP like-structures on reticle in order to investigate the offsets impact on CD and image placement. The CD lines increases with asymmetric spaces adjacent to the drawn lines for offsets higher than 12 nm, and then have been compared to the corresponding density induced by individual dense and sparse symmetric edges and have been correlated to the simulated prediction. The single reticle trans-X offsets were then compared to the impact on CD by OVL errors in the double patterning strategy. Finally, the pellicle-induced reticle distortions impact on image placement errors was investigated. The mechanical performance of pellicle was achieved by mask registration measurements before and after pellicle removal. The reticle contribution to the overall wafer CD and OVL errors budgets were addressed to meet the ITRS requirements. View full abstract»

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  • New methods and processes based on advanced vacuum technology for photomask decontamination

    Publication Year: 2009 , Page(s): 1 - 11
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1509 KB)  

    Within the frame of the European R&D project the so called ï¿¿ï¿¿ï¿¿HYMNEï¿¿ï¿¿ï¿¿ project, lead by STM, advanced vacuum decontamination processes had been demonstrated to be efficient on wafer substrates in order to remove airborne molecular contamination (moisture, VOC..), to avoid crystalline defects after dry etching process and to improve yield for sub 90 nm technologies. Further to these significant results on wafers, a pool of partners investigated new methods and processes based on vacuum technology for photomask decontamination. These studies were carried out in the frame of the European R&D CRYSTAL project, focusing on photomask defect reduction. Today, vacuum process is not very widespread in photomask environment: in fab environment nor in mask manufacturing cycle. However such vacuum substrate decontamination could be also efficiently applied in order to reduce AMC contamination, which is one of the root causes of haze and crystalline defects. In this paper, we report for the first time, vacuum process investigations on pellicled photomasks that could be applied in fab environment, as well as vacuum process investigations on patterned blank that could be integrated into mask manufacturing cycle. First, vacuum process had been investigated on pellicled photomasks, including parameter influences. Goal is to renew and replace the environment under the pellicle by clean environment. During the process, specific care has to be taken on pellicle behavior under vacuum. The challenge is indeed to manage the pellicle during the vacuum process without damaging it, especially after several decontamination cycles. Finally, repeatability tests have also been successfully carried out and will be reported. We also report advanced vacuum process on patterned blank that could be integrated into mask manufacturing flow. Such procedure is an efficient complementary process in order to outgas contaminants from photomasks, and in order to reduce AMC residues (especially sulfa- - te) in mask manufacturing cycle. Experimental results will be reported. Integration of such vacuum decontamination process during photomask lifetime could be considered. View full abstract»

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  • Particle transport and reattachment on a mask surface

    Publication Year: 2009 , Page(s): 1 - 11
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (2599 KB)  

    The cleaning processes used today for photomasks were developed over decades and optimized to fulfill customer specifications. Some mask procedures were adapted from wafer cleaning technology. A principal technique, megasonic (MS) cleaning, yields high particle removal efficiencies (PRE). However, MS can frequently cause feature damage, and so damage becomes the principle limitation to MS power levels applied to small feature sizes. The use of lower MS power levels can benefit from a better understanding of removal mechanisms. In several publications the effects influencing the mechanisms of particle cleaning were discussed. Particle transfer was investigated experimentally on wafer surfaces using bath tools and was tracked using fluorescent optical microscopy. The goal of our investigation is to test the validity of the aforementioned models for mask cleaning using a spinning mask and a megasonic head mounted on a arm swinging over the mask surface, which is the most common hardware setup used for mask cleaning tools. While this equipment setup provides a useful variability, it also introduces disadvantages e.g. non-equal distribution of the megasonic power across the cleaned surface as will be shown. We will focus on some of the main parameters e.g. chuck speed, arm swing speed and media flow, which are strongly coupled by the fluid dynamics and cannot be treated separately. All three parameters influence particlemask decoupling and reattachment during particle transport by the media stream across the mask surface. The approach to estimate the particle removal and reattachment rate is illustrated. The experiments performed allow the conclusion that the reattachment rate on a flat spinning mask surface is lower than previously assumed and the most critical part of the cleaning process is the detachment of the particle from the surface. View full abstract»

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  • Contamination control for ArF photo masks

    Publication Year: 2009 , Page(s): 1 - 13
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (2729 KB)  

    Advanced photolithography tools use 193 nanometer wavelength light for conventional and immersion printing. The increased energy of 193 nm (ArF) light coupled with the higher absorption cross section of most materials has lead to a dramatic increase in the rate of haze formation as compared to previously used lithographic wavelengths (248 KrF and 365 nm i-line systems). It is well known that at this short wavelength photochemical reactions are enhanced leading to progressive defect formation, or haze, on optical surfaces within microlithography tools. Therefore, strict contamination control of the optics environment is needed to avoid cumulative effects. Such measures have been implemented in lithography tools both for the optics and for the reticle during exposure. However, the patterned side of the photomask is the most sensitive element in the litho optical path for haze growth, because it is in focus and small defects will show up as printing defects. Moreover, the reticle life time depends both on rigorous contamination control for expose and transport/storage conditions (both inside and outside of the lithography tool). The litho operating cost depends directly on reticle life time. It is imperative that the industry takes the required measures to improve the airborne molecular contamination levels both in the storage part of the photolithography tool and in devices used to transport reticles outside of the tool to slow down reticle haze Past studies have shown the large effects of humidity and AMC on haze growth during storage and exposure. Therefore, significant improvements in storage and exposure environment have been implemented by many fabs to reduce the frequency of haze failures. It has also been shown that outgassing from materials surrounding the mask can influence or cause haze. It is clear that the reticle must be adequately protected from contamination sources throughout the life cycle of the reticle (both inside and outside of the lithography too- - l). In this paper we examine improvements in the storage conditions of reticles inside the lithography tool as well as improvements in commercial SMIF pods used in fab storage and automated handling of reticles. View full abstract»

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  • Lithography light source challenges for Double Patterning and EUVL

    Publication Year: 2009 , Page(s): 1 - 8
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (2216 KB)  

    The need for improved lithography resolution has driven the development of light sources with ever shorter wavelength. Excimer lasers have extended the exposure wavelength down to 193nm. Further resolution extension will require the introduction of Extreme UV (EUV) light source technology at 13.5nm. The traditional light source driver at each technology node has been higher power which enables increased productivity. More recently, improved light source stability, driven by tighter CD and overlay budgets for Double Patterning processes, has become more important and developments in this area will be described. The leading challenge for insertion of EUVL is source power and lifetime, which are both necessary to ensure cost effective operation. The first Laser Produced Plasma (LPP) production source using a high power CO2 laser and tin droplet targets is described. High conversion efficiency has enabled high EUV power performance. Continuous operation up to 18 hours, with stable power output, has been demonstrated. High collection efficiency is obtained using a large (5sr) multilayer mirror collector optic. The first integrated source will be delivered to support scanners for process development and insertion of EUVL at the 22nm node. A roadmap for future generations of LPP sources with scalable power will be outlined. View full abstract»

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  • The task of EUV-reflectometry for HVM of EUV-masks: first steps

    Publication Year: 2009 , Page(s): 1 - 7
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1474 KB)  

    High volume manufacturing (HVM) of EUV-masks requires increase in accuracy, precision and practicability. HVM requirements for reflectometry of EUV-masks are expected to be < 0.05 % in peak reflectance, and < 0.002 nm in centroid wavelength (3 sigma). Absolute accuracies should be of the same value at 1 sigma. This should be accomplished along with the reduced measuring spot size of down to < 0.01 mm2 as well as monitored alignment and positioning using fiducial mark. With the existing EUV-reflectometer developed for mask blank characterization, 0.1 % in peak reflectivity precision and 0.005 nm for centroid wavelength (1 sigma) are routinely achieved on both reflective multilayer coated and absorber coated blanks. It has been demonstrated that our EUV-lamp enables EUV-MBR operation without wear or components change for > 300 million pulses, which is > 100.000 full spectra measured at different sites or > 10.000 samples measured at 9 spots each. In this work we are presenting our present status as well as the first steps to achieve the demanded target for HVM of EUV masks. We will analyze the factors and parameters which are critical to achieve this level quality. View full abstract»

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  • EUV and DUV scatterometry for CD and edge profile metrology on EUV masks

    Publication Year: 2009 , Page(s): 1 - 12
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (2179 KB)  

    To test the applicability of scatterometry on EUV masks we measured a prototype EUV mask both with an EUV scatterometer and a conventional scatterometer operated at 193 nm and compared the results with AFM and CD-SEM measurements provided to us by the mask supplier. The results of both CD-SEM and EUV- and DUV scatterometry show a quite good agreement in linearity despite constant CD offsets for these different metrology tools. The influences of the multilayer and Si capping layer on top of the multilayer thickness on EUV scatterometry results have been modelled with the help of FEM based simulations. A strong correlation has been found between the thickness of the capping layer and the sidewall angle. In general these results demonstrate the applicability both of EUV and DUV scatterometry for the characterisation of absorber structures on EUV masks. The application of DUV scatterometry allows to omit any influence from multilayer features and is only sensitive to the absorber structure. In this way EUV and DUV scatterometry complement each other for metrology on EUV masks. For applications in process optimisation and in process control the use of a conventional VIS/DUV-scatterometer may be sufficient in many cases. View full abstract»

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  • EUV imaging performance ¿ moving towards production

    Publication Year: 2009 , Page(s): 1 - 12
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (3414 KB)  

    ASML¿s two alpha demo tools (ADTs) have successfully gone through acceptance testing at the customer sites. The ADTs are full field step-and-scan exposure systems for extreme ultraviolet lithography (EUVL) and are being used for EUVL process development. The main objectives for the program are to prepare EUVL for insertion at the 27nm node, and to support the development of the global infrastructure of masks and resist. Resolution of 28nm dense L/S has been demonstrated recently. In this paper we will look at the imaging performance of the AD-tools in comparison to the requirements for the 32nm node for Memory (NAND-Flash and DRAM) and 22nm node Logic applications, as these feature sizes can be supported by the current resist performance. Process windows and MEEF are evaluated for L/S and CHs through pitch down to 32nm half pitch. Furthermore, the full wafer CD uniformity of the critical features of a NAND-Flash gate layer at 32nm half pitch is presented as well. Based on these findings the expected imaging performance of the TWINSCAN NXE:3100 at the 27nm node will be discussed. View full abstract»

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  • Resolution capability of EBM-6000 and EBM-7000 for Nano-imprint template

    Publication Year: 2009 , Page(s): 1 - 7
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (829 KB)  

    Nano-Imprint Lithography (NIL) is one of the leading potential solutions for next generation lithography. Obtaining full field template with fine pattern resolution and reasonable throughput are the critical challenges in NIL. In a previous study, we reported the pattern resolution capability of EBM-6000 under nominal operation conditions (Current density: 70 A/cm2) that can be applied to CMOS device fabrication of 45 nm hp generation1. Smaller blur for better resolution is necessary to make NIL templates for 32nm hp generation and beyond. Blur in patterning process can be suppressed with smaller process blur, smaller aberration of electron optics, smaller forward scattering in resist and coulomb interaction among electrons. Beam blur incurred by coulomb interaction among electrons in EBM-6000 can be reduced with lower current density. In this paper, resolution extendibility of EBM-6000 with lower current density (30 A/cm2) was tested as one of the resolution enhancement techniques. Smaller aberration of electron optics is also effective to improve the resolution. We also checked the resolution of EBM-7000 under nominal operation conditions (Current density: 200 A/cm2) for a basic study of this paper. EBM-7000, which was developed for mask fabrication of 32 nm hp generation and mask development of 22 nm hp generation, will keep using 50 kV acceleration voltage and enhanced electron optics with smaller aberration as compared with EBM-6000. View full abstract»

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  • Electron beam inspection methods for imprint lithography at 32 nm

    Publication Year: 2009 , Page(s): 1 - 9
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (3342 KB)  

    Step and Flash Imprint Lithography redefines nanoimprinting. This novel technique involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed leaving a patterned solid on the substrate. Compatibility with existing CMOS processes requires a mask infrastructure in which resolution, inspection and repair are all addressed. The purpose of this paper is to understand the limitations of inspection at half pitches of 32 nm and below. A 32 nm programmed defect mask was fabricated. Patterns included in the mask consisted of an SRAM Metal 1 cell, dense lines, and dense arrays of pillars. Programmed defect sizes started at 4 nm and increased to 48 nm in increments of 4 nm. Defects in both the mask and imprinted wafers were characterized scanning electron microscopy and the measured defect areas were calculated. These defects were then inspected using a KLA-T eS35 electron beam wafer inspection system. Defect sizes as small as 12 nm were detected, and detection limits were found to be a function of defect type. View full abstract»

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  • UV NIL template making and imprint evaluation

    Publication Year: 2009 , Page(s): 1 - 7
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (2534 KB)  

    UV NIL shows excellent resolution capability with remarkable low line edge roughness, and has been attracting pioneers in the industry who were searching for the finest patterns. We have been focused on the resolution improvement in NIL template making with a 100keV acceleration voltage spot beam EB writer process, and have established a template making process to meet the requirements of the pioneers. Usually such templates needed just a small field (several hundred microns square or so) Now, for several semiconductor devices, the UV NIL is considered not only as a patterning solution for R&D purpose but eventually as a potential candidate for production, and instead of a small field, a full chip field mask is required. Although the 100kV EB writers have excellent resolution capability, they are adopting spot beams (SB) to generate the pattern and have a fatally low throughput if we need full chip writing. In this paper, we are focusing on the 50keV variable shaped beam (VSB) EB writers, which are used in current 4X photomask manufacturing. The 50keV VSB writers can generate full chip pattern in a reasonable time, and by choosing the right patterning material and process, we achieved resolution down to hp28nm, and initial promising results of hp22nm (partial resolution) for line and spaces, and hp26nm for dense holes were observed. View full abstract»

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  • Residual-free imprint for sensor definition

    Publication Year: 2009 , Page(s): 1 - 8
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1656 KB)  

    For the preparation of interdigitated sensor devices with nanometre sized electrodes a low-cost route is followed. The central technique used for electrode definition is nanoimprint. To imprint the larger contact areas as easy as the electrodes, the contacts are broken down into a grid. In order to end up with a highly uniform residual layer the concept of `partial cavity filling¿ is utilised, resulting in an almost negligible layer thickness. The metallic electrodes are defined by sputtering and lift-off directly after imprint, where a previous etching of the residual layer is not required. The results show that the concept works. With this strategy, preparation of an interdigitated sensor requires nothing but spin-coating, nanoimprinting and sputtering/lift-off. View full abstract»

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  • Monte-Carlo Simulations of Image Analysis for flexible and high-resolution Registration Metrol

    Publication Year: 2009 , Page(s): 1 - 7
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (2146 KB)  

    The continuous progress of PROVE, the new photomask registration and overlay measurement tool currently under development at Carl Zeiss has been reported at mask related conferences since it¿s first publication at EMLC 2008. The project has moved in the past year from a final design on paper to functional hardware in the lab. Major tool components such as the climate control unit, the automated mask handling system and the metrology stage have been assembled and successfully tested. The scope of this paper is to report on the current status of PROVE and furthermore present results from simulations utilizing the image analysis routines of the tool. Monte-Carlo simulations were used to analyze the impact of several realistic tool limitations (camera noise, stage and focus noise and imaging telecentricity) on the image analysis process. The evaluation itself was based on a conventional threshold approach to perform both registration and CD measurement simultaneously. The results show, that the routines can deal with the tool imperfections and limit the contribution to the reproducibility error for standard registration markers to a negligible part. Even single contact holes suffer only from small errors, when camera noise is low and image averaging is increased. Employing a generally used test pattern the CD test results also confirm a sufficiently small error contribution to the CD non-uniformity reproducibility. View full abstract»

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  • SEM image contrast modeling for mask and wafer metrology

    Publication Year: 2009 , Page(s): 1 - 11
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (2361 KB)  

    Scanning electron microscopy (SEM) is widely used as a fast and high resolution measurement method capable to perform characterizations of the smallest isolated and dense features which are to be specified and produced on photomasks and wafers down to the 32 nm node and below. Furthermore, electron beam writing tools for mask or direct wafer patterning need electron beam based metrology capabilities for the required high precision alignment purposes. All of these applications benefit from a proper physical understanding of the electron interaction processes in the measured features of interest and suitable simulation capabilities in order to model the measured SEM image or signal contrasts. In this contribution we will report on a new Monte Carlo based modular simulation package, developed at the PTB and called MCSEM, which allows to model secondary as well as backscattered electron image contrasts on 3-dimensional object features. The fundamentals, basic features as well as first applications of the new simulation package MCSEM in the nanometrology field will be explained. Where appropriate, also other existing Monte Carlo based simulation packages still are in use at the PTB, examples and comparisons with the new MCSEM simulation will be given. View full abstract»

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  • Registration Metrology on Double Patterning Reticles

    Publication Year: 2009 , Page(s): 1 - 8
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1707 KB)  

    Double patterning is considered as an upcoming class of technologies for the 32nm node photolithography processes and beyond. Several different double patterning technologies have been published within the last years. The ability to use coarse patterns to define finer patterns offers an opportunity to achieve resolution below 30 nm by using optical DUV immersion lithography. The specifications for overlay registration on a pair of photomasks are expected to be much tighter than for standard photomasks. Especially the registration of related patterns, distributed on two separate photomasks, gives a new challenge to the metrology tools. Accordingly, we will present a new approach for overlay registration by the KLATencor LMS IPRO4 system. Similar to the standard overlay evaluation, the new algorithms allow pairing up related sites on both photomasks for registration. Even though the sites are not located on the same coordinates, the KLATencor LMS IPRO4 system is able to pair up each site on the second photomask to a dedicated site on the reference photomask. Thus the algorithm creates a set of common sites for the overlay registration. Results of this versatile method will be presented, showing the feasibility to several applications. View full abstract»

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  • Reduced Pellicle Impact on Overlay using High Order Intrafield Grid Corrections

    Publication Year: 2009 , Page(s): 1 - 11
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (2160 KB)  

    Placement of a pellicle on a reticle will result in mechanical distortion of the reticle. Due to the mechanical distortion, exposure of the reticle with the pellicle will show additional image distortion, resulting in a reduced overlay performance on the wafer. Furthermore, a pellicle is a consumable and might be replaced during the lifetime of a reticle, introducing a different image distortion. Based on experimental reticle measurements before and after pellicle placement and modeling of the resulting data it has been suggested by Cotte et.al. that the impact of the pellicle can be reduced by 50% using linear corrections. These corrections are common available on most exposure tools. Cotte reported that by correcting for the third order term in x-direction was said to reduce the impact of the pellicle by another 25%. We studied the impact of pellicle induced mechanical distortion on the overlay performance of the reticle. We experimentally tested pellicle induced distortion using a standard 193-nm pellicle and a standard ASML overlay reticle. The experiments included mask registration measurements before and after pellicle placement, as well as wafer data from exposures of the reticle before and after pellicle placement on an ASML TWINSCAN(TM) XT:1400. We showed that, by using an intrafield grid correction model consisting of 15 coefficients of a third order polynomial regression model, we can execute grid corrections on the exposure tool enabling a reduction of the pellicle induced additional overlay to a level comparable to the situation without a pellicle. View full abstract»

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