# Proceedings Ninth Biennial University/Government/Industry Microelectronics Symposium

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Displaying Results 1 - 25 of 53
• ### Proceedings. Ninth Biennial University/Government/Industry Microelectronics Symposium (Cat. No.91CH3027-0)

Publication Year: 1991
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• ### Automated synthesis of macro/behavioral models for mixed analog/digital circuits, including complete power supply effects

Publication Year: 1991, Page(s):173 - 178
Cited by:  Papers (1)  |  Patents (1)
| |PDF (536 KB)

The authors describe a system for automated generation of macro/behavioral models for SPICE-based simulation. These tools facilitate the generation of parametric models incorporating fixed and/or variable topologies for a wide range of analog and digital blocks. The macro/behavioral models can operate at several levels of complexity. The highest level models accurately emulate model parametric var... View full abstract»

• ### Database management for the self-directed work team [IC fabrication]

Publication Year: 1991, Page(s):138 - 142
| |PDF (284 KB)

The authors describe a management organizational change at Harris Semiconductor that utilizes self-directed work teams. A major obstacle to the implementation was the inability of the management organization to supply the work teams with appropriate data to self-manage their area of responsibility. The need for information at the production-worker level led to the creation of a team information sy... View full abstract»

• ### Thermal self-limiting effects in the long-term AC stress on n-channel LDD MOSFETs

Publication Year: 1991, Page(s):93 - 97
Cited by:  Papers (1)  |  Patents (10)
| |PDF (228 KB)

A model of lightly doped drain n-MOSFET degradation in drain current under long-term AC use conditions which includes a self-limiting effect in the hot-electron induced device degradation is proposed for lifetime projections. Experimental results on LDD n-MOSFETs (W=50 μm) are presented which show the maximum drain current degradation as a function of the average substrate current unde... View full abstract»

• ### A new approach to statistical process control in a test environment: the empirical delta control chart

Publication Year: 1991, Page(s):116 - 121
| |PDF (496 KB)

Past attempts at Harris Semiconductor to control the test measurements process and their inherent weaknesses are discussed. The empirical delta control chart (ED-chart), along with its corresponding control unit/die philosophy, is introduced as an alternative toward controlling the semiconductor wafer and package test environments. Only one control chart (per test parameter tracked) is required fo... View full abstract»

• ### A wafer scale programmable systolic data processor

Publication Year: 1991, Page(s):252 - 256
Cited by:  Papers (2)
| |PDF (380 KB)

The authors describe the programmable systolic data processor (PSDP). The PSDP will enhance US Department of Defense (DoD) mission capabilities by extending signal and data processing speed/performance while reducing system size, weight, and power consumption. The characteristics of this architecture which make it opportune for building as a wafer-scale system include broad homogeneity, ease of re... View full abstract»

• ### A subthreshold model for the analysis of MOS IC's

Publication Year: 1991, Page(s):169 - 172
| |PDF (224 KB)

An accurate and computationally efficient charge-based model for the intrinsic capacitances in MOS transistors is proposed. The model is valid in the subthreshold regime, and is based on the quasi-static approximation. By integrating this model with a corresponding one in the strong inversion regime, a complete model valid in all regions of operation is presented. An interpolation scheme which gua... View full abstract»

• ### A high speed VLSI chip for data compression

Publication Year: 1991, Page(s):190 - 194
Cited by:  Papers (2)
| |PDF (384 KB)

The authors describe a high-speed VLSI chip that implements the LZ technique for data compression. The LZ technique for data compression involves two basic steps, parsing and coding. The LZ-based compression method is a powerful technique and gives high compression efficiency for text and image data. The architecture is systolic and uses the principles of pipelining and parallelism in order to obt... View full abstract»

• ### Improving semiconductor yields by varying silicon substrate parameters

Publication Year: 1991, Page(s):134 - 137
| |PDF (244 KB)

An experiment to determine the impact on wafer probe and fabrication yields of systematically varying silicon substrate parameters within current specification ranges is discussed. The effect of parametric splits of three relevant silicon parameters on device probe yields were investigated. The parameters that were chosen were resistivity, interstitial oxygen content, and backside condition of p-t... View full abstract»

• ### Current conduction in thermally grown thin SiO2 films

Publication Year: 1991, Page(s):89 - 92
Cited by:  Papers (1)
| |PDF (196 KB)

The I-V characteristics of thin SiO2 films with thicknesses ranging from 35 to 250 Å were studied using conventional Al-gate MOS capacitors prepared on <100> p-type substrate as the test vehicle. Several measurement techniques including constant voltage, constant current, and voltage pulse were used. Consistent results have been obtained. time-dependent cur... View full abstract»

• ### Assessing performance of standard evaluation circuits for radiation hardened 32 bit processor

Publication Year: 1991, Page(s):113 - 115
| |PDF (268 KB)

Methods of determining contractors' ability to meet the requirements of the radiation-hardened 32-b processor before actual production are presented. Standard evaluation circuits were examined, and the results used a gauge to evaluate the contractor performance. Using tests such as wafer yield, electrical tests, package screening, and radiation testing, the test chip could be used to judge the fin... View full abstract»

• ### Effect of geometry on the strain in electronic packages

Publication Year: 1991, Page(s):246 - 251
Cited by:  Patents (2)
| |PDF (380 KB)

Due to mismatch in the coefficients of thermal expansion of the components of an electronic package, mechanical strains are induced which may cause package failure under thermal load. An experimental method of fractional fringe Moire interferometry enhanced by digital image processing was used to investigate those strains. This technique is a full field displacement measurement tool possessing hig... View full abstract»

• ### A DC model for the HEMT including the effect of parasitic conduction

Publication Year: 1991, Page(s):164 - 168
Cited by:  Papers (2)
| |PDF (244 KB)

A DC model for AlGaAs-GaAs high electron mobility transistor (HEMT) is proposed. The model considers the parasitic parallel conduction in AlGaAs, which becomes important for large gate voltages, together with other important effects, such as field-dependent mobility, channel length modulation, maximum concentration of the two-dimensional electron gas, and series resistances. The theoretical predic... View full abstract»

• ### A joint industry-university CIM project for university microelectronics manufacturing

Publication Year: 1991, Page(s):37 - 40
Cited by:  Papers (8)
| |PDF (312 KB)

A student-operated factory for manufacturing integrated circuits has been in operation at the Rochester Institute of Technology (RIT) since 1987. In 1989 RIT and IBM joined together to improve the factory operation by installing a computer-integrated manufacturing (CIM) system. The CIM system allows users control equipment access, monitor equipment status, do lot tracking, provide detailed current... View full abstract»

• ### A structured custom logic-design methodology

Publication Year: 1991, Page(s):185 - 189
| |PDF (304 KB)

The authors describe a custom logic-circuit design methodology for CMOS circuit technologies where design time and cost are drastically reduced by efficiently using computer-aided design tools. Also described is a hierarchical chip-design methodology where the design is logically partitioned into self-contained timetable design units View full abstract»

• ### A review of a statistical tool set for the yield enhancement of integrated circuits

Publication Year: 1991, Page(s):128 - 133
Cited by:  Papers (4)
| |PDF (416 KB)

The authors describe a system that Harris Semiconductor has developed to aid in the analysis of circuit failures and predictions of functional yeilds. This system is based on a relational database in conjunction with the application of statistical tools. The core of the system is the relational database that uses the commercially available INGRES software. The system design is reviewed along with ... View full abstract»

• ### Characterization of ULSI gate oxide reliability using substrate and channel electron injection stresses

Publication Year: 1991, Page(s):84 - 88
| |PDF (360 KB)

A hot electron reliability characterization methodology has been developed to separate the geometry and process related degradations using BIMOS (bipolar-MOS) and SMOSC (sourced MOS capacitor) tests structures which uniformly inject the hot electrons from the substrate into the oxide. In both test structures, the gate oxide current is independently controlled from the oxide electric field. The uni... View full abstract»

• ### Reliability in VHSIC-level 1.25 μm radiation-hard CMOS IC devices

Publication Year: 1991, Page(s):107 - 112
Cited by:  Papers (2)
| |PDF (392 KB)

An experiment was performed on 1.25 μm radiation-hard, very high-speed integrated circuit (VHSIC)-level 2 K×8 static random access memory (SRAM) devices with the objective of investigating the relationship between the SRAM reliability and the die yield at wafer probe. The SRAMs were product-level devices that were included as part of a test chip, the yield/circuit/reliability analysis too... View full abstract»

• ### A fracture mechanics methodology for slow crack growth in thin polyimide films

Publication Year: 1991, Page(s):242 - 245
| |PDF (328 KB)

A fracture mechanics methodology for assessing the influence of stress and defect size on the structural integrity and life expectancy of thin polyimide films is presented. The approach is a synergistic one that combines fracture mechanics analyses and experiments to quantify slow crack in the films. A viscoelastic fracture model is used to deduce the crack growth history from load-point displacem... View full abstract»

• ### Concurrent use of two-dimensional process and device simulators in the development of a latch-up free BiCMOS process

Publication Year: 1991, Page(s):159 - 163
Cited by:  Patents (1)
| |PDF (312 KB)

Use of two-dimensional process and device simulators in predicting the latch-up immunity of a BiCMOS process is described. Recent advances have resulted in the availability of a number of simulation tools such as PISCES in the device simulation area and others such as SUPRA and SUPREM-2, -3, and -4 in the process simulation area. SUPRA was used for process modeling, and PISCES-2B for device simula... View full abstract»

• ### Bringing high technology to low technology industry

Publication Year: 1991, Page(s):13 - 18
| |PDF (408 KB)

The Indiana Microelectronics Center, using a variety of resources, was created to provide proactive assistance to Indiana companies in order to enhance their competitive position through the application of microelectronics, and in particular, ASICs (application-specific integrated circuits). A client partnership with the Indiana Microelectronics Center to complete an ASIC design generally involves... View full abstract»

• ### Low dielectric constant interconnect technology-a paradigm for interdisciplinary industry-university programs

Publication Year: 1991, Page(s):33 - 36
| |PDF (420 KB)

A multidisciplinary vertically integrated and professional-interactive industry-university research program is described. Unique features of the program include joint definition (and guidance) of research directions and priorities, extensive interactions between university and industry researchers within similar disciplines, and extensive on-campus interaction between the disciplines involved. Whi... View full abstract»

• ### A novel method of forming a thin single crystal silicon diaphragm with precise thickness for potential use in fabricating micromechanical sensors using merged epitaxial lateral overgrowth

Publication Year: 1991, Page(s):226 - 231
| |PDF (464 KB)

A novel epitaxial growth and micromachining technology were used for form a thin single-crystal silicon diaphragm for micromechanical sensors. Merged epitaxial lateral overgrowth (MELO) of silicon and SiO 2 etch-stop technology were successfully used to fabricate a diaphragm with a precise thickness. Its implementation to the formation of a large thin diaphragm is demonstrated. The sili... View full abstract»

• ### A cost analysis of operating a large integrated circuit laboratory at Rochester Institute of Technology

Publication Year: 1991, Page(s):76 - 78
Cited by:  Papers (8)
| |PDF (200 KB)

Rochester Institute of Technology (RIT) has been operating a large integrated circuit laboratory for over four years. Approximately $750000 per year is donated equipment and supplies from industry, leaving a cost of$315000 per year for operating this facility. Approximately $100000 per year is available from RIT funds the remaining$215000 is raised by an industrial associates program. Twenty one... View full abstract»

• ### Variable taper CMOS buffer design

Publication Year: 1991, Page(s):179 - 184
Cited by:  Papers (2)
| |PDF (376 KB)

A variable taper (VT) approach is proposed for the design of CMOS buffers. The minimum propagation delay obtained by using a VT buffer is approximately 12% higher than the minimum propagation delays obtained by using a conventional fixed taper (FT) approach. A modification to the initial stages of a VT buffer reduces this difference to within 2% of a FT buffer. For buffer designs with similar prop... View full abstract»