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Precision Clock Synchronization for Measurement Control and Communication (ISPCS), 2010 International IEEE Symposium on

Date Sept. 27 2010-Oct. 1 2010

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  • [Front cover]

    Page(s): c1
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  • [Copyright notice]

    Page(s): ii
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  • Table of contents

    Page(s): iii - vi
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  • Message from the program co-chairs

    Page(s): viii - x
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  • IEEE 1588 for time synchronization of devices in the electric power industry

    Page(s): 1 - 6
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (777 KB) |  | HTML iconHTML  

    There is an increasing demand on accurate time synchronization for protection and control equipment for the electrical power supply system. Today, with the proliferation of Ethernet networks in the substation automation systems, mainly driven by other standards as IEC 61850, time distribution over these networks appears to be especially appealing. NTP was already specified in IEC 61850 as time distribution mechanism, but this was only suitable for less demanding purposes. For the more challenging protection applications, IEEE 1588 seems to be the right choice. The experts in substation automation, protection, and control have already identified these issues and initiated coordinated action on this. The Power Systems Relaying Committee of the IEEE, in close coordination with the Technical Committee 57 of IEC, is currently working on a profile of PTP for Power System Applications (IEEE PC37.238). View full abstract»

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  • Using clock accuracy to guide model synthesis in distributed systems: An application in power grid control

    Page(s): 7 - 12
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (681 KB) |  | HTML iconHTML  

    Practical implementations in distributed model based control face a fundamental trade-off between model complexity and the number of modeled nodes. For linear systems, higher order models better capture the behavior of the system at higher frequencies, but the effective operating frequency range is limited during implementation due to sensor/actuator bandwidth limits, control algorithm limits and, in the case of wide scale distribution, communication bandwidth limits. The optimal choice for model order is the intersection of increasing model fidelity and the increasing generalized cost. Using existing methods for optimal model synthesis we present an evaluation of this cost in terms of clock synchronization accuracy. We show through illustrative example in the domain of large scale power transmission that there is a growing performance penalty as model order is increased in the presence of uncertain time-stamps. We discuss how this penalty can be framed as a design parameter for automated model deduction. As a corollary, we also show that the choice of a network based clock synchronization method can be formalized by using the same performance metric used for model synthesis. View full abstract»

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  • An IEEE 1588 time synchronization testbed for assessing power distribution requirements

    Page(s): 13 - 18
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (714 KB) |  | HTML iconHTML  

    Wide-area monitoring (WAM) applications for power distribution rely on accurate global time synchronization. Furthermore, there is interest in replacing current time synchronization methods such as Inter Range Instrumentation Group (IRIG), with distributed time synchronization protocols that utilize the data communication lines eliminating the need for dedicated timing signals within the substation. By understanding the factors impacting synchronization performance, the testbed facilitates the characterization of metrics needed to meet industry requirements. The testbed provides an experimental venue to explore IEEE 1588 Precision Time Protocol (PTP) technologies and determine how new features and requirements for time synchronization can impact the performance of next-generation power distribution applications. Initial results indicate PTP has the capabilities to support an accurate and scalable time synchronization solution given the components are interoperable. View full abstract»

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  • Differences and similarities between the audio video bridges and power system profiles for IEEE 1588

    Page(s): 19 - 24
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (914 KB) |  | HTML iconHTML  

    The IEEE 1588-2008 Precision Time Protocol (PTP) defined in 2008 opens the possibilities to define profiles for specific application areas. The profiles for power system application and audio/video streaming have an importance beyond their initial application domain and may have to cohabit in the near future. As an example, the smart grid initiative taking place in the power system community will lead power system and audio/video applications share common communication medium and devices. In this paper, we present the main concepts and drivers of both profiles and discuss their application in an open environment. View full abstract»

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  • Keeping clock accuracy on a master clock failure in substation network

    Page(s): 25 - 29
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1260 KB) |  | HTML iconHTML  

    Substation automation requires 4 μs accuracy and high availability of the clock synchronization mechanism. The clock synchronization protocol IEEE1588 satisfies the accuracy requirement under normal operation, but a failure on a grandmaster clock causes a large time error on the slave due to transient response by feedback loop. The failure may also trigger another failure on another grandmaster clock since IEEE1588 defines communication among them. We propose a new network architecture that utilizes IEEE802.1Q VLAN so that all grandmaster clocks can be in hot stand-by. The slave can simultaneously synchronize to and can switch between them without time error. Our proposal can also limit the impact of the failure on the other grandmaster clocks. We also describe the internal design of the slave, which consists of software of redundant feedback loops and a single oscillator. The experimental results show that the slave can keep time error under 70ns while a grandmaster clock is disconnected and the slave switches to another grandmaster clock. View full abstract»

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  • A master redundancy technique in IEEE 1588 synchronization with a link congestion estimation

    Page(s): 30 - 35
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (932 KB) |  | HTML iconHTML  

    This paper presents a master redundancy technique for improving the availability of synchronization in IEEE 1588. We propose a novel best master clock (BMC) algorithm to take account of link congestion between master and slave nodes. To determine the priority of master nodes, a BMC algorithm with a simple link congestion estimation based on a modified IEEE 1588 message sequence is used. The effectiveness of the proposed master redundancy technique is demonstrated by numerical simulation. View full abstract»

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  • Improving robustness of the synchronization quality of IEEE1588 nodes

    Page(s): 36 - 41
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (866 KB) |  | HTML iconHTML  

    Nowadays the IEEE1588 synchronization protocol has been adopted in a growing number of fields, from automation to telecommunication systems. Usually, the quality of the services provided by these applications requires an accurate and reliable time synchronization. Several solutions have been already proposed to achieve these goals. However, the statistical instruments provided in the standard (PTP variance) appear to be inadequate to identify synchronization problems while unpredictable events affect the quality of the synchronization. This paper provides alternative instruments for the analysis and improvement of the synchronization quality of a IEEE 1588 system resorting to the Reliable & Self Aware (R&SA) clock. The R&SA clock provides statistical information which are shown to be able to correctly identify the different sources of problem that can affect the synchronization. The paper then makes a proposal to take advantage of the statistical data collected for improving reliability and accuracy of PTP nodes. View full abstract»

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  • Adaptive packet selection for clock recovery

    Page(s): 42 - 47
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (737 KB) |  | HTML iconHTML  

    Packet delay variation (PDV) is a dominant source of noise in packet-based synchronization systems. To filter this type of noise, many clock recovery algorithms select packets based on the sample-minimum statistic of the network transit time. Although such a filter can be very effective in certain types of networks, there are just as many networks and background traffic patterns for which sample-minimum is far from optimal. In this paper, we propose a filter that dynamically evaluates multiple packet selection criteria and selects the one that currently minimizes the noise. We also present the results of an experimental evaluation of the new adaptive filter. View full abstract»

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  • Wireless sensors exploiting IEEE802.15.4a for precise timestamping

    Page(s): 48 - 54
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (742 KB) |  | HTML iconHTML  

    This paper deals with the application of the Chirp Spread Spectrum (CSS) modulation for the synchronization of wireless sensors. Chirp modulation is a well known technique for precise localization, originally developed for RADAR applications. When CSS is used for communication purposes, radio frequency pulses are modulated in order to convey also user data. This approach allows for robustness, thanks to processing gain deriving from pulse compression, and for high accuracy estimation of the Time of Arrival of frames. In this paper, the CSS properties have been exploited in order to arrange a robust timestamping mechanism for distributed wireless sensor networks. The proposed system is based on the CSS modulation of the IEEE802.15.4a. Since commercial transceivers do not have synchronization support, the paper is based on a CSS modulation module implemented using a software defined radio approach. The outcome is a highly flexible solution that offers the desired synchronization support, confirmed by the simulation results showing a packet timestamping capability well below one nanosecond. View full abstract»

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  • System integration of an IEEE 802.11 based TDoA localization system

    Page(s): 55 - 60
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1158 KB) |  | HTML iconHTML  

    Network entities with synchronized clocks are an enabler for many interesting and innovative applications. Localization of mobile WLAN devices by means of propagation delay measurements and position calculation according to time difference of arrival (TDoA) method is one of the most interesting applications. Those localization techniques are favored over standard signal strength based methods when high accuracy positioning is desired. This paper presents a system that utilizes special synchronized receivers in conjunction with a central unit to locate WLAN devices. The system architecture is described in terms of the integration of all participating entities for both, hardware and software. View full abstract»

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  • Software support for clock synchronization over IEEE 802.11 wireless LAN with open source drivers

    Page(s): 61 - 66
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (621 KB) |  | HTML iconHTML  

    Between the wired and the wireless world a synchronization gap in terms of accuracy obviously exists due to the different possibilities of the technologies. This paper investigates means to access WLAN functionality in order to gain system-wide synchronization between access points and clients in order to establish a common notion of time in IEEE 802.11 systems. For this, a novel approach is presented, which uses beacons to transparently transport timing information even in high-loaded wireless LAN networks. Using the presented approach jitter accuracies in the microsecond range can be reached using the open Unix WLAN driver interfaces like madwifi or ath5k. View full abstract»

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  • Synchronization of wireless sensor networks using a modified IEEE 1588 protocol

    Page(s): 67 - 70
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    A method of precise time synchronization of wireless sensors employing an IEEE 802.15.4 transceiver, and specifically employing the 6LoWPAN protocol, was developed. It uses the IEEE 1588 synchronization standard and the IEEE 1451.5 Smart Transducer Data standard. A Wireless Transducer Interface Module (WTIM) was designed and fabricated. It utilizes the IEEE 802.15.4 transceiver model TI CC2430 which allows access to a hardware sync signal. The difference in timestamps between two WTIMs was measured. The results show that the synchronization precision is better than 10 μs for short synchronization intervals but increases to about 100 μs for longer synchronization intervals (1 sec for crystal accuracies of 50 ppm). The method was tested for 6LoWPAN wireless protocol but would apply to other wireless sensors based on the IEEE 802.15.4 protocols. View full abstract»

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  • IEEE 1588 clock synchronization over IEEE 802.3/10 GBit ethernet

    Page(s): 71 - 76
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1191 KB) |  | HTML iconHTML  

    Using IEEE 1588 for highly accurate clock synchronization between nodes of a distributed system has become a widely accepted approach. IEEE 802.3/Ethernet is frequently utilized as communication layer to exchange the Precision Time Protocol (PTP) messages specified in the IEEE 1588 standard. 10/100/1000 MBit Ethernet communication is commonly used by now. In contrast, fiber optics based 10 GBit Ethernet is only in the early stages of adoption. With an increasing usage of this technology, clock synchronization via 10 GBit communication is becoming an important issue. In this paper we present an FPGA based solution for IEEE 1588 clock synchronization via 10 GBit Ethernet. Apart from the implementation details the paper focuses on communication delay jitter measurements - since jitter highly affects synchronization quality - and presents a comparison between communication jitter and previous Ethernet speeds. View full abstract»

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  • Integration of HSR and IEEE1588 over Ethernet networks

    Page(s): 77 - 82
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (602 KB) |  | HTML iconHTML  

    Some of the key infrastructure requirements for Smart Grid are the uninterrupted and reliable distribution of network data, information security and distribution of time information among network elements in order to accurately timestamp and correlate different network events. High Availability Seamless Ring (HSR) enabled networks can provide zero recovery time and PTPv2 enabled network can provide sub-microsecond accuracy. Although the integration of HSR and PTPv2 seem a natural next step to achieve high availability and time synchronization requirements of IEC61850, there are some assumptions made in the design of HSR and PTPv2 that are orthogonal in nature. This paper presents an instance of network design that integrates these two technologies by using the subset of PTPv2 without compromising network precision. Information security is beyond the scope of this paper. View full abstract»

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  • Securing IEEE 1588 by IPsec tunnels - An analysis

    Page(s): 83 - 90
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    IPsec is one of the most widespread protocols to establish secure communication for the Internet Protocol. Besides the fact that this protocol is fully integrated in the Internet Protocol suite, the main advantage of using secure tunnels for IEEE 1588 clock synchronization is the reduced maintenance effort. Instead of requiring, e.g., different key management or connection setup protocols for each application a single tunnel can be used to protect underlying services such as clock synchronization by IEEE 1588 and many other applications. This paper analyzes the usage of IPsec security mechanisms to protect the IEEE 1588 clock synchronization protocol and, in particular, its impact on the precision of clock synchronization. Straightforward application as well as dedicated designs to integrate high-precision, hardware-supported clock synchronization are investigated. Measurements show that for lower precision IPsec can be applied straightforward, for high precision dedicated modification on hardware and algorithms are required. View full abstract»

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  • Leap Second support in computers

    Page(s): 91 - 96
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (635 KB) |  | HTML iconHTML  

    The seconds-in-epoch method of representing current time in computers presents problems when required to (a) represent UTC, (b) be monotonic and (c) have sub-second accuracy, as these are contradictory requirements in the presence of Leap Seconds. We analyze various proposed solutions to this conundrum, for both operating systems and NTP. (What good is microsecond-level clock synchronization if the clock can be off by a full second?) We then propose a general solution: TAI-based system time, with conversion to UTC by comparing to a TAI-based threshold and then subtracting the appropriate Leap Second Offset. View full abstract»

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  • Accurate time synchronization in PTP-based industrial networks with long linear paths

    Page(s): 97 - 102
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (675 KB) |  | HTML iconHTML  

    Assuring very accurate time synchronization across wide area industrial networks is still an open issue, which even the second version of the Precision Time Protocol (PTPv2) has not been able to solve completely. This is due to the accumulation of many uncertainty contributions when PTP event messages are routed from the master clock to the slave one through multiple network nodes. Peer-to-peer transparent clocks may mitigate this problem. Nonetheless, poor or noisy relative clock rate estimates may drastically reduce the synchronization accuracy on the farthest nodes. In this paper Kalman filters are used to estimate and to compensate, drift rate differences, frequency skews and time offsets between pairs of adjacent transparent clocks. Although the idea of using a Kalman filter for synchronization purposes is not new per se, the proposed solution is specifically tailored to optimize the performance of networks with a long linear topology. Several simulation results confirm the validity of this approach. View full abstract»

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  • Distributed clock synchronization in discrete event simulators for wireless factory automation

    Page(s): 103 - 108
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (676 KB) |  | HTML iconHTML  

    One very interesting trend in factory automation is the introduction of wireless networks to the factory floor. This requires investigation of problems which are not present with wired technology. Tracking of mobile nodes, as well as seamless handover are such problems. Precise clock synchronization is needed to solve these new issues. For large-scale systems it is economically unreasonable to implement complete factory scenarios with prototypes in order to test for architectural, engineering, and design problems. It is mandatory to have a proper simulation environment at hand in order to study the influence of various design decisions. This paper discusses techniques of how to simulate such a large-scale system with special focus on proper modeling and simulation of distributed clocks in a discrete event simulation environment. View full abstract»

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  • Using an IEEE 802.1AS network as a distributed IEEE 1588 boundary, ordinary, or transparent clock

    Page(s): 109 - 115
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (724 KB) |  | HTML iconHTML  

    IEEE 802.1AS includes a very specific profile of IEEE 1588 that only runs at layer 2 over networks that follow the IEEE 802 architecture. It has some significant performance and scalability advantages, but at the cost of not allowing non-PTP-aware devices. This paper describes how a network having a common source of time can act as a distributed IEEE 1588 boundary, ordinary, or transparent clock, allowing the network to transport synchronization between portions of an IEEE 1588 network domain, and do this for any number of domains simultaneously. The network that acts as a distributed clock can be a PTP network supporting a profile that is different from that of the domains whose timing it is transporting. As one example, an IEEE 802.1AS network can act as a distributed IEEE 1588 boundary, ordinary, or transparent clock. As part of the discussion, the paper also shows that an IEEE 1588 boundary clock and peer-to-peer transparent clock are functionally equivalent in the manner in which they transport synchronization, and that the principal difference between the two is that the former invokes a best master clock algorithm (either default or alternate) and implements the full PTP state machine, while the latter does not. The concepts of distributed BC, TC, and OC, and the equivalence of the BC and peer-to-peer TC may be considered a new way of looking at the transport of synchronization in a network based on IEEE 1588. View full abstract»

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  • Design and implementation of a PTP clock infrastructure for the Linux kernel

    Page(s): 116 - 121
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (711 KB) |  | HTML iconHTML  

    Many distributed systems need some sort of synchronization in order to achieve their objectives. The IEEE 1588 Precision Time Protocol (PTP) was designed to achieve synchronization among distributed clocks using a non-deterministic communication medium like Ethernet. Since Linux is becoming a leading operating system in areas like distributed measurement and control or industrial automation, we found it necessary to design and implement a PTP clock infrastructure within the Linux kernel. The paper explains the overall design goals, details the decisions taken, and highlights the resulting software architecture. The case study is based on the results achieved using the new infrastructure. View full abstract»

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  • An optimal control approach to clock synchronization

    Page(s): 122 - 128
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    Algorithms following the peer-to-peer Precision Time Protocol (PTP) specified by the IEEE 1588 standard achieve synchronization of distributed clocks by propagating the timing information of a preselected master clock throughout the entire network. Based on this noisy timing information, each slave clock tries to follow as closely as possible the master time. In this work we formulate clock synchronization as a stochastic estimation-control problem. A two dimensional LQG controller is derived which produces an optimal reconstruction of the master time at each slave in the sense of minimizing the mean square error of the estimated master counter and frequency. Owing to its specific structure, the LQG controller does not violate the transparent clock concept. The performance of the proposed controller is verified by simulations. View full abstract»

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