Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)

29-29 May 1998

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  • Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)

    Publication Year: 1998
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  • Table of contents

    Publication Year: 1998, Page(s):v - x
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    Freely Available from IEEE
  • Index of authors

    Publication Year: 1998, Page(s):383 - 384
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    Freely Available from IEEE
  • An error reducing approach to machine learning using multi-valued functional decomposition

    Publication Year: 1998, Page(s):167 - 172
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (152 KB)

    This paper considers minimization of incompletely specified multi-valued functions using functional decomposition. While functional decomposition was originally created for the minimization of logic circuits, this paper uses the decomposition process for both machine learning and logic synthesis of multi-valued functions. As it turns out, the minimization of logic circuits can be used in the conce... View full abstract»

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  • Learning with permutably homogeneous multiple-valued multiple-threshold perceptrons

    Publication Year: 1998, Page(s):161 - 166
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (180 KB)

    The (k,s)-perceptrons partition the input space {0,..., k-1}n into s+1 regions using s parallel hyperplanes. Their learning abilities are examined in this paper. The previously studied homogeneous (k, k-1)-perceptron learning algorithm is generalized to the permutably homogeneous (k,s)-perceptron learning algorithm with guaranteed convergence property. We also introduce a powerful lear... View full abstract»

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  • On concurrent tests of fuzzy controllers

    Publication Year: 1998, Page(s):356 - 361
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (140 KB)

    In this paper, we propose concurrent tests of fuzzy controllers. We assume multiple stuck-at faults in membership functions. For tests of antecedent membership functions, we observe the sum of degrees by matching a current measured input with each function and that of degrees at several easily calculated co-ordinates. For tests of consequent ones, we observe the sum of their maximum degrees, that ... View full abstract»

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  • Image segmentation based on Kleene algebra

    Publication Year: 1998, Page(s):155 - 160
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (184 KB)

    This paper proposes a segmentation method based on Kleene Algebra. For an input image including some regions of interests (ROIs for short), consider three segmented states: Shortage, Correct, Excess for the target region on applying segmentation method based on standard intensity thresholding. For the target image, we do thresholding to each of ROIs, then to derive all “Correct” for RO... View full abstract»

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  • Membership functions in automatic harmonization system

    Publication Year: 1998, Page(s):350 - 355
    Cited by:  Papers (5)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (104 KB)

    We propose fuzzy reasoning to put harmony to melody in automatic harmonization system. We have been considering the following fuzzy sets and membership functions in the system. The system has two fuzzy sets of “conformability between melody and tonality” as the degree of fitness μA(yn) and “conformability between tonality and relative keys” as the d... View full abstract»

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  • Wave-parallel computing systems using multiple-valued pseudo-orthogonal sequences

    Publication Year: 1998, Page(s):148 - 153
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (272 KB)

    A Wave-Parallel Computing (WPC) technique is proposed to address the interconnection problem in massively interconnected VLSI architectures. The fundamental concept is the multiplexing of several signals onto a single line using orthogonal sequences as information carriers. To reduce MUX/DEMUX circuits, we propose WPC concept which can process multiplexed data directly without decomposition. We in... View full abstract»

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  • Look-up table FPGA synthesis from minimized multi-valued pseudo Kronecker expressions

    Publication Year: 1998, Page(s):95 - 100
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (116 KB)

    In this paper we outline a method for Look-up Table-FPGA (LUT-FPGA) synthesis from minimized Multi-Valued Pseudo Kronecker Expressions (MV PSDKROs). By restricting logic minimization to consider only easily mappable expressions, a regular Cellular Architecture (CA) layout without routing overhead is obtained. In this way our method combines logic minimization, mapping and routing. The transformati... View full abstract»

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  • A proposal and an application of a career-mode membership function

    Publication Year: 1998, Page(s):344 - 349
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (100 KB)

    This paper shows a proposal and this application of a new membership function based on a career-mode. The career-mode corresponds to a transition direction of non-fuzzy input and outputs as selecting it from among the grade that an ambiguity define by means of two degrees. Here against a hardware development we improve the crossover distortion of the threshold control of multi-valued multi-thresho... View full abstract»

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  • Evolutionary methods in the design of quaternary digital circuits

    Publication Year: 1998, Page(s):89 - 94
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (116 KB)

    This paper is concerned with the design of optimal CMOS 4-valued digital circuits. After an analysis of the problems in the logic design of quaternary circuits it is shown that evolutionary methods may be effectively used do obtain optimal cost-table based circuit realizations of both full specified and incompletely specified quaternary functions View full abstract»

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  • Some results on the decision for Sheffer functions in partial K-valued logic. II

    Publication Year: 1998, Page(s):77 - 81
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (40 KB)

    In multiple-valued logic theories, the characterization of Sheffer (1913) functions is an important problem, it includes the decision and construction for Sheffer functions in Pk and Pk*. The solution of these problems depends on the solution of the decision problem of completeness in Pk and Pk*, and reduced to determining the minimal coverings of precom... View full abstract»

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  • Functional entropy and decision trees

    Publication Year: 1998, Page(s):257 - 262
    Cited by:  Papers (14)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (208 KB)

    We introduce a technique to compute several information estimations for Boolean and multivalued functions. Special features of these estimations for completely and incompletely specified logic functions, including symmetric logic functions are investigated. Finally, we give an algorithm for determining various information measures for logical functions based on decision trees View full abstract»

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  • On the properties of multiple-valued functions that are symmetric in both variable values and labels

    Publication Year: 1998, Page(s):83 - 88
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (132 KB)

    Functions that are symmetric in both variable labels and variable values are useful as benchmarks for logic minimization algorithms. The present the properties of such functions, showing that they are isomorphic to partitions on n (the number of variables) with no part greater than r (the number of logic values). From this, we enumerate these functions. Further we derive lower bounds, upper bounds... View full abstract»

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  • Data envelopment analysis using fuzzy concept

    Publication Year: 1998, Page(s):338 - 343
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (872 KB)

    Mathematical programming is one of the areas to which fuzzy set theory has been applied extensively. Primarily based on Bellman and Zadeh's model of decision in fuzzy environments, models have been suggested which allow flexibility in constraints and nonlinear programming. Data envelopment analysis (DEA) is a method of evaluating relative efficiencies for a group of similar units based on an effic... View full abstract»

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  • Compact propositional Godel logics

    Publication Year: 1998, Page(s):108 - 113
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (124 KB)

    Entailment in propositional Godel logics can be defined in a natural way. While all infinite sets of truth values yield the same sets of tautologies, the entailment relations differ. It is shown that there is a rich structure of infinite-valued Godel logics, only one of which is compact. It is also shown that the compact infinite-valued Godel logic is the only one which interpolates, and the only ... View full abstract»

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  • Fast multi-polarity complex Hadamard transform for logic functions

    Publication Year: 1998, Page(s):180 - 185
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1080 KB)

    A new formulation of Fast Multi-Polarity Complex Hadamard Transform has been introduced. Forward and inverse transformation kernels and the ways of recursive generation of transform matrices by using Kronecker products of elementary matrices have been given. Mutual relations among transform matrices and spectra for arbitrary polarities have been presented. Efficient ways of calculating spectra for... View full abstract»

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  • Multiple-valued floating-gate-MOS pass logic and its application to logic-in-memory VLSI

    Publication Year: 1998, Page(s):270 - 275
    Cited by:  Papers (4)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (168 KB)

    A new logic-in-memory VLSI architecture based on multiple-valued floating-gate MOS pass logic is proposed to solve communication bottleneck between memory and logic modules. Multiple-valued stored data are represented by the threshold voltage of a floating-gate MOS transistor, so that a single floating-gate MOS transistor is effectively employed to merge multiple-valued threshold-literal and pass-... View full abstract»

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  • A synthesis method of the approximate reasoning engine by means of genetic algorithm-neural net realization of any multiple-valued logic function using GA

    Publication Year: 1998, Page(s):201 - 208
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1308 KB)

    In a series of papers, the author proposed an approximate reasoning method which expresses reasoning rules with one newly-defined infinitely-valued threshold function to use it as a reasoning engine, and discussed the advantages and limitations to the fuzzy reasoning. The subject of this paper is the remained problem: how to express the complicated reasoning rules containing non-linearity, non-una... View full abstract»

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  • A novel nonlinear synapse neuron model guaranteeing a global minimum-Wavelet Neuron

    Publication Year: 1998, Page(s):335 - 336
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (72 KB)

    A novel nonlinear synapse neuron model named Wavelet Neuron is proposed, which realizes effective establishment of approximate wavelet expansion by learning instead of analytical procedure. The distinctive features of the model are guarantee of a global minimum and three decades higher speed of learning than feedforward multilayer neural networks View full abstract»

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  • Advanced circuit technology to realize post giga-bit DRAM

    Publication Year: 1998, Page(s):2 - 5
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (480 KB)

    A 4-Gb DRAM with multilevel-storage memory cells has been developed. This large memory capacity is achieved by storing data at four levels, each level corresponding to the two-bit-data storage of a single memory cell. The four-level storage reduces the effective cell size by 50%. A sense amplifier that uses charge coupling and charge sharing was developed for the four level sensing and restoring o... View full abstract»

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  • The MacLaurin's and Taylor's series expansions of the symbolic multiple valued logic functions

    Publication Year: 1998, Page(s):65 - 70
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (796 KB)

    Generally, multiple valued logic algebra is based on the number system of modulo-M. In this paper, characters a, b, c,… each of which represents the independent state, are regarded as the elements of the symbolic multiple valued logic. By using set theory, the symbolic multiple valued logic and their functions are defined. Variations of the symbolic logic function due to the variation of a ... View full abstract»

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  • Set-valued logic circuits for next generation VLSI architectures

    Publication Year: 1998, Page(s):140 - 147
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (452 KB)

    This paper presents the concept of “set-valued logic” as a foundation for next-generation integrated systems free from interconnection problems. The set-valued logic system employs multiplexable information carriers to achieve highly parallel processing with reduced interconnections. This paper also proposes a new approach to the construction of set-valued logic VLSIs employing pseudo-... View full abstract»

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  • Ternary decision diagrams with inverted edges and cofactoring-an application to discrete neural networks synthesis

    Publication Year: 1998, Page(s):58 - 63
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (220 KB)

    A central issue in multiple valued logic design is the definition of a complete methodology that starting from a raw input/output description of the desired behaviour could give a detailed netlist of a circuit implementing it. The use of Decision Diagram techniques to represent multiple-valued functions, together with new learning algorithms derived from Neural Network theory may help in building ... View full abstract»

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