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ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors

Date 7-9 July 2010

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  • [Front cover]

    Publication Year: 2010, Page(s): c1
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  • [Blank page]

    Publication Year: 2010, Page(s): 1
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  • [Title page]

    Publication Year: 2010, Page(s): 1
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  • [Blank page]

    Publication Year: 2010, Page(s): 1
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  • [Title page]

    Publication Year: 2010, Page(s): 1
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  • [Copyright notice]

    Publication Year: 2010, Page(s): 1
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  • Table of contents

    Publication Year: 2010, Page(s):v - ix
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  • Message from the conference chairs

    Publication Year: 2010, Page(s): x
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  • Conference organizers

    Publication Year: 2010, Page(s): xi
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  • Program Committee

    Publication Year: 2010, Page(s):xii - xiii
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  • External referees

    Publication Year: 2010, Page(s): xiv
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  • Keynotes

    Publication Year: 2010, Page(s): 1
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (22 KB)

    Provides an abstract for each of the keynote presentations and a brief professional biography of each presenter. The complete presentations were not made available for publication as part of the conference proceedings. View full abstract»

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  • [Blank page]

    Publication Year: 2010, Page(s): 1
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  • Convergence of design and fabrication technologies, a key enabler for HW-SW integration

    Publication Year: 2010, Page(s): 3
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  • The light at the end of the CMOS tunnel

    Publication Year: 2010, Page(s):4 - 9
    Cited by:  Papers (1)
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  • [Blank page]

    Publication Year: 2010, Page(s): 1
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  • Session 1: Mapping for multi-core architectures [breaker page]

    Publication Year: 2010, Page(s): 1
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  • [Blank page]

    Publication Year: 2010, Page(s): 1
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  • Dynamic code mapping for limited local memory systems

    Publication Year: 2010, Page(s):13 - 20
    Cited by:  Papers (14)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (862 KB) | HTML iconHTML

    This paper presents heuristics for dynamic management of application code on limited local memories present in high-performance multi-core processors. Previous techniques formulate the problem using call graphs, which do not capture the temporal ordering of functions. In addition, they only use a conservative estimate of the interference cost between functions to obtain a mapping. As a result prev... View full abstract»

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  • Design of an Automatic Target Recognition algorithm on the IBM Cell Broadband Engine

    Publication Year: 2010, Page(s):21 - 28
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1045 KB) | HTML iconHTML

    The paper presents the design of an Automatic Target Recognition (ATR) algorithm on the IBM Cell Broadband Engine (Cell BE). The implementation utilizes several optimizations that exploit both the specific algorithm constructs of the ATR and the architectural features of the Cell processor. We discuss a total of 8 optimizations and present performance improvements achieved by their application. Th... View full abstract»

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  • Highly efficient mapping of the Smith-Waterman algorithm on CUDA-compatible GPUs

    Publication Year: 2010, Page(s):29 - 36
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (162 KB) | HTML iconHTML

    This paper describes a multi-threaded parallel design and implementation of the Smith-Waterman (SW) algorithm on graphic processing units (GPUs) with NVIDIA corporation's Compute Unified Device Architecture (CUDA). Central to this is a divide and conquer approach which divides the computation of a whole pairwise sequence alignment matrix into multiple sub-matrices (or parallelograms) each running ... View full abstract»

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  • Session 2: Design space exploration [breaker page]

    Publication Year: 2010, Page(s): 1
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  • [Blank page]

    Publication Year: 2010, Page(s): 1
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  • ImpEDE: A multidimensional design-space exploration framework for biomedical-implant processors

    Publication Year: 2010, Page(s):39 - 46
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (165 KB) | HTML iconHTML

    The demand for biomedical implants keeps increasing. However, most of the current implant design methodologies involve custom-ASIC design. The SiMS project aims to change this process and make implant design more modular, flexible, faster and extensible. The most recent work within the SiMS context provides ImpEDE, a framework based on a multiobjective genetic algorithm, for automatic exploration ... View full abstract»

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  • Design space exploration of parametric pipelined designs

    Publication Year: 2010, Page(s):47 - 54
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (302 KB) | HTML iconHTML

    This paper shows how a general form of algorithms consisting of a loop with loop-carried dependencies of one can be mapped to a parametric hardware design with pipelining and replication features. A technology-independent parametric model of the proposed design is developed to capture the variations of area and throughput with the number of pipeline stages and replications. This model allows rapid... View full abstract»

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