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Solid-State Circuits Conference, 1989. ESSCIRC '89. Proceedings of the 15th European

Date 20-22 Sept. 1989

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Displaying Results 1 - 25 of 71
  • Covers

    Publication Year: 1989, Page(s): 1
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  • Copyright page

    Publication Year: 1989, Page(s): 1
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  • Proceedings of the 15th European Solid-State Cicruit Conference

    Publication Year: 1989, Page(s): I
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  • Technical Programme Committee/Programmkomitee ESSCIRC '89

    Publication Year: 1989, Page(s): III
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  • National Organizing Committee/Osterr. Organisationskomittee ESSCIRC '89

    Publication Year: 1989, Page(s): III
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  • Scientific Publications Committee/Wissenschaftliches Redaktionskomitee

    Publication Year: 1989, Page(s): III
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  • Table of contents

    Publication Year: 1989, Page(s):V - VII
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  • ESPRIT VLSI Design Skills Training Action

    Publication Year: 1989, Page(s):1 - 2
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (133 KB)

    Within ESPRIT Basic Research Actions the Commission of the European Communities has set up a special initiative to provide on a European scale: access for academic institutions to industrial processing facilities and enhancement of academic capacity to train engineer in VLSI design. View full abstract»

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  • A 24-Bit Block Floating Point Digital Signal Processor

    Publication Year: 1989, Page(s):3 - 6
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1120 KB)

    A CMOS 24-bit Block Floating Point Digital Signal Processor chip for Sonar applications is described. The device integrates data and program memory, two arithmetic processing elements, and address generator in a single chip providing a performance improvement of up to ten times that available using standard DSP devices for Sonar signal processing. The device has been implemented on a 1.4 micron tw... View full abstract»

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  • A 54 MHz CMOS Programmable Video Signal Processor for HDTV Applications

    Publication Year: 1989, Page(s):7 - 10
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1894 KB)

    A 54 MHz CMOS Video Processor with a systolic architecture suited for 2D symmetric FIR filtering will be reported. The circuit is a ID digital filter comprised of a control part and an array of 8 Multiplication-Accumulation cells. This processor is capable of handling 32 equivalent multiply-add operations in a sampling period as short as 18 ns. Devices can be cascaded to increase the order of the ... View full abstract»

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  • A Highly Adaptive Rank Order Filter LSI for Two-Dimensional Video Signal Processing

    Publication Year: 1989, Page(s):11 - 14
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1704 KB)

    A bit-sliced rank order filter LSI for real-time two-dimensional processing of TV video signals has been developed, fabricated by 2 um CMOS standard cell technology. The LSI architecture, suitable for real-time and adaptive processing and enabling the input word length to be easily expanded, is presented. View full abstract»

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  • A 27 MHz Programmable Module for VSP

    Publication Year: 1989, Page(s):15 - 18
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (526 KB)

    This paper describes a programmable logic module for the real-time processing of video signals. This module is part of a set of programmable modules, sharing a common communication strategy, that can be combined to realise an Integrated Circuit capable of handling complex video algorithms. The inputs to the module are first selected via a switch matrix and then stored in a two-port dynamic RAM to ... View full abstract»

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  • A Gate-Array Implementation of a DC-Motor Control System

    Publication Year: 1989, Page(s):19 - 22
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1455 KB)

    A digital chip has been designed for a permanent-magnet DC motor control system based on pulse-width modulation techniques. The control system is used for cordless drilling and screwdriver machines. The system is implemented on a new, low latch-up susceptibility CMOS gate array. View full abstract»

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  • A 700 Volts Interface IC for Power Bridge Circuits

    Publication Year: 1989, Page(s):23 - 26
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1699 KB)

    In this paper a 700 Volts integrated interface circuit is described, which provides the gate drive for the high-side and the ground-side power MOS transistor in an off-line half-bridge circuit. Ground separation for good inter-system EMC and a number of new provisions to alleviate control requirements towards the low power system control part are included. View full abstract»

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  • Passive Silicon Carrier High Performance Package for VLSI

    Publication Year: 1989, Page(s):27 - 30
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1125 KB)

    A silion-on-silicon package for 9 VLSI chips is presented. The carrier is especially designed to support the high frequency current surges of complementary logic like CMOS or BICMOS. It contains integrated decoupling capacitors and uses 3 layers of metal. The chips are mounted via 'controlled collapse chip connection'. A /370 processor containing 9 CMOS chips has been assembled.Functionality and m... View full abstract»

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  • Noise Considerations on High Density DRAMs: Problems and Solutions

    Publication Year: 1989, Page(s):31 - 34
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1426 KB)

    On-chip generated noise limits further miniaturization of DRAMs. The basis for consideration is a model including the effects of ohmic voltage drop and bond wire inductances. SPICE simulations are used to study the performance that results from chip architecture, circuit placement and circuit design. The results are verified by experimental data. View full abstract»

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  • Sigma-Delta versus Binary Weighted AD/DA conversion, what is the most promising?

    Publication Year: 1989, Page(s):35 - 63
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2096 KB)

    Though conversion of analog signals to and from digital data is supposed to be a mature, well defined technology, the application in digital signal processing like digital audio unveiled a number of neglected artifacts. Also the correlation between audibility and type of imperfection in the converted signal is only partly covered. Test signals as used on CD records explore only a small part of the... View full abstract»

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  • A Flexible Module Library for Custom DSP Applications in a Multiprocessor Environment

    Publication Year: 1989, Page(s):64 - 67
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2259 KB)

    In this paper, the module library for the CATHEDRAL-II synthesis environment is discussed. The underlying architectural style is denned as a hierarchical composition of flexible and parameterizable data-paths, microcoded control units, interprocessor communication protocols and I/O interfaces. This paper discusses the module library for the data-paths. The general philosophy behind this library, t... View full abstract»

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  • GrapMG: Cost-effective module generation

    Publication Year: 1989, Page(s):68 - 71
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (574 KB)

    GrapMG is a module generator environment in which an IC-designer is able to make parametrized layout modules in a flexible way. With grapMG some very complex modules have been designed for use in a silicon compiler for digital signal processing chips. Successful application of module generation in this compiler is made possible because a new design strategy simplifies the adaptation of modules to ... View full abstract»

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  • A basic CAD-tool for module generation

    Publication Year: 1989, Page(s):72 - 75
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (758 KB)

    A basic CAD-tool using a simple grid-like floorplan for placement of cells of varying sizes is presented. It is focused on the generation of physical and behavioural descriptions of data paths but is also suit able for random logic, data path controllers containing PLA's, registers, counters etc. and for analog designs containing OP's, capacitors etc. Two different types of floorplans can be chose... View full abstract»

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  • RIM: Routing Into Macrocells and application to an arithmetic processor

    Publication Year: 1989, Page(s):76 - 79
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1161 KB)

    This paper presents first a silicon assembler and then a router. The two programs have to be described together since the router uses tracks, terminals and obstacles that are build by the assembler. Using tracks that run inside the macrocells dramatically reduces the area demanded for routing. An example of assembling and routing of a mathematical functions processor [1,2,3] is provided at the end... View full abstract»

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  • An Analog-Oriented Routing Tool for CMOS Analog Integrated Circuits

    Publication Year: 1989, Page(s):80 - 83
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (545 KB)

    The performance of analog ICs strongly depends on layout characteristics. After identifying the various categories of placement and routing constraints, this paper describes a routing strategy dedicated to take into account those specific analog features. Working in close coordination with an analog placement tool, the new routing tool uses global and local routing techniques that can handle the v... View full abstract»

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  • A Single Power Supply 10Bit Video Bi-CMOS Sample-and-Hold IC

    Publication Year: 1989, Page(s):84 - 87
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (940 KB)

    A new single power supply 10bit video Bi-CMOS sample-and-hold IC is described. High speed, low power and high-accuracy sample-and-hold operation has been achieved using the complementary connected buffer type sample switch. The equivalent PNP transistor is formed by the combination of NPN and PMOS transistors. The sample-and-hold IC has been implemented in 1.2um Bi-CMOS technology. The acquisition... View full abstract»

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  • A Novel All - NPN Sample And Hold Circuit

    Publication Year: 1989, Page(s):88 - 91
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (875 KB)

    This paper describes a monolithic sample and hold circuit with performance competitive with state of the art hybrid systems. It is based on a differential amplifier with gain of unity, which has a feedback loop in the hold mode to ideally get a droop rate of zero. The outstanding electrical characteristics of this S&H - circuit are the 120 MHz 3- dB bandwidth and an acquisition time of only 12... View full abstract»

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  • Optimization of an Oversampling Feedback Coder for Signal Processing Chips

    Publication Year: 1989, Page(s):92 - 95
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1445 KB)

    This paper describes the design of a special type of oversampling coder, a so called adaptive interpolative delta modulator. This type of coder incorporates most of the known tricks for improving the signal to noise ratio of an oversampling feedback coder. This system provides higher quality of the processable code than other coders. Due to that fact, the oversampling ratio is substantially reduce... View full abstract»

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