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3rd Annual Symposium on Switching Circuit Theory and Logical Design (SWCT 1962)

7-12 Oct. 1962

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Displaying Results 1 - 19 of 19
  • [Front cover]

    Publication Year: 1962, Page(s): C1
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    Freely Available from IEEE
  • Table of contents

    Publication Year: 1962, Page(s): c2
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    Freely Available from IEEE
  • Foreword

    Publication Year: 1962, Page(s): i
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    Freely Available from IEEE
  • On the minimal third order expression of a Boolean function

    Publication Year: 1962, Page(s):5 - 24
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2333 KB)

    The determination of the minimal third-order expression of a Boolean function (sum of products of sums or product of sums of products of the variables) is pratically an un solved problem. In this paper a procedure is set forth for the determination of the mini mal sum of products of sums; this procedure, if applied also to the complementary of the function assigned, makes it possible to determine,... View full abstract»

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  • Research and algorithms in the theory of Boolean formulas

    Publication Year: 1962, Page(s):25 - 32
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1062 KB)

    Several algorithms are presented, more or less directly related to the "minimization" theory of Boolean formulas. They give solutions to the following specific problems: computation of the sum of all the "prime implicants", starting with any "normal" formula; verification of the equivalence F a/ for "normal" formulas F; determination of some or all of the minimal F-including sets. The last problem... View full abstract»

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  • The algebra of Boolean formulas: Some criteria for minimaity

    Publication Year: 1962, Page(s):33 - 48
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1692 KB)

    Several algorithms are presented, more or less directly related to the "minimization" theory of Boolean formulas. They give solutions to the following specific problems: computation of the sum of all the "prime implicants", starting with any "normal" formula; verification of the equivalence F a/ for "normal" formulas F; determination of some or all of the minimal F-including sets. The last problem... View full abstract»

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  • Minimal Boolean expressions with more than two levels of sums and products

    Publication Year: 1962, Page(s):49 - 60
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (572 KB)

    This paper presents a new approach to the problem of multi-level Boolean minimization. Conventional two-level minimization methods are embedded in a process that makes extensive use of the properties of incompletely specified functions. Particular attention is given to the problem of obtaining minimal sums-of-products-of-sums. Then the approach is extended to minimal expressions with more than thr... View full abstract»

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  • Machine properties preserved under state minimization

    Publication Year: 1962, Page(s):61 - 70
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1000 KB)

    Most of the published material concerning "state minimization of incompletely specified machines" has been concerned with finding an algorithm which yields a minimum state machine M' which satisfies [ER, p. 132] a given machine M. A fundamental theorem, in this connection, is given in [PU]. We are concerned here primarily with properties which some or all machines M' inherit from M. View full abstract»

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  • A procedure for obtaining an economical asynchronous sequential circuit directly from a set of regular expressions

    Publication Year: 1962, Page(s):71 - 80
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1295 KB)

    Ways of using Regular Expressions in the synthesis of a minimal sequential circuit have previously been presented. These methods consist of first finding an unreduced sequential circuit corresponding to the set of Regular Expressions and then using standard reduction techniques to find a minimal circuit. A method of finding a sequential circuit directly from the Regular Expressions is presented he... View full abstract»

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  • States of sequential machines whose logical elements involve delay

    Publication Year: 1962, Page(s):81 - 90
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (882 KB)

    There are synchronous sequential machines which cannot conveniently be described by the conventional models when one permits delays in the logical elements themselves. An algebra useful in the design of these circuits is due originally to Tryon and is detailed by the present author in (1). When the delays are taken into account, new temporal relations between states, inputs, and outputs appear. Th... View full abstract»

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  • Reduction of feedback loops in sequential circuits and carry leads in iterative networks

    Publication Year: 1962, Page(s):91 - 102
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1552 KB)

    Techniques are presented for making use of "previous" inputs and outputs in designing sequential circuits and iterative networks. Theorems are proved regarding the maximum reduction in feedback loops or carry leads which can be obtained by the use of such techniques. An algorithm for testing whether a given state table corresponds to a definite event results as a by-product of the more general tec... View full abstract»

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  • The synthesis of cascade switching circuits

    Publication Year: 1962, Page(s):103 - 122
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2663 KB)

    The problem of synthesizing switching circuits which compute a given, completely-specified switching function is considered. A new point-of-view, in which switching circuits are considered to be realizations of algorithms rather than interpretations of truth-functional formulae, is adopted. A restricted class of algorithms, called the cascade algorithms, is identified and it is suggested that tree... View full abstract»

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  • Some theorems for incompletely specified sequential machines with applications to state minimization

    Publication Year: 1962, Page(s):123 - 136
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2064 KB)

    Let M be an incompletely specified sequential machine and Q be the set of internal states of M. We derive certain properties for classes of subsets of Q with particular emphasis on certain classes of compatible sets of states, subsequently called C-classes for M. We then briefly describe state minimization algorithms using these properties. The following types of theorems are proved: From an arbit... View full abstract»

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  • Bounded-transient automata

    Publication Year: 1962, Page(s):137 - 142
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (416 KB)

    A bounded-transient finite automaton is an automaton for which a single change of an input will not affect the output "far away." This paper investigates the class of events which bounded-transient automata can compute and shows that this class of events is a generalization of the class of definite events. A method of determining whether or not a finite automaton is bounded-transient is described,... View full abstract»

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  • Generalized automata and their information losslessness

    Publication Year: 1962, Page(s):143 - 148
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (418 KB)

    A generalized model of automata is defined in which the outputs are sequences of letters (rather than single letters) for each input letter. The output sequences are transmitted without spacing, just as in the case of variable length codes. The paper describes a test for determining whether a given generalized automaton is information lossless, and if so, whether information lossless of finite ord... View full abstract»

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  • Synthesis of combinational logic using three-input majority gates

    Publication Year: 1962, Page(s):149 - 158
    Cited by:  Papers (32)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1019 KB)

    This paper examines the problem of synthesizing a switching function using only majority gates. It is assumed that the switching function is given in truth-table form where any "don't care" input combinations have simply been omitted from the table. First, a theorem is derived which indicates those complemented variables and constants which must be added as additional columns of the truth-table in... View full abstract»

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  • A realization procedure for threshold gate networks

    Publication Year: 1962, Page(s):159 - 168
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1161 KB)

    One engineering parameter of importance in the realization of threshold gate networks is the tolerance which must be placed on the coefficients and threshold: of the individual components. A previous paper gives a realization procedure which allows this tolerance to be controlled. The present paper gives an alternate realization procedure which also allows the tolerance to be controlled, but which... View full abstract»

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  • Generation of self-dual threshold functions and lower bounds of the number of threshold functions and a maximum weight

    Publication Year: 1962, Page(s):169 - 184
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1448 KB)

    This paper consists of the following: recursive methods of generating self-dual threshold functions, a class of self-dual threshold functions which have interesting properties, a lower bound of the number of threshold functions, and a lower bound of a maximum weight. Any threshold function can be reduced from a self-dual threshold function by assigning 1 or 0 to some variable. In this paper, discu... View full abstract»

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  • On some transformation theorems in many-valued logical systems

    Publication Year: 1962, Page(s):185 - 199
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1612 KB)

    Since the well-known DeMorgan theorem in two-valued logical systems may be considered as a special transformation theorem, we are interested in finding its counterpart in many-valued logical systems. Some basic concepts and theorems regarding the existence of duality and N-ality relationships due to transformations in many-valued logical systems are introduced in terms of isomorphism. On the basis... View full abstract»

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