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Advanced Thermal Processing of Semiconductors, 2009. RTP '09. 17th International Conference on

Date Sept. 29 2009-Oct. 2 2009

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  • Contents

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  • Call for papers

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  • RTP conference achievement awards

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  • Expanded application space for laser spike annealing of CMOS devices

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (222 KB) |  | HTML iconHTML  

    LSA was first introduced into mainstream semiconductor manufacturing for logic IC's at the 65 nm node, continuing the natural evolution of semiconductor thermal processing to higher temperatures (>1200°C) and shorter times (100's of microseconds). The initial application was a simple one-step LSA to assist spike-RTA in dopant activation of the source/drain and polysilicon gate regions. Since then, LSA has proliferated to other junction engineering steps in the high temperature/low dwell time regime. As devices scale to sub-45 nm nodes, there are opportunities for LSA to expand to alternative applications in other regions of temperature-time (T-t) process space. This paper will discuss the application of LSA to logic IC manufacturing within the framework of T-t process space, which is divided into three regimes: 1. High temperature, 2. Long dwell time, and 3. Low temperature. We describe how the design of the LSA system enables access to these three T-t regimes, and discuss current and future applications for each regime. View full abstract»

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  • Advances in Si & Ge millisecond processing: From silicon-on-insulator to superconducting Ge

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (276 KB) |  | HTML iconHTML  

    Advanced SOI material can be treated in advantageous manner regarding ultra shallow junction (USJ) formation using millisecond annealing techniques. Especially, strained Si and SiGe/Si heterostructures on insulator (sSOI and sHOI) are promising channel materials for future nanoelectronic devices. Their successful integration into new device architectures depends on the ability of forming ultra shallow and ultra steep junctions. We present results for dopant activation in SOI, sSOI, HOI and sHOI. Flash Lamp Annealing (FLA) allows complete suppression of diffusion while obtaining sheet resistances lower than 500 ¿/¿ in both, SOI and sSOI. Strained and unstrained SiGe heterostructures indicated significant diffusional broadening of Sb implant profiles and low electrical activation. In contrast, B shows higher activation but significant dopant loss in the near surface region. Moreover, we demonstrate that, after diamond and silicon, the third elemental group-IV semiconductor, germanium, exhibits superconductivity at ambient pressure. For the first time, techniques of the state-of-the-art semiconductor processing as ion implantation and FLA were used to fabricate such material, i.e. a highly Ga-doped Ge (Ge:Ga) layer in near-intrinsic Ge. It is shown that superconductivity can be generated and tailored in the Ge host at temperatures as high as 0.5 K. Results of critical-field measurements demonstrate the quasi-two-dimensional character of superconductivity in the 60 nm thick Ge:Ga layer. View full abstract»

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  • Application of laser annealing in the EU FP6 project D-DotFET

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    Full-melt high-power excimer laser annealing is investigated as a means of activating implanted source/drain regions in a MISFET structure, which could be positioned on a SiGe dot in such a manner that strain is transferred to the channel region. Such a ¿DotFET¿ device is the focus of the EU FP6 project D-DotFET. A MISFET structure fabricated at suitably low processing temperatures, below 400°C, is demonstrated with a metal/high-k gate-stack that is self-aligned to laser-annealed S/D regions. View full abstract»

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  • Application and advantages of larger Boron cluster ions for 22nm and beyond technology nodes

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (360 KB) |  | HTML iconHTML  

    Cluster ion implantation offers an attractive alternative approach to realize applications in semiconductor devices at 22 nm node and beyond. We present here the advantages of cluster ions with their special property of creating self-amorphous layer even at a lower dose. Here we show XTEM, SIMS and sheet resistance (Rs) measurements to elucidate the advantages of heavier cluster ion species like B36, B18 and C16. Using millisecond anneal technologies we show here that one can meet ultra-shallow junction depth (Xj) requirements as well as very low sheet resistance values. View full abstract»

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  • 22nm node p+ junction scaling using B36H44 and laser annealing with or W/O PAI

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    B36H44 molecular dopants were implanted at 100 eV and 1E15/cm2 B equivalent energy and dose to achieve Xj<7nm and selected wafers also had various PAI (pre-amorphizing implantation) using Ge 10 keV, Xe 14 keV and In 14 keV to create an amorphous layer 16-17 nm deep. All the wafers were MSA (msec annealed) by DSA laser at 1175°C, 1225°C, 1275°C and 1325°C and the results show that the Rs and Bss values for B36H44 without PAI was always better than those reported using monomer B and BF2 with MSA even though the retained dose was only 67% compared to 100% for monomer B and 55% for BF2 and we noted that the surface oxide directly affects the retained dose. Adding Ge or In PAI had no effect on dopant activation due to the self-amorphization effects of B36H44 however, Xe-PAI improved activation by 20% but degraded junction leakage. In-PAI also had the highest lifetime. However, we noted that Xe-PAI behaves differently compared to Ge-PAI and In-PAI, TW values were always much higher and independent of the anneal technique (MSA, spike/RTA or furnace anneal) even though no defects could be detected by X-TEM suggesting uniform distribution of vacancy cluster defects throughout the amorphous region. View full abstract»

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  • Damage evolution in implanted silicon by pulsed excimer laser annealing

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    The evolution of the implantation damage during a Pulsed Laser thermal annealing process is investigated by means of an accurate modeling which could stimulates focused experimental analyses. The model is based on the simulation of the detailed kinetic of the defect system in the extremely far-from-equilibrium conditions caused by the laser irradiation in the non-melting, melting and partial melting regimes. It considers defect (interstitials Is and vacancies Vs) clustering and annihilation in presence of fast varying temperature, high thermal gradients and phase transition. Simulations allow a characterization of the residual damage (in terms of total residual defect's density and cluster size distribution) as a function of the process conditions (i.e. laser fluence). The thermal budget supplied to the system in the submelting regime is not sufficient to drive a consistent defect evolution and the total defect's density is slightly reduced with respect the initialization (i.e. the post-implants conditions, where B and P implantations have been considered: Boron 40 keV, 3e14 cm-2 and Phosphorus 350 keV, 1e14 cm-2). Residual damage after melting processes is considerably reduced when compared to the as implant case. In this cases a relevant portion of the I type defect resides in clusters (small and large) while for the simulated cases clustering does not take place for V type defects. View full abstract»

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  • 22nm node n+ SiC stressor using deep PAI+C7H7+P4 with laser annealing

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (790 KB) |  | HTML iconHTML  

    We investigated n+SiCP stressors formation by C & P implantation with various amorphization techniques and using high temperature laser annealing SPE technique. Both monomer C and molecular C (C7H7) with P4 implant doping was compared as well as with pre-amorphizing implants (PAI) using Ge, Xe or Sb to enhance the Csub level through SPE amorphous layer regrowth. A P dopant activation level of 4E20/cm3 and a Csub level of 1.52% for Sb-PAI+C7+P4 was realized with s strain layer depth of 50 nm using a 1325°C peak laser anneal temperature. View full abstract»

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  • The effect of die-level stress variations on device performance

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    The performance improvement associated with the intentional manipulation of stresses on the transistor scale is an integral part of device fabrication at advanced technology nodes. However, comparatively little attention is given to stress management at within-die and within-wafer length scales. This paper describes the use of a stress measurement technology, the Coherent Gradient Sensing (CGS) interferometer, to characterize the evolution of stresses up through source/drain anneal in a process flow. The CGS technique facilitates the generation of high-density stress maps (>700,000 points on a 300 mm wafer) such that the stresses induced die-by-die and process-by-process can be tracked in detail. Results are presented showing the relationship between die-level stresses and device performance. The correlation between die-level stresses and device performance indicates that stress variations account for ~35 to 50% of the performance variation observed. The use of these correlations to identify critical process steps is discussed, with particular attention given to the role of different thermal processes. View full abstract»

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  • Impact of pattern and LSA stitching effects and processing parameters on reflectance and stress distribution for thermal annealing technologies

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    Ultra shallow junctions are increasingly important to overcome short channel effects, and sub-millisecond annealing offers the ability to control diffusion while simultaneously offering high activation levels. The ultra-fast annealing process needs tight uniformity control to provide consistent device performance across the wafer. The ultratech LSA-100A system features scan pattern overlap flexibility and closed-loop process temperature control to achieve such uniformity control. Generally speaking, pattern effects can arise from reflectance variations of the incident radiation source used for annealing. The reflectance variation of a long wavelength source at Brewster's angle and p-polarization used for laser spike annealing is compared to a broad-based light source. By the use of a stress measurement technology, the coherent gradient sensing (CGS) interferometer, a detailed characterization of deformation induced during sub-millisecond laser annealing is obtained and is also related to the radiation source. View full abstract»

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  • Experimental and theoretical analysis of dopant activation in double implanted silicon by pulsed laser thermal annealing

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    A collection of slides from the author's conference presentation shows dopant activation by pulsed laser thermal annealing. It also discusses single pulse deep melt activation, layer electrical properties and specific multiple layer junctions properties. View full abstract»

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  • Millisecond annealing of high-performance SiGe HBTs

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (419 KB) |  | HTML iconHTML  

    This work reports on first experiments with millisecond flash anneals for SiGe HBTs. Model experiments on blanket wafers were used to study the effects of flash annealing on HBT-typical doping profiles in comparison to the standard spike annealing, and to find out an appropriate temperature range for transistor functionality. An integration lot was processed and analyzed to get a comprehensive insight into the capability of the flash anneal for SiGe HBT fabrication. Parameters of sheet resistances as well as static and dynamic transistor characteristics demonstrate the potential of this technique for the high-speed operation of SiGe HBTs. View full abstract»

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  • Formation of Si-based light-emitting structures by ion implantation and pulsed treatments

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    The creation of Si-based light-emitting structures by continuous ion implantation and nanosecond pulsed annealing is reviewed by the example of Si:Er and ß-FeSi2 layers. These layers are promising for optoelectronics due to the light emission in the 1.5-1.6 ¿m communication range. Si:Er and ß-FeSi2 layers were formed by Er+ or Fe+ implantation into Si(100) wafers followed by pulsed annealing with high-power ion beams. The structural and optical properties of the implanted and annealed Si layers were studied by TEM, RBS and PL methods. TEM and RBS measurements showed the similarity in the microstructure of the annealed Si layers and the depth distribution of Fe and Er atoms in Si. PL measurements at 77 K demonstrated the intense PL peaks at ¿ = 1.5-1.6 ¿m. For the first time, a triple Si/ß-FeSi2/Si heterostructure was fabricated by the combination of ion implantation, pulsed annealing and molecular-beam epitaxy of Si epilayer. PL measurements of the Si/ß-FeSi2/Si heterostructure at 5 K showed that the light emission at ¿ = 1.4-1.7 ¿m is due to the contributions from ß-FeSi2 precipitates and dislocations. View full abstract»

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  • Study of sub-melt laser damage annealing using Therma-Probe

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (299 KB) |  | HTML iconHTML  

    In the present work we report on Therma-Probe (TP) measurements to quantify the residual lattice damage after sub-melt laser annealing for different Ge pre-amorphization implant (PAI) conditions. The calibration of the TP signal, the influence of different laser parameters and the relation to junction leakage is discussed. View full abstract»

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  • Activation of ion implanted Si for backside processing by ultra-fast laser thermal annealing: Energy homogeneity and micro-scale sheet resistance

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    In this paper ion activation of implanted silicon using ultra-fast laser thermal annealing (LTA) process was discussed. The results stated that there was high dopant activation using LTA process for over 70%, excellent within shot activation uniformity, and there was a possibility for overlap parameter optimization. It was observed that, for activation LTA process, shallow box-shaped profiles- high diffusivity of B in liquids and high-temperatures was observed only near the surface in a submicrosecond timescale. Possible solutions were suggested as to low-cost and high-end for overlap optimization and full-die exposure optics. View full abstract»

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  • Heating and photoionization of silicon structures at laser treatments

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    The processes of light absorption, generation of electron-hole pairs and thermal heating of thin-film silicon structures under the action of high-power nanosecond laser pulses are considered. The computer simulation of heating and photoexcitation of the implanted Si is carried out. The simulation results are compared with the experimental data on optical probing. The density of the generated electron-hole pairs and the temperature dependence of the light absorption by Si for the laser radiation with ¿ = 1.06 ¿m are estimated. These data can be used to control the depth distribution of the absorbed energy of the laser radiation. The laser modification of thin-film materials on Si by the temperature-controlled Si transparency is carried out when treating structures by the radiation directed from backside of the crystalline Si substrate. This method allows one to increase the uniformity of the laser radiation along its cross-section, to reduce the surface overheating degree and to avoid the surface disruption. View full abstract»

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  • Time evolution of phosphorus dose loss due to interface segregation

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    Different thermal processes and substrates were used to investigate the time evolution of phosphorus loss due to segregation at the Si-SiO2 interface. Dose recovery occurred as phosphorus diffused into bulk silicon during furnace annealing. Dose loss increased when samples were cycled between silicon implantation and rapid thermal annealing (RTA). This implies that transient enhanced diffusion promotes dose loss during postimplantation RTA. Dose loss in silicon-on-insulator (SOI) substrates was characterized by using sheet resistance. The correlation between sheet resistance and dose loss was verified based on the experimental data of bulk silicon samples. Simulation results indicate that the equilibrium segregation behavior in SOI substrates is similar to that in bulk silicon substrates. The buried oxide layer in SOI substrates prevents phosphorus diffusion and increases interface area. Consequently, dose recovery in SOI substrates is not evident. The dose loss in SOI substrates is more significant than that in bulk silicon substrates. View full abstract»

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  • Backside-activation technique of power device IGBTs by a microsecond-pulsed green laser

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    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2017 KB) |  | HTML iconHTML  

    Recently ion-implantation technique and activation technique are emphasized to enhance the performance of Insulated Gate Bipolar Transistor (IGBT) replacing epitaxial wafers with FZ wafers. In the IGBT's structure, an n-type layer and a p-type layer are introduced into the back side of the wafer at the different depth to form PN junction. The next generation IGBTs whose wafer thickness decreases to few tens of micrometers, require not only the high activation of these two layers without interdiffusion of boron (B) and phosphorous (P) but also the deep activation without damaging the metal circuit wired on the front side of the wafer. Laser annealing processes have been focused as low thermal budget heat treatment to fulfill these demands. In this paper, new activation technique is demonstrated to accomplish high activation in the deep area over a depth of 2um. B and P implant wafers were irradiated by a single microsecond-pulsed laser, i.e., a green DPSS laser (JenaRas ASAMA, controllable pulse duration of 250 ns to 1200 ns). The laser annealing process at a pulse duration of 1200 ns enabled the deep activation over a depth of 2um and the sufficient activation ratios of 89% and 62% for B and P dopants, particularly on the thin wafer of thickness 150 um. We conclude that the ADL annealing system can be applied to the backside activation process for the next generation IGBRs, adopting a thin FZ wafer of less than 100 um. View full abstract»

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  • Very high magnification optical characterization of global and local distortion of Si wafers after laser spike annealing

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    The understanding of macro- and micro-scale wafer shape changes during device fabrication process steps is becoming very critical in developing and optimizing advanced technology node devices in which new materials such as Ni, NiPt and/or Ge are introduced. We have developed a non-contact, in-line process and/or material property monitoring method which uses various forms (reflection, diffraction, interference and scattering) of interactions between semiconductor wafers and a laser beam. Laser spike anneal (LSA) induced changes of surface profiles in TiN/NiPt/Si1-xGex/Si (100) and Si1-xGex/Si (100) wafers are characterized using the newly developed very high magnification optical surface profilometry (OSP-300) system. Significant global and local changes of wafer surface profiles were observed after LSA. Multi-wavelength micro-Raman studies revealed significant changes in Ge content and lattice level stress in Si1-xGex/Si (100) wafers annealed under various LSA temperatures and dwell times. View full abstract»

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  • Monitoring of local and global temperature non-uniformities by means of Therma-Probe and Micro Four-Point Probe metrology

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    The introduction of millisecond annealing in advanced CMOS process flows turns out to generate considerable temperature variations which can enhance the device dispersion. In the present work we report on the use of inline Therma-Probe (TP) and Micro Four-Point Probe (M4PP) metrology to assess these temperature variations on shallow trench isolation (STI) wafers with and without absorber layer after sub-melt laser anneal (¿laser = 808 nm). By calibrating the DC probe reflectance obtained during TP or the M4PP sheet resistance against the laser peak temperature on a blanket wafer with calibration stripes, the peak temperature variation on the patterned wafer can be determined at a global and local scale. By a direct comparison on the same structures we demonstrate the equivalence of both techniques and validate the contactless TP measurements. We also demonstrate the advantage of the use of absorber layers during laser anneal. View full abstract»

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  • Diffusion and activation of Boron and Phosphorus in preamorphized and crystalline Germanium using ultra fast spike anneal

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    In this work, the influence of a pre-amorphization implant (PAI) combined with a single-step spike anneal on the junction formation in Germanium is inverstigated, both for n-type dopant with Phosphorus (P) as well as for p-type dopant Boron (B). The experiments were performed on a 1.5 ¿m Germanium (Ge) epi-layer onto 200 mm Silicon (Si) substrate. After implantation both with or without PAI, the dopant activation was achieved using a single step, conductive, spike anneal (ranging 550°C-900°C) in a ASM Levitor® system. Junction depth (Xj) and electrical activation levels (Nact) were characterized using secondary-ion-mass spectroscopy (SIMS) and sheet resistance Rs measurements. The results show that the combination of the high ramp rates with single step spike anneal on the one hand and PAI on the other hand, improved junctions characteristics compared to standard implant and RTP (Rapid Thermal Processing) conditions. The SIMS results show a reduction of junction depth for pre-amorphized junction after activation annealing up to 20% with P and 42% with B at 5 × 1018 cm-3 dopant concentration. In addition, electrical activation levels up to 4,95 × 1020 cm-3 were achieved for the p-type implants. View full abstract»

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  • Boron and Phosphorus dopant activation in Germanium using laser annealing with and without preamorphization implant

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    In this work, we studied excimer laser annealing at 308 nm with 180 ns pulse duration on phosphorus and boron implanted in germanium, with or without pre-amorphization implant (PAI) and co-implant. Using an industrial tool, experimental results show that we can achieve electrical activation levels up to 1.2×1020 cm-3 for P implant in Ge, which is the highest level regarding the appropriate mobility model. With the B implanted samples, we obtained an electrical activation level higher than 1×1020 cm-3 which is the better results obtained without PAI. Melt thresholds were determined to be 0.65 J/cm2 in amorphized germanium (a-Ge) and 0.95 J/cm2 in crystalline germanium (c-Ge). With P, the best activation was obtained after a complete melt of the amorphous layer and the amorphous / crystalline (a/c) interface, necessary to obtain a perfectly recrystallized layer. In the case of B, we found a better activation in the submelt regime compared the melt one, and no contribution on the electrical activation with PAI was observed. View full abstract»

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