Scheduled Maintenance on August 31st, 2016:
IEEE Xplore will undergo system maintenance from 1:00 - 3:00 PM EDT. During this time there may be intermittent impact on performance. We apologize for any inconvenience.
By Topic

Adaptive Hardware and Systems, 2009. AHS 2009. NASA/ESA Conference on

Date July 29 2009-Aug. 1 2009

Filter Results

Displaying Results 1 - 25 of 74
  • [Front cover]

    Publication Year: 2009, Page(s): C1
    Request permission for commercial reuse | PDF file iconPDF (188 KB)
    Freely Available from IEEE
  • [Title page i]

    Publication Year: 2009, Page(s): i
    Request permission for commercial reuse | PDF file iconPDF (28 KB)
    Freely Available from IEEE
  • [Title page iii]

    Publication Year: 2009, Page(s): iii
    Request permission for commercial reuse | PDF file iconPDF (63 KB)
    Freely Available from IEEE
  • [Copyright notice]

    Publication Year: 2009, Page(s): iv
    Request permission for commercial reuse | PDF file iconPDF (104 KB)
    Freely Available from IEEE
  • Table of contents

    Publication Year: 2009, Page(s):v - x
    Request permission for commercial reuse | PDF file iconPDF (174 KB)
    Freely Available from IEEE
  • Preface

    Publication Year: 2009, Page(s): xi
    Request permission for commercial reuse | PDF file iconPDF (85 KB) | HTML iconHTML
    Freely Available from IEEE
  • Conference organizers

    Publication Year: 2009, Page(s): xii
    Request permission for commercial reuse | PDF file iconPDF (63 KB)
    Freely Available from IEEE
  • Program Committee / Reviewers

    Publication Year: 2009, Page(s): xiii
    Request permission for commercial reuse | PDF file iconPDF (78 KB)
    Freely Available from IEEE
  • Keynotes

    Publication Year: 2009, Page(s):xiv - xvii
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (100 KB)

    Summary form only given. The Jet Propulsion Laboratory, California Institute of Technology, is NASA's lead center for robotic exploration of the solar system. Scientific investigation of Mars has been of primary importance, with success of the Phoenix Lander, ongoing operation of the Mars Exploration Rovers, and construction of the 2011 Mars Science Laboratory rover. Additionally, technology devel... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A Multi-cellular Developmental Representation for Evolution of Adaptive Spiking Neural Microcircuits in an FPGA

    Publication Year: 2009, Page(s):3 - 10
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (520 KB) | HTML iconHTML

    It has been shown that evolutionary and developmental processes can be used for emergence of scalability, robustness and fault-tolerance in hardware. However, designing a suitable representation for such processes is far from straightforward. Here, a bio-inspired developmental genotype-phenotype mapping for evolution of spiking neural microcircuits in an FPGA is introduced, based on a digital neur... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • EvoCaches: Application-specific Adaptation of Cache Mappings

    Publication Year: 2009, Page(s):11 - 18
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (688 KB) | HTML iconHTML

    In this work we present EvoCache, a novel approach for implementing application-specific caches. The key innovation of EvoCache is to make the function that maps memory addresses from the CPU address space to cache indices programmable. We support arbitrary Boolean mapping functions that are implemented within a small reconfigurable logic fabric. For finding suitable cache mapping functions we rel... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Intermediate Level FPGA Reconfiguration for an Online EHW Pattern Recognition System

    Publication Year: 2009, Page(s):19 - 26
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (448 KB) | HTML iconHTML

    We propose a field programmable gate array (FPGA) implementation for a run-time adaptable evolvable hardware classifier system. Previous implementations have been based on a high-level virtual reconfigurable circuit technique which requires many FPGA resources. We therefore apply an intermediate level reconfiguration technique which consists of using the FPGA lookup tables as shift registers for r... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Evolution of Impulse Bursts Noise Filters

    Publication Year: 2009, Page(s):27 - 34
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (586 KB) | HTML iconHTML

    The paper deals with evolutionary design of impulse burst noise filters. As proposed filters utilize the filtering window of 5times5 pixels, the design method has to be able to manage 25 eight-bit inputs. The large number of inputs results in an evolutionary algorithm not able to produce reasonably working filters because of the so-called scalability problem of evolutionary circuit design. However... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Adapting a Genotype-phenotype Mapping to Phenotypic Complexity

    Publication Year: 2009, Page(s):35 - 42
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (195 KB) | HTML iconHTML

    The marvel of biological development has motivated researchers to apply artificial development in bio-inspired systems. Among the possible features of artificial development that are being investigated is the potential for improving scalability of evolutionary optimization techniques,by applying artificial development as an indirect mapping.Currently, few guidelines exist as to when development is... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Polymorphic FIR Filters with Backup Mode Enabling Power Savings

    Publication Year: 2009, Page(s):43 - 50
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (431 KB) | HTML iconHTML

    A polymorphic FIR filter is proposed which can operate in two modes. The first mode is considered as a standard mode in which the filter performs a normal operation. In the second mode, the filter operates with reduced power supply voltage (Vdd), some filter coefficients are reconfigured (as response to the change of the polymorphic gates function which is controlled by Vdd) and some parts of the ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A Flexible Bit-Stream Level Evolvable Hardware Platform Based on FPGA

    Publication Year: 2009, Page(s):51 - 56
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (413 KB) | HTML iconHTML

    A flexible bit-stream level evolvable hardware (EHW) platform is proposed in order to efficiently utilize the programmable logic resources of FPGA when evolving digital circuits. This platform is based on the FuDan FPGA device. An adaptive variable-size look-up-table (LUT) array structure is proposed with the optimal Genetic Algorithm to evolvable circuits. The experiment results showed that the p... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Location-Aware, Flexible Task Management for Collaborating Unmanned Autonomous Vehicles

    Publication Year: 2009, Page(s):59 - 66
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (236 KB) | HTML iconHTML

    Unmanned autonomous vehicles (UAVs) are emerging as a breakthrough concept in technology. A main challenge related to UAV control is devising flexible strategies with predictable performance in hard-to-predict conditions. This paper proposes an approach to performance predictive collaborative control of UAVs operating in environments with fixed targets. The paper offers detailed experimental insig... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Evolvable Hardware Based Gray-level Image Enhancement

    Publication Year: 2009, Page(s):67 - 74
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1958 KB) | HTML iconHTML

    A simple image enhancement technique based upon evolvable hardware is presented. Improving visual appearance is achieved by evolved histogram stretching transformation (evolved circuit). The performance is compared with the classical histogram equalization method using traditional measures of enhancement. Experimental results will be presented to show that the proposed technique offers better perf... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • On-Board Vision Processing for Small UAVs: Time to Rethink Strategy

    Publication Year: 2009, Page(s):75 - 81
    Cited by:  Papers (7)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (833 KB) | HTML iconHTML

    The ultimate research goal for unmanned aerial vehicles (UAVs) is to facilitate autonomy of operation. Research in the last decade has highlighted the potential of vision sensing in this regard. Although vital for accomplishment of missions assigned to any type of unmanned aerial vehicles, vision sensing is more critical for small aerial vehicles due to lack of high precision inertial sensors. In ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Integrating Feature Values for Key Generation in an ICmetric System

    Publication Year: 2009, Page(s):82 - 88
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (294 KB) | HTML iconHTML

    This paper investigates the practicalities of combining values derived from measurable features of given integrated electronic circuits in order to derive a robust encryption key, a technique termed ICmetrics. Specifically the paper explores options for the precise techniques required to combine the derived feature values in order to ensure key stability. Key stability is an essential component of... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Dynamically Adapted Low-Energy Fault Tolerant Processors

    Publication Year: 2009, Page(s):91 - 97
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (796 KB) | HTML iconHTML

    The constant advances on scaling have introduced several issues to the design of processing structures in new technologies. The closer one gets to nano-scale devices, the more necessary are methods to develop circuits that are able to tolerate high defect densities. At the same time, beyond area costs, there is a pressure to maintain energy and power dissipation at acceptable levels, which practic... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Partial Bitstream 2-D Core Relocation for Reconfigurable Architectures

    Publication Year: 2009, Page(s):98 - 105
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (531 KB) | HTML iconHTML

    Field programmable gate arrays (FPGAs) potentially offer enhanced reliability, recovery from failures through partial and dynamic reconfigurations, and eliminate the need for redundant hardware typically used in fault-tolerant systems. Our earlier work on scalable self-configurable architectures for reusable space systems (SCARS) describes a partial reconfiguration based self-healing architecture.... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Defect Tolerance of an Optically Reconfigurable Gate Array with a One-time Writable Volume Holographic Memory

    Publication Year: 2009, Page(s):106 - 111
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (724 KB) | HTML iconHTML

    Optically reconfigurable gate arrays (ORGAs) have been developed as a type of multi-context field programmable gate array to realize fast reconfiguration and numerous reconfiguration contexts. Along with such advantages, ORGAs have high defect tolerance. They consist simply of a holographic memory, a laser diode array, and a gate array VLSI. Even if a gate array VLSI includes defective areas, the ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Implementation of Highly Pipelined Datapaths on a Reconfigurable Asynchronous Substrate

    Publication Year: 2009, Page(s):112 - 119
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1002 KB) | HTML iconHTML

    In programmable logic devices, the timing requirements change depending on what datapath is being mapped and the level of pipelining required. The added flexibility of such architectures translates to complexity in the design of their clocking scheme, both on the silicon and software level. Using asynchronous techniques to design the programmable elements and interconnects simplifies this problem ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A Sixteen-Context Dynamic Optically Reconfigurable Gate Array

    Publication Year: 2009, Page(s):120 - 125
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1254 KB) | HTML iconHTML

    Demand for fast dynamic reconfiguration has increased since dynamic reconfiguration can accelerate the performance of implementation circuits on a programmable device. Such dynamic reconfiguration necessitates two important features: fast reconfiguration and numerous contexts. However, because fast reconfiguration and numerous contexts share a tradeoff relation on current VLSIs, optically reconfig... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.