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Parallel and Distributed Processing, 1998. PDP '98. Proceedings of the Sixth Euromicro Workshop on

Date 23-23 Jan. 1998

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  • Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing - PDP '98 -

    Publication Year: 1998
    Request permission for commercial reuse | PDF file iconPDF (304 KB)
    Freely Available from IEEE
  • Author index

    Publication Year: 1998, Page(s):519 - 520
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    Freely Available from IEEE
  • Practical barrier synchronisation

    Publication Year: 1998, Page(s):438 - 444
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (700 KB)

    We investigate the performance of barrier synchronisation on both shared memory and distributed memory architectures, using a wide range of techniques. The performance results obtained show that distributed memory architectures behave predictably, although their performance for barrier synchronisation is relatively poor. For shared memory architectures, a much larger range of implementation techni... View full abstract»

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  • Multi-lingual threading

    Publication Year: 1998, Page(s):431 - 437
    Cited by:  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (768 KB)

    Multiple threads of execution within a single address space provide concurrency in a structured and simple way. The paper describes how threads can cross language boundaries, i.e. can be shared by components written in different languages within a single application (multilingual threading). The advantage is that each component can be written in the language which is most suitable for it and benef... View full abstract»

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  • A safe distributed deadlock resolution algorithm for the OR request model

    Publication Year: 1998, Page(s):150 - 156
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (764 KB)

    This paper presents an algorithm for resolving OR deadlocks in distributed systems. The algorithm works in two concurrent phases. Firstly, it collects the paths of the WFG (at each initiator process). A termination detection mechanism is used to know the ending of this phase. Collected paths are then analyzed to discover whether the process belongs to a deadlock. The proposed algorithm has two pri... View full abstract»

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  • An experimental study of BSP sorting algorithms

    Publication Year: 1998, Page(s):479 - 485
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (716 KB)

    The bulk-synchronous parallel (BSP) model of computation has been proposed as a unifying and bridging model for the design, analysis and implementation of parallel algorithms that are both scalable and portable among diverse parallel machines. The authors implement, using the Oxford BSP Toolset, BSPlib, a number of BSP deterministic and randomized sorting algorithms on a variety of parallel system... View full abstract»

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  • Automatic performance evaluation of parallel programs

    Publication Year: 1998, Page(s):43 - 49
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (688 KB)

    Traditional parallel programming forces the programmer, apart from designing the application, to analyse the performance of this recently built application. This difficult task of testing the behaviour of the program can be avoided with the use of an automatic performance analysis tool. Users are released from having to understand the enormous amount of performance information obtained from the ex... View full abstract»

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  • Tool to evaluate performance in distributed heterogeneous processing

    Publication Year: 1998, Page(s):180 - 185
    Cited by:  Papers (4)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (676 KB)

    The next generation computing architectures will consist of a fusion of heterogeneous systems interoperating. This concept is gaining popularity yet there are currently few tools available for performance visualisation and management of heterogeneous interoperating systems using middleware. This paper looks at the design of middleware performance tools, using our current project as an example, foc... View full abstract»

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  • Performance issues of message transmission on cluster-based multicomputer

    Publication Year: 1998, Page(s):422 - 428
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (816 KB)

    With great interest in high performance, scalability, and availability, we have been developing cluster based multicomputer, scalable parallel architecture computer based on crossbar network (SPAX), and its operating system (MISIX). Because the MISIX is a microkernel based operating system, both local communication and remote communication between many servers are indispensable. A local communicat... View full abstract»

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  • LogP performance characterization of fast messages atop Myrinet

    Publication Year: 1998, Page(s):395 - 401
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (768 KB)

    The Fast Messages (FM) project is a highly optimized, low latency messaging layer providing a virtual interface to the communication hardware. The purpose of the paper is to present a detailed characterization of the FM communication messaging layer using the LogP model. We have used a series of communication microbenchmarks to measure the parameters of the LogP model. These specialized benchmarks... View full abstract»

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  • Scalable matrix multiplication algorithm for IRAM architecture machine

    Publication Year: 1998, Page(s):367 - 372
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (504 KB)

    A scalable bit matrix machine model was proposed by us previously (G. Vesztergombi et al., 1997). Now we extend this IRAM type model for numerical calculations. The k digit numbers are represented in a bit parallel way, thus the number of rows in the memory is scaled up correspondingly, which means that the number of 1 bit CPUs is also increased proportionally. Still relying on the simple string c... View full abstract»

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  • A flexible state-saving library for message-passing systems

    Publication Year: 1998, Page(s):335 - 341
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (652 KB)

    Message passing applications on a distributed computer require tools to integrate state saving and rollback, to support dynamic program reconfiguration, fault tolerance and others. The paper presents the results of integrating two independently developed tools that combine flexibility and portability. The User-Triggered CheckPointing (UTCP) provides checkpointing and recovery while relying on the ... View full abstract»

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  • Causal broadcasting based on sliding windows

    Publication Year: 1998, Page(s):143 - 149
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (648 KB)

    Causal broadcasting protocols are usually implemented on top of communication subsystems which adopt a FIFO sliding window flow control using acknowledgement messages. Such messages can be source of information about the causality relations among application messages which can reduce the amount of control information necessary to guarantee causal deliveries (i.e., a vector of unbounded integer). I... View full abstract»

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  • ParC++: a simple extension of C++ to parallel systems

    Publication Year: 1998, Page(s):453 - 459
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (696 KB)

    The ParC++ system is an object oriented programming and execution environment, based on a programming model that aims the development of portable, efficient and scalable parallel applications. The paper presents the main components in the ParC++ system: a pre-processor-that supports a parallel extension to C++ objects and extracts parallelism from standard C++ code-and a run-time system-that dynam... View full abstract»

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  • Parallel simulation in rewriting logic: some observations

    Publication Year: 1998, Page(s):197 - 203
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (736 KB)

    In this paper, the relationship between the computational models of object-oriented rewriting and parallel discrete-event simulation models is explored. A discrete-event simulation program in which several objects interact with each other by exchanging messages may have a high degree of concurrency (which can be exploited using optimistic or conservative parallel simulation methods). We report on ... View full abstract»

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  • Solving sparse triangular systems on distributed memory multicomputers

    Publication Year: 1998, Page(s):470 - 478
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (784 KB)

    The authors describe and compare two different methods for solving sparse triangular systems in distributed memory multiprocessor architectures. The two methods involve some preprocessing overheads so they are primarily of interest in solving many systems with the same coefficient-matrix. Both algorithms start off from the idea of the classical substitution method. The first algorithm presented in... View full abstract»

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  • High-level CHILL debugging system in cross-development environments

    Publication Year: 1998, Page(s):211 - 216
    Cited by:  Papers (1)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (884 KB)

    CHILL is a concurrent programming language, especially for implementing telecommunications software. ETRI has used the language for the development of switching software. Generally, switching software is characterized by real-time execution, parallel and distributed processing, large scale source code, and high complexity. The software is also developed on cross development environments. In this p... View full abstract»

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  • Teleseminars via ISDN technical set-up and user reactions

    Publication Year: 1998, Page(s):225 - 229
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (412 KB)

    One major application of IP- or ISDN based videoconferencing tools is telelearning or teleteaching. Of special importance in the context is the audio-visual quality of the transmission. The aim of the paper is to evaluate if the existing technology using narrowband ISDN is mature enough to guarantee a sufficient quality of the transmission. To this end several seminars were disseminated by ISDN ba... View full abstract»

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  • An efficient, portable software platform for parallel image processing

    Publication Year: 1998, Page(s):237 - 242
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (776 KB)

    A software development environment for image processing is described, which has as one of its aims to achieve portability and efficiency over a range of parallel architectures. The environment includes several tools, one of which is an optimiser which automatically generates very efficient code from a high level user coding. The first time the program is run, it does so rather inefficiently. But a... View full abstract»

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  • Developing non-local iterative parallel algorithms for GIS on a workstation network

    Publication Year: 1998, Page(s):250 - 256
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (708 KB)

    The use of parallel computing is gaining increasing popularity in geographic information systems applications. There exists a class of spatial analysis algorithms that are based on local computation and are single step, hence leading to simple and efficient parallel code. For another class of algorithms it is not possible to make any assumption about the locality of computation, for example when e... View full abstract»

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  • Parallel test generation using circuit partitioning and spectral techniques

    Publication Year: 1998, Page(s):264 - 270
    Cited by:  Papers (6)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (704 KB)

    The problem of testing digital circuits is becoming much more difficult as these circuits increase in size and complexity. Thus, the development of parallel procedures for test pattern generation is currently a field of important research activity. A new parallel procedure to determine the set of patterns to test a circuit is presented. It stems from a circuit partitioning scheme based on a mixed ... View full abstract»

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  • Tailorable component architectures for CSCW-systems

    Publication Year: 1998, Page(s):302 - 308
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (868 KB)

    Tailorability is generally regarded as a key property of CSCW systems, because cooperative activities provide for very dynamic and diversified requirements. Extensive tailorability has to be supported by the design of the system architecture. We investigate the value of component architectures for this purpose and discuss several design options for the questions raised by this approach. We propose... View full abstract»

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  • Distributed computation in a three-dimensional mesh with communication delays

    Publication Year: 1998, Page(s):38 - 42
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (528 KB)

    We study the problem of scheduling a divisible load in a three-dimensional mesh network in which processors communicate by means of circuit-switched routing. The objective is to find a distribution of load shares among processors which minimizes the processing time for a given computation volume. We model and solve the problem with a set of algebraic equations. Whereas other algorithms distribute ... View full abstract»

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  • Theory and tool for estimating global time in parallel and distributed systems

    Publication Year: 1998, Page(s):173 - 179
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (692 KB)

    This article presents a method and a tool for estimating a global time base from local event traces. These event traces result from monitoring parallel and distributed systems of arbitrary topology, where the processors are working on a common application. The method relies on stability properties of physical clocks and on the causality relationships of cooperating processes. The tool copes with a... View full abstract»

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  • Virtual cut-through implementation of the HB packet switching routing algorithm

    Publication Year: 1998, Page(s):416 - 421
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (600 KB)

    In the last years, since the early 80's, wormhole and virtual cut through routing modalities have replaced packet switching and circuit switching schemes. We give the theoretical bases to implement hole based (HB) routing algorithm (M. Coli and P. Palazzari, 1995) by using the virtual cut through modality. After reviewing the theory of HB routing, we demonstrate some theorems which allow us to use... View full abstract»

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