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High Performance Computing & Simulation, 2009. HPCS '09. International Conference on

Date 21-24 June 2009

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Displaying Results 1 - 25 of 46
  • Welcome

    Publication Year: 2009, Page(s):i - iii
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  • Committee

    Publication Year: 2009, Page(s):iv - x
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  • HPCS 2009 Keynotes [5 abstracts]

    Publication Year: 2009, Page(s):xi - xviii
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (113 KB)

    Provides an abstract for each of the five keynote presentations and a brief professional biography of each presenter. View full abstract»

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  • Tutorial

    Publication Year: 2009, Page(s):xix - xxxiii
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    Provides an abstract of the tutorial presentation and a brief professional biography of the presenter. The complete presentation was not made available for publication as part of the conference proceedings. View full abstract»

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  • HPCS 2009 panel sessions [6 abstracts]

    Publication Year: 2009, Page(s):xxxiv - xlviii
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  • Sponsors

    Publication Year: 2009, Page(s): xlix
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  • Table of contents

    Publication Year: 2009, Page(s):l - liii
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  • Author index

    Publication Year: 2009, Page(s):liv - lvii
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  • [Copyright notice]

    Publication Year: 2009, Page(s): lviii
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  • Modeling and simulation of scalable Cloud computing environments and the CloudSim toolkit: Challenges and opportunities

    Publication Year: 2009, Page(s):1 - 11
    Cited by:  Papers (157)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1876 KB) | HTML iconHTML

    Cloud computing aims to power the next generation data centers and enables application service providers to lease data center capabilities for deploying applications depending on user QoS (Quality of Service) requirements. Cloud applications have different composition, configuration, and deployment requirements. Quantifying the performance of resource allocation policies and application scheduling... View full abstract»

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  • GPU acceleration of an unmodified parallel finite element Navier-Stokes solver

    Publication Year: 2009, Page(s):12 - 21
    Cited by:  Papers (15)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (969 KB) | HTML iconHTML

    We have previously suggested a minimally invasive approach to include hardware accelerators into an existing large-scale parallel finite element PDE solver toolkit, and implemented it into our software FEAST. Our concept has the important advantage that applications built on top of FEAST benefit from the acceleration immediately, without changes to application code. In this paper we explore the li... View full abstract»

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  • Comparing CUDA and OpenGL implementations for a Jacobi iteration

    Publication Year: 2009, Page(s):22 - 32
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1501 KB) | HTML iconHTML

    The use of the GPU as a general purpose processor is becoming more popular and there are different approaches for this kind of programming. In this paper we present a comparison between different implementations of the OpenGL and CUDA approaches for solving our test case, a weighted Jacobi iteration with a structured matrix originating from a finite element discretization of the elliptic PDE part ... View full abstract»

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  • Exploiting memory hierarchies in scientific computing

    Publication Year: 2009, Page(s):33 - 35
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (186 KB) | HTML iconHTML

    The ratio between processor and main memory performance has been increasing since quite some time, and can safely be expected to do so throughout the oncoming years. In the era of single-core processors, this was mainly observable by increased latency, for example when measured in number of (possibly stalled) CPU clock cycles. Nowadays, with multicore chips, multiple cores share the same connectio... View full abstract»

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  • Fast seismic modeling and Reverse Time Migration on a GPU cluster

    Publication Year: 2009, Page(s):36 - 43
    Cited by:  Papers (19)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (922 KB) | HTML iconHTML

    We have designed a fast parallel simulator that solves the acoustic wave equation on a GPU cluster. Solving the acoustic wave equation in an oil exploration industrial context aims at speeding up seismic modeling and Reverse Time Migration. We consider a finite difference approach on a regular mesh, in both 2D and 3D cases. The acoustic wave equation is solved in either a constant density or a var... View full abstract»

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  • Data structure design for GPU based heterogeneous systems

    Publication Year: 2009, Page(s):44 - 51
    Cited by:  Papers (4)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (522 KB) | HTML iconHTML

    This paper reports on our experience with data structure design for systems having both multiple CPU cores and a programmable graphics card. We integrate our data structures into the game-like application OpenSteerDemo and compare our data structures on two pc-systems. One System has a relative fast single core CPU and slower GPU, whereas the other one uses a high-end GPU with a slower multi core ... View full abstract»

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  • A compact error model for reliable system design

    Publication Year: 2009, Page(s):60 - 66
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (177 KB) | HTML iconHTML

    Permanent and transient errors are inherently different in property and effect. This paper shows how to utilize this fact to develop a System Error Decision Diagram for reliable embedded systems. Based on this model an efficient approach for reliability evaluation is developed. The model and the reliability evaluation approach are assumed to be employed in a system-level design process to accelera... View full abstract»

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  • Cross-core event monitoring for processor failure prediction

    Publication Year: 2009, Page(s):67 - 73
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (315 KB) | HTML iconHTML

    A recent trend in the design of commodity processors is the combination of multiple independent execution units on one chip. With the resulting increase of complexity and transistor count, it becomes more and more likely that a single execution unit on a processor gets faulty. In order to tackle this situation, we propose an architecture for dependable process management in chip-multiprocessing ma... View full abstract»

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  • Optimizing a highly fault tolerant software RAID for many core systems

    Publication Year: 2009, Page(s):74 - 79
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (541 KB) | HTML iconHTML

    We present a parallel software driver for a RAID architecture to detect and correct corrupted disk blocks in addition to tolerate disk failures. The necessary computations demand parallel execution to avoid the processor being the bottleneck for a RAID with high bandwidth. The driver employs the processing power of multicore and manycore systems. We report on the performance of a prototype impleme... View full abstract»

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  • Risks and chances of many-core processors

    Publication Year: 2009, Page(s): 80
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (57 KB) | HTML iconHTML

    The decreasing structure size of VLSI technology features a lot of chances to processor designers but it also brings many risks. Most of these risks stem from the manufacturing process and lead to an increased number of chips with defects which are uniformly distributed over the wafer. Other problems arise during the uptime of the system because of thermal effects or radiation. Happily, one of the... View full abstract»

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  • On pinning issues on multicore systems

    Publication Year: 2009, Page(s): 81
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (58 KB) | HTML iconHTML

    In recent years, a trend towards multi-core architectures with a growing number of cores for all standard instruction set architectures can be observed. To utilize the full potential of such novel microprocessor architectures, applications running on them must be efficiently parallelized and carefully analyzed regarding runtime, speedup, and parallel efficiency. With multi-core architectures becom... View full abstract»

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  • RING-DATA ORDER: A new cache coherence protocol for ring-based multicores

    Publication Year: 2009, Page(s):82 - 88
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    Ring-data order mechanism is motivated to solve cache coherence ordering for ring-based multicores. For point to point ring interconnects, the existing ordering-point mechanism is known for poor average performance due to its long response latency. Greedy-order mechanism is simple but the performance is still unacceptable because the requester should often retry to complete a coherent operation. R... View full abstract»

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  • A novel QoS modeling approach for soft real-time systems with performance guarantees

    Publication Year: 2009, Page(s):89 - 95
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (210 KB) | HTML iconHTML

    This paper introduces a systematic approach for modeling QoS requirements of soft real-time systems with stochastic responsiveness guarantees. While deadline miss ratio and its proposed extensions have been considered for evaluating firm real-time systems, this work brings out its limitations for assessing the performance of emerging computer services operating over communication infrastructures w... View full abstract»

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  • A self-adapting Web server architecture: Towards higher performance and better utilization

    Publication Year: 2009, Page(s):96 - 105
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (323 KB) | HTML iconHTML

    The way at which a Web server handles I/O operations has a significant impact on its performance. Servers that allow blocking for I/O operations are easier to implement, but exhibit less efficient utilization and limited scalability. On the other hand, servers that allow non-blocking I/O usually perform and scale better, but are not easy to implement and have limited functionality. This paper pres... View full abstract»

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  • Multi-agent traffic simulation with CUDA

    Publication Year: 2009, Page(s):106 - 114
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (529 KB) | HTML iconHTML

    Today's graphics processing units (GPU) have tremendous resources when it comes to raw computing power. The simulation of large groups of agents in transport simulation has a huge demand of computation time. Therefore it seems reasonable to try to harvest this computing power for traffic simulation. Unfortunately simulating a network of traffic is inherently connected with random memory access. Th... View full abstract»

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  • Predicting the performance of multi-agent based simulation with Ethernet switched clusters

    Publication Year: 2009, Page(s):115 - 121
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (151 KB) | HTML iconHTML

    Predicting exactly the performance for distributed simulation of multi-agent based systems has considerable significance. Some investigations were realized but they usually omitted issue of communication costs between computational nodes. In this paper, we address to the communication cost models and present a model for evaluating the performance of multi-agent based simulation on Ethernet switch ... View full abstract»

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