Parallel Architectures, Algorithms, and Networks, 1997. (I-SPAN '97) Proceedings., Third International Symposium on

20-20 Dec. 1997

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  • Proceedings of the 1997 International Symposium on Parallel Architectures, Algorithms and Networks (I-SPAN'97)

    Publication Year: 1997
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    Freely Available from IEEE
  • Index of authors

    Publication Year: 1997, Page(s):501 - 503
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    Freely Available from IEEE
  • Reliable broadcasting and secure distributing in channel networks

    Publication Year: 1997, Page(s):472 - 478
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (700 KB)

    Let T1, ···, Tn be n spanning trees rooted at node r of graph G. If for any node ν of G, among the n paths from r to ν, each path in each spanning tree of T 1, ···, Tn, there are k (k⩽n) internally disjoint paths, then T1, ···, Tn, are said to be (k, n)-indepen... View full abstract»

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  • A tampering protocol for reducing the coherence transactions in regular computation

    Publication Year: 1997, Page(s):465 - 471
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (672 KB)

    This paper proposes a tampering protocol for reducing the coherence transactions in the computations with regular communication patterns. This protocol is a subsidiary of the conventional cache-coherence protocol and is activated on a memory-block basis. If activated for a block, the exclusive copy of that block is frozen in the cache and is accessed (i.e., tampered) with no coherence transactions... View full abstract»

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  • The diameter of the generalized de Bruijn graph UGB(n,n(n2+1))

    Publication Year: 1997, Page(s):421 - 423
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    In this paper, we shall show that the diameter of the generalized de Bruijn graph UGB(n, n(n2+1)) is 4 for odd integer n⩾3 View full abstract»

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  • A built-in self-reconfigurable scheme for 3D mesh arrays

    Publication Year: 1997, Page(s):458 - 464
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (564 KB)

    We propose a model for fault tolerant 3D processor arrays using one-and-half track switches. Spare processors are laid on the two opposite surfaces of the 3D array. The fault compensation process is performed by shifting processors on a continuous straight line from a faulty processor to a spare on the surfaces. Two opposite directions are allowed for compensation paths only which they are not in ... View full abstract»

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  • Wide-diameter of generalized undirected de Bruijn graph UGB (n, n2)

    Publication Year: 1997, Page(s):417 - 420
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (236 KB)

    Caro et al. (1996) have shown that the wide-diameter of the generalized de Bruijn Graphs UGB (n, n(n+1)) is 5 for n⩾2. In this paper, we show that the w-diameter of UGB (n, n2) is 4 where w=2(n-1) and n>4, We also show that UG B (n, n2) is 2(n-1)-regular and has diameter 2 View full abstract»

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  • Performance analysis for dynamic tree embedding in k-partite networks by random walk

    Publication Year: 1997, Page(s):451 - 457
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (684 KB)

    We study the problem of dynamic tree embedding in k-partite networks Gk and analyze the performance on inter-partition load distribution of the embedding. We show that, for ring-connected G k, if the embedding proceeds by taking uni-directional random walk at length randomly chosen from [0, Δ-1], where a is a multiple of k, the best-case performance is achievable at pro... View full abstract»

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  • A fast approximation algorithm for maximum-leaf spanning tree

    Publication Year: 1997, Page(s):351 - 356
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (400 KB)

    Given an undirected graph G, finding a spanning tree of G with maximum number of leaves is not only NP-complete but also MAX SNP-complete. The approximation ratio of the previously best known approximation algorithm for maximum leaf spanning tree is three. However, the high-order running time required by the previous algorithm makes it impractical. In this paper we give a new factor-three approxim... View full abstract»

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  • Processor allocation in k-ary n-cube multiprocessors

    Publication Year: 1997, Page(s):211 - 214
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (372 KB)

    Composed of various topologies, the k-ary n-cube system is desirable for accepting and executing topologically different tasks. We propose a new allocation strategy to utilize the large amount of processor resources in the k-ary n-cubes. Our strategy is an extension of the TC strategy on hypercubes and is able to recognize all subcubes with different topologies. Simulation results show that with s... View full abstract»

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  • An efficient class of SEC-DED-AUED codes

    Publication Year: 1997, Page(s):410 - 416
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (468 KB)

    In this paper, an efficient method for constructing a class of Single Error Correcting and Double Error Detecting and All Unidirectional Error Detecting (SEC-DED-AUED) codes has been presented. The encoding/decoding algorithms proposed with this method can be implemented with a simple and faster hardware. Also, in ROM based implementation, it results in significant saving of word-length. This sche... View full abstract»

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  • Fast nearest neighbor algorithms on a linear array with a reconfigurable pipelined bus system

    Publication Year: 1997, Page(s):444 - 450
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (672 KB)

    We present efficient algorithms for the nearest neighbor problem defined in an n×n binary image. We show that using a linear array with a reconfigurable pipelined bus system (LARPBS) of n2 processors, the nearest neighbor problem can be solved in O(log log n) time, and using an LARPBS of n3 processors, the nearest neighbor problem can be solved in O(1) time. We also sho... View full abstract»

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  • A parallel pipelined renderer for time-varying volume data

    Publication Year: 1997, Page(s):9 - 15
    Cited by:  Papers (3)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (884 KB)

    This paper presents a strategy for efficiently rendering time-varying volume data on a distributed-memory parallel computer. Visualizing time-varying volume data take both large storage space and long computation time. Instead of employing all processors to render one volume at a time, a pipelined rendering approach partitions processors into groups so that multiple volumes can be rendered concurr... View full abstract»

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  • A genetic algorithm for optimal 3-connected telecommunication network designs

    Publication Year: 1997, Page(s):344 - 350
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (720 KB)

    In this paper, a genetic algorithm for three connected telecommunication network designs is proposed. The genetic algorithm uses a new approach to solution representation, in which constraints such as diameter and connectivity constraints can be easily encoded and two-point crossover with the operation of swapping duplicated nodes ensures solutions generated through genetic evolution are all feasi... View full abstract»

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  • WWW-oriented system for visualization, animation and investigation of mapping algorithms

    Publication Year: 1997, Page(s):207 - 210
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (360 KB)

    The article presents TOPAS, a programming environment for visualization, animation and investigation of algorithms for mapping graphs of parallel programs into graphs of parallel computing systems implemented in Java and accessible on the WWW View full abstract»

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  • CASS: an efficient task management system for distributed memory architectures

    Publication Year: 1997, Page(s):289 - 295
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (628 KB)

    The thesis of this research is that the task of exposing the parallelism in a given application should be left to the algorithm designer, who has intimate knowledge of the application characteristics. On the other hand, the task of limiting the parallelism in a chosen parallel algorithm is best handled by the compiler or operating system for the target MPP machine. Toward this end, we have develop... View full abstract»

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  • Node-to-node cluster fault tolerant routing in hypercubes

    Publication Year: 1997, Page(s):404 - 409
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (532 KB)

    In this paper, we study the node-to-node fault tolerant routing problem in the n-dimensional hypercube Hn based on the cluster fault tolerant model. For a graph G, a faulty cluster is a connected subgraph of G such that all its nodes are faulty. In cluster fault tolerant routing problems, how many faulty clusters and how large of those clusters can be tolerated are studied. It has been ... View full abstract»

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  • The architecture of OCMP and its evaluation

    Publication Year: 1997, Page(s):71 - 77
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (652 KB)

    By gathering multiple processors in one LSI chip, communication delay between processors becomes shorter and then efficient fine/medium grain parallel processing can be realized. The authors propose a new processor architecture called OCMP (On-Chip Multi-Processing Architecture). OCMP has two characteristics: one is the instruction level dispatching mechanism; and the other is the divided cache sy... View full abstract»

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  • Toward more advanced usage of instruction level parallelism by a very large data path processor architecture

    Publication Year: 1997, Page(s):437 - 443
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (624 KB)

    The architectural performance gain of a microprocessor is going to saturate because of the small gain of instruction level parallelism. In this paper, we discuss the design points and some tentative solutions to overcome this bottleneck and propose a processor architecture called Very Large Data Path. This architecture broadens the window of instruction analysis to extract 10 times of parallel gai... View full abstract»

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  • A new general purpose parallel database system

    Publication Year: 1997, Page(s):2 - 8
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (676 KB)

    This paper is concerned with the transparent parallelisation of declarative database queries, based on theoretical principles. We have designed an entire database architecture suitable for use on any general-purpose parallel machine. This architecture addresses the shortcomings in flexibility and scalability of commercial parallel databases. A substantial benefit is that the mathematical principle... View full abstract»

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  • Efficient parallel multiselection on hypercubes

    Publication Year: 1997, Page(s):338 - 343
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (452 KB)

    We study efficient parallel solutions to the problem of selecting r elements at specified ranks from a set of n arbitrary elements, known as multiselection, on a hypercube with p processors, p,r⩽n. We propose two parallel algorithms based on different approaches, where one requires processors to operate in the SIMD mode, and the other in the MIMD mode. Our SIMD algorithm runs in time O((log n ... View full abstract»

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  • Hamiltonian-laceability of star graphs

    Publication Year: 1997, Page(s):112 - 117
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (572 KB)

    Suppose G is a bipartite graph with two partite sets of equal size. G is said to be strongly hamiltonian-laceable if there is a hamiltonian path between every two vertices that belong to different partite sets, and there is a path of (maximal) length N-2 between every two vertices that belong to the same partite set, where N is the order of G. The star graph is known to be bipartite. In this paper... View full abstract»

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  • Pleiades: a prototype of inter-processor network generation system

    Publication Year: 1997, Page(s):202 - 206
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (388 KB)

    A method that generates a static network for a dedicated parallel computer from an application program is proposed. The article describes the heuristic code scheduling algorithm that becomes necessary for the generation of the network. Furthermore, it describes the method of dependency analysis that becomes necessary for the insertion of the data transfer instruction and network generation. A netw... View full abstract»

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  • Speech support in wireless, multihop networks

    Publication Year: 1997, Page(s):282 - 288
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (620 KB)

    In this paper we address the evaluation of speech quality through a wireless network as perceived by the user. User perceived evaluation (in addition to the usual network metrics including delay, throughput, packet loss statistics etc.) is critical in the design of wireless multimedia networks where speech and video play a key role and are affected by several factors, such as network performance a... View full abstract»

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  • A fair congestion control scheme for LAN interconnection via ATM

    Publication Year: 1997, Page(s):397 - 403
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (536 KB)

    When LANs are interconnected via an ATM back-bone, traffic mismatch between the source LANs and the destination LAN can cause congestion at the destination Interworking Unit (DIWU). In this paper, we present an end-to-end credit-based feedback congestion control scheme that operates on the LAN side of the LAN/ATM interface. The scheme ensures that there is no packet loss at DIWU due to buffer over... View full abstract»

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