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Proceedings IEEE International Conference on Application-Specific Systems, Architectures and Processors

14-16 July 1997

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Displaying Results 1 - 25 of 54
  • Proceedings IEEE International Conference on Application-Specific Systems, Architectures and Processors

    Publication Year: 1997
    Request permission for commercial reuse | PDF file iconPDF (301 KB)
    Freely Available from IEEE
  • An approach for quantitative analysis of application-specific dataflow architectures

    Publication Year: 1997, Page(s):338 - 349
    Cited by:  Papers (87)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (752 KB)

    In this paper we present an approach for quantitative analysis of application-specific dataflow architectures. The approach allows the designer to rate design alternatives in a quantitative way and therefore supports him in the design process to find better performing architectures. The context of our work is video signal processing algorithms which are mapped onto weakly-programmable, coarse-grai... View full abstract»

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  • Index of authors

    Publication Year: 1997, Page(s):539 - 540
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    Freely Available from IEEE
  • Configurable computing: the catalyst for high-performance architectures

    Publication Year: 1997, Page(s):364 - 372
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (548 KB)

    Recent trends in the cost and performance of application-specific hardware relative to conventional processors discourage investing much time and energy in special-purpose architectures except for niche applications. These trends, however, may be reversed by the increasing complexity of computer architectures and the advent of configurable computing. Configurable computers have attracted considera... View full abstract»

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  • Automatic data mapping of signal processing applications

    Publication Year: 1997, Page(s):350 - 362
    Cited by:  Papers (4)  |  Patents (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (752 KB)

    This paper presents a technique to map automatically a complete digital signal processing (DSP) application onto a parallel machine with distributed memory. Unlike other applications where coarse or medium grain scheduling techniques can be used, DSP applications integrate several thousand of tasks and hence necessitate fine grain considerations. Moreover finding an effective mapping imperatively ... View full abstract»

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  • Accurate function approximations by symmetric table lookup and addition

    Publication Year: 1997, Page(s):144 - 153
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (524 KB)

    This paper presents a high-speed method for accurate function approximations. This method employs parallel table lookups followed by multi-operand addition. It takes advantage of leading zeros and symmetry in the table entries to reduce the table sizes. By increasing the number of tables and the number of operands in the multi-operand addition, the amount of memory is significantly reduced. This m... View full abstract»

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  • PART: a partitioning tool for efficient use of distributed systems

    Publication Year: 1997, Page(s):328 - 337
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (564 KB)

    The interconnection of geographically distributed supercomputers via high-speed networks allows users to access the needed compute power for large-scale, complex applications. For efficient use of such systems, the variance in processor performance and network (i.e., interconnection network versus wide area network) performance must be considered. In this paper, we present a decomposition tool, ca... View full abstract»

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  • CORDIC-based computation of ArcCos and ArcSin

    Publication Year: 1997, Page(s):132 - 143
    Cited by:  Papers (6)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (460 KB)

    CORDIC-based algorithms to compute cos-1(t), sin-1 (t) and √(1-t2) are proposed. The implementation requires a standard CORDIC module plus a module to compute the direction of rotation, this being the same hardware required for the extended CORDIC vectoring, recently proposed by the authors. Although these functions can be obtained as a special case of this e... View full abstract»

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  • Performance model of the Argonne Voyager multimedia server

    Publication Year: 1997, Page(s):316 - 327
    Cited by:  Papers (2)  |  Patents (33)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (560 KB)

    The Argonne Voyager Multimedia Server is being developed in the Futures Lab of the Mathematics and Computer Science Division at Argonne National Laboratory. As a network based service for recording and playing multimedia streams, it is important that the Voyager system be capable of sustaining certain minimal levels of performance in order for it to be a viable system. In this article, we examine ... View full abstract»

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  • A FPGA-based implementation of an intravenous infusion controller system

    Publication Year: 1997, Page(s):402 - 411
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (492 KB)

    In this paper we present the development and implementation of an intravenous infusion controller system based on FPGA's. The system receives information of an infusion drop sensor and controls the drop flow by giving the direction and number of steps of a stepper motor, which compress the drip-feed hose. The system consists of a mixed implementation of software and hardware. The software was impl... View full abstract»

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  • Design methodology for digital signal processing

    Publication Year: 1997, Page(s):468 - 477
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (552 KB)

    Improvements in semiconductor integration density and the resulting problem of having to manage designs of increasing complexity is an old one, but still current. The new challenge lies in a new level of architecture heterogeneity, e.g. mixing hard-wired digital circuits with software programmed signal processors on one die. Hence, we are moving by one level of abstraction from semi-custom standar... View full abstract»

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  • Low latency word serial CORDIC

    Publication Year: 1997, Page(s):124 - 131
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (396 KB)

    In this paper we present a modification of the CORDIC algorithm which reduces the number of iterations almost to half by merging two successive iterations of the basic algorithm. The two coefficients per iteration are obtained with only a small increase in the cycle time by estimating one of the coefficients. A correcting iteration method is used to correct the possible errors produced by the esti... View full abstract»

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  • A methodology for user-oriented scalability analysis

    Publication Year: 1997, Page(s):304 - 315
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (620 KB)

    Scalability analysis provides information about the effectiveness of increasing the number of resources of a parallel system. Several methods have been proposed which use different approaches to provide this information. This paper presents a family of analysis methods oriented to the user. The methods in this family should assist the user in estimating the benefits when increasing the system size... View full abstract»

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  • A novel sequencer hardware for application specific computing

    Publication Year: 1997, Page(s):392 - 401
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (716 KB)

    This paper introduces a powerful novel sequencer for controlling computational machines and for structured DMA (direct memory access) applications. It is mainly focused on applications using 2-dimensional memory organization, where most inherent speed-up is obtained thereof. A classification scheme of computational sequencing patterns and storage schemes is derived. In the context of application s... View full abstract»

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  • Architectural approaches for video compression

    Publication Year: 1997, Page(s):176 - 185
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (584 KB)

    An overview on architectures for implementations of current video compression schemes is given. Dedicated as well as programmable approaches are discussed. Examples for dedicated function-specific implementations include architectures for DCT and block matching. For programmable video signal processors, a number of architectural measures to increase video compression performance are reviewed. Actu... View full abstract»

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  • An efficient architecture for the in place fast cosine transform

    Publication Year: 1997, Page(s):499 - 508
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (476 KB)

    The cosine transform (DCT) is in the core of image encoding and compression applications. We present a new architecture to efficiently compute the fast direct and inverse cosine transform which is based on reordering the butterflies after their computation. The designed architecture exploits locality, allowing pipelining between stages and saving memory (in place). The result is an efficient archi... View full abstract»

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  • Discrete Lagrangian method for optimizing the design of multiplierless QMF filter banks

    Publication Year: 1997, Page(s):529 - 538
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (584 KB)

    In this paper, we present a new discrete Lagrangian optimization method for designing multiplierless QMF (quadrature mirror filter) filter banks. In multiplierless QMF filter banks, filter coefficients are powers-of-two (PO2) where numbers are represented as sums or differences of powers of two (also cabled Canonical Signed Digit-CSD-representation), and multiplications can be carried out as addit... View full abstract»

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  • Buffer size optimization for full-search block matching algorithms

    Publication Year: 1997, Page(s):76 - 85
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (512 KB)

    This paper presents how to find optimized buffer size for VLSI architectures of full-search block matching algorithms. Starting from the DG (dependency graph) analysis, we focus in the problem of reducing the internal buffer size under minimal I/O bandwidth constraint. As a result, a systematic design procedure for buffer optimization is derived to reduce realization cost View full abstract»

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  • ADPCM codec: from system level description to versatile HDL model

    Publication Year: 1997, Page(s):458 - 467
    Cited by:  Papers (2)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (672 KB)

    Due to the rapid increase in the system complexity of modern telecommunication products, two main challenges exist for a system design flow meeting the arising demands: 1) provide a platform for fast algorithmic and architectural design exploration and optimization from system to gate level, which guarantees high quality of results (QoR) and enables full and seamless design verification; 2) provid... View full abstract»

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  • Processor elements for the standard cell implementation of residue number systems

    Publication Year: 1997, Page(s):116 - 123
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (348 KB)

    In this article processor elements for the effective implementation of standard cell circuits based on residue number systems (RNS) are presented. Two new processors are proposed helping to reduce the hardware requirements of the implementations. Following a new strategy for implementation a comparison between other circuits discussed in past prove the new method and cells to lead to faster and sm... View full abstract»

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  • Heterogeneous multiprocessor scheduling and allocation using evolutionary algorithms

    Publication Year: 1997, Page(s):294 - 303
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (636 KB)

    We propose a novel stochastic approach for the problem of multiprocessor scheduling and allocation under timing and resource constraints using an evolutionary algorithm (EA). For composite schemes of DSP algorithms a compact problem encoding has been developed with emphasis on the allocation/binding part of the problem as well as an efficient problem transformation-decoding scheme in order to avoi... View full abstract»

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  • Tiling with limited resources

    Publication Year: 1997, Page(s):229 - 238
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (532 KB)

    In the framework of perfect loop nests with uniform dependences, tiling has been extensively studied as a source-to-source program transformation. Little work has been devoted to the mapping and scheduling of the tiles on to physical processors. We present several new results in the context of limited computational resources, and assuming communication-computation overlap. In particular, under som... View full abstract»

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  • A massively parallel implementation of the watershed based on cellular automata

    Publication Year: 1997, Page(s):42 - 52
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (588 KB)

    The watershed transform is a very powerful segmentation tool which comes directly from the idea of watershed line in geohydrology. It has proved its efficiency in many computer vision application fields. This paper presents a new implementation of the watershed which is optimal according to computation time. The flooding algorithm is reminded. Then, a massively parallel cellular automaton is propo... View full abstract»

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  • A multiprocessor system for real time high resolution image correlation

    Publication Year: 1997, Page(s):384 - 391
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (456 KB)

    In this paper a dedicated multiprocessor architecture for a real time implementation of the normalized cross correlation function (NCCF) on images up to 1024x1024 pixels is presented. The computational requirements are dramatically reduced by calculating this algorithm in the frequency domain. In contrast to a standard implementation of the NCCF which inherently imposes rectangular templates, the ... View full abstract»

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  • Efficient implementation of rotation operations for high performance QRD-RLS filtering

    Publication Year: 1997, Page(s):162 - 174
    Cited by:  Papers (11)  |  Patents (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (740 KB)

    In this paper we present practical techniques for implementing Givens rotations based on the well-known CORDIC algorithm. Rotations are the basic operation in many high performance adaptive filtering schemes as well as numerous other advanced signal processing algorithms relying on matrix decompositions. To improve the efficiency of these methods, we propose to use “approximate rotations&rdq... View full abstract»

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