Date 1-2 Dec. 2008
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Displaying Results 1 - 25 of 62
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[Front cover]
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PDF (1058 KB)
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[Copyright notice]
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PDF (102 KB)
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Welcome to IEEE 9th VLSI packaging workshop in Japan (VPWJ2008)
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PDF (258 KB)
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IEEE 9th VLSI Packaging workshop in Japan Committees
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PDF (162 KB)
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Workshop schedule
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PDF (159 KB)
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Technical program schedule
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PDF (596 KB)
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Invited talk
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PDF (48 KB)
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[Blank page]
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PDF (5 KB)
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3D-SiP: The latest miniaturization technology
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PDF (3917 KB)
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Session 1 Advanced packaging
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PDF (53 KB)
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[Blank page]
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PDF (6 KB)
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Applied optimization of black oxide flat heat spreader for low-k molded flip chip packages
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PDF (1762 KB)
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Session 2 thermal design
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PDF (52 KB)
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[Blank page]
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PDF (6 KB)
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Enabling Dynamic Voltage & Frequency Scaling in next-generation microprocessors: Thermal & reliability considerations
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PDF (1123 KB)
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Session 3 Mechanical design
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PDF (83 KB)
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[Blank page]
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PDF (6 KB)
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Numerical analysis and experimental validation for the prediction of flip chip solder joint standoff height in MEMS microphone application
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PDF (1764 KB)
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