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Rapid System Prototyping, 1993. Shortening the Path from Specification to Prototype. Proceedings., Fourth International Workshop on

Date 28-30 June 1993

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Displaying Results 1 - 23 of 23
  • Proceedings The Fourth International Workshop on Rapid System Prototyping. Shortening the Path from Specification to Prototype (Cat. No.93TH0567-8)

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  • Advanced requirements engineering workstation

    Page(s): 205 - 208
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    Since 1985, Rome Laboratory (RL) has been evolving a Requirements Engineering Testbed (RET) to host and evaluate C3I system and software requirements tools and techniques. The RET concept will house various tools and environments which provides a common user interface and object-oriented database for the easy manipulation of information. RET currently consists of the Requirements Engineering Environment (REE) which is an integrated toolset of requirements analysis and prototyping tools. The analysis and prototyping capabilities provided by the environment will be enhanced by incorporating the existing RL Knowledge Based Requirements Assistant (KBRA) tool functionality, which includes a frame-based representation language, multiple presentations, nonfunctional requirements capture and an intelligent notepad editor, into the REE. The resulting Advanced Requirements Engineering Workstation (AREW) will also be extended by incorporating metric capabilities and enhancing the existing REE methodology to provide guidelines for users performing requirements analysis activities using knowledge based techniques. The approach is influenced by the need to make progress in integrating the KBRA technology, while preserving robustness, performance, and REE functionality such as rapid prototyping and dynamic modeling. AREW is concerned with evolving long term requirements elicitation and analysis capabilities to more fully utilize knowledge based, expert system technology View full abstract»

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  • Stochastic statecharts and rapid prototype software architecture

    Page(s): 68 - 77
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    Stochastic statecharts are introduced as an attractive means for precisely representing the reactive behavior of complex nondeterministic systems. Such representation centers on absolute real time, concurrency, and stochastic effects. The characterization of stochastic effects entails modest yet significant higher-level statechart notational changes to both the statechart graphical conventions and the transition rule syntax extensions. Appreciable latitude is afforded in expressing differing probability distributions and parameters, for the primary emphasis is on modeling power rather than on analytical tractability. An example of an on-line transaction processing system is used to illustrate the inclusion of stochastic effects. These are in the form of absolute timing variability and probabilistic process decisions. The richness and complexity of such models, moreover, suggest the need for prototyping as a practical necessity in their assessment. Although the modularity of statecharts yields naturally partitioned specifications, their mapping to highly modular prototypes can be rather problematic for higher-level statecharts. This stems largely from the appreciable coupling among distinct threads of control, and in turn the complexity of prototype software interfaces. To redress such difficulties, a new software prototype structuring approach and architecture are described. They facilitate software prototype development as well as software component reuse View full abstract»

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  • A generic prototype model for distributed systems based on high level object oriented specification

    Page(s): 194 - 204
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    This paper presents a multi-formalism method for design and rapid prototyping of parallel systems. This approach mixes object paradigm and formal verification techniques. The method is based on enrichment and refinements, each one involving several intermediate representations bringing additional information. On this basis, a prototype is generated that may be either a prototype or a first operational version of the system or a model outlining design aspects. The prototype is defined using a generic architecture which makes it possible to implement the prototyping process for several languages without having to change the design approach View full abstract»

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  • Verification and validation in an iterative software development environment

    Page(s): 57 - 67
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    The Joint National Intelligence Development Staff (JNIDS) is a government organization. Since 1985, JNIDS has developed software using an iterative methodology that allows deployment of systems rapidly, using the most advanced technology available, by combining evolutionary acquisition with the spiral development model. Traditional verification and validation cannot keep pace with the constant change found in this environment. Recognizing this, JNIDS has initiated an effort to perform verification and validation in this dynamic development environment. The initial results of this effort are presented View full abstract»

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  • PDG: a process-level debugger for concurrent programs in the GRAPE rapid prototyping environment

    Page(s): 17 - 30
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    The authors describe the process-level debugger of GRAPE, an environment for the rapid prototyping of digital signal processing systems on parallel computers. This debugger allows one to debug concurrent programs that are based on communicating sequential processes. Its unique feature is that it clearly separates the identification of erroneous processes from the exact localisation of the bug on the source-level. This divide-and-conquer approach is absolutely necessary for debugging complex parallel programs in a fast and systematic way, which is a key issue for rapid prototyping. The process-level debugging approach is based on an animation of program behaviour on its hierarchical graphical representation. Graphical views are used that reflect the programmer's mental picture of the application. Hierarchy allows one to employ a top-down debugging approach in which one successively refines the search-space by zooming in on suspect processes first-time-right. They consider both hierarchy that hides algorithmic details, and hierarchy that hides implementation issues. During animation a debugging kernel implementing a record-replay mechanism guarantees reproducible program behaviour even for programs containing asynchronisities View full abstract»

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  • Prototyping distributed systems using an object-oriented specification language

    Page(s): 236 - 245
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    The authors discuss a software environment that automates the extraction of an object from the knowledge base and represents it in DOSL form. A prototype system to execute DOSL specifications is described. The method chose provides a translator from DOSL to ACT++ View full abstract»

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  • Mathematical foundation for the design of testing systems

    Page(s): 224 - 235
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    Discusses optimum strategies for the design of knowledge built systems, and in particular, software testing systems. Object oriented methodology and dynamic programming techniques are used to define testing milestones and computational algorithms. The testing process is viewed as the initialization and control of data flow between different software parts. The major issue is how to define the demand for testing services. After demand is defined, the next step is to apply the minimum spanning tree algorithm to serve this demand for a minimum cost. The formalized minimum spanning tree algorithm, elaborated, enables one to resolve the design complexity problem for a very large system (CATV network design) View full abstract»

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  • A reusable rapid prototyping environment for monitoring in a discrete part manufacturing and semi process industry

    Page(s): 80 - 88
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    The trend towards concurrent engineering and rapid system prototyping has placed additional requirements forcing a reorientation from a tool to a process view and complex synthesis engines. At the very beginning the user puts his thoughts on paper and at the end he tests the results of his ideas. For two representative industrial applications: discrete part manufacturing (car assembly line) and a semi-process industry (aluminium melting and casting) a rapid prototyping environment is proposed to be used for monitoring purposes. The environment is based on the CIM open system architecture (CIMOSA). Monitoring activities are modelled according to the CIMOSA modelling framework. These models are executed by the CIMOSA integrating infrastructure. The rapid prototyping environment is built around the McCIM tool kit; it promotes reuse, innovation and correct design. The resulting McCIM configuration is presented and the implementation issues of the monitoring architecture are discussed View full abstract»

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  • Taxonomy of rapid-prototyping methods and tools

    Page(s): 42 - 56
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    A prototype-based software development can complement or offer an alternative to traditional system development techniques. Software prototyping approaches are becoming more sophisticated and systems prototyping tools and techniques are rapidly evolving. The paper presents a survey of graphical and textual software prototyping approaches. The authors dwell on the respective representations, methods, and benefits. They give examples of typical software tools available to carry out system prototyping. A taxonomy of prototyping approaches is given View full abstract»

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  • The design of a library support system for a telecommunication system synthesis environment

    Page(s): 120 - 131
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    Architectural level design and synthesis requires a versatile library support system. Such a system must have provisions for organizing abstract models in a hierarchical manner as well as retrieval and storage of components in an object-oriented manner. Common relations between models can then be captured and different library models substituted and reused within the environment. An example of the capabilities of the library system for DASE is also provided View full abstract»

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  • A constrained prototyping tool: RSP _W

    Page(s): 114 - 119
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    Prototypes cannot be achieved without any tools, but nevertheless one often forgets that these prototypes can be subjected to implementing constraints (for example, using a particular protocol) which are imposed by the environment. Within this context, it appears difficult to find implementations able to take into account these constraints. RSP _W (rapid software prototyping workbench) aims to answer this need View full abstract»

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  • Real-time scheduling for software prototyping

    Page(s): 150 - 163
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    This paper presents real-time scheduling methods supporting a prototyping language for embedded systems. Rapid prototyping of embedded systems can be accomplished using a Computer Aided Prototyping System (CAPS) and its associated Prototyping Language (PSDL) to aid the designer in handling hard real-time constraints. The prototyping language PSDL is designed based on the real-time model of CAPS. The language models time critical operations with maximum execution times, maximum response times, minimum or fixed periods, and deadlines. Timing constraints in PSDL are described along with scheduling algorithms relative to a series of hardware models used in the CAPS which includes multiprocessor configurations View full abstract»

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  • Rapid prototyping using laser restructurable VLSI circuits

    Page(s): 134 - 140
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    The development of ASICs is a costly proposition in terms of the technology, equipment, and the time required. The advent of laser restructurable VLSI (LRVLSI), promises the design engineer the capability to interconnect cells that implement generic logic functions (e.g., sum of products) to achieve a higher level of complexity design. An operating environment and infrastructure for rapid prototyping and quick turnaround using laser restructuring of VLSI circuits were developed. The purpose of this facility is threefold: to pursue research on novel interconnect technologies using LRVLSI, to develop the capability of operating in a quick turnaround mode using optimized process parameters, and to maintain standardization and compatibility with commercially available equipment for feasible technology transfer View full abstract»

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  • Interactive system design in ESCAPE

    Page(s): 108 - 113
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    This paper presents the ESCAPE design environment. ESCAPE is able to capture different design descriptions and to validate these descriptions through simulation. It is oriented towards hardware design and validation, although it can be used to model and validate other abstract models as well. ESCAPE basically consists of a very flexible tool to capture and to display design data and an integrated interactive simulator. Incremental updates of data structure, direct presentation of simulation results and the usage of animation make ESCAPE very useful for prototyping: it allows a very fast exploration of the design space and it is an excellent debugging tool View full abstract»

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  • REE-a requirements engineering environment for analyzing and validating software and system requirements

    Page(s): 188 - 193
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    Software and system prototyping are approaches which may be used early on in the lifecycle to identify deficiencies and errors in requirements. Since 1985, Rome Laboratory has been developing tools in support of software and system prototyping. The tools provide support for prototyping user interfaces, functional algorithms and software/hardware mappings for parallel and distributed architectures. The prototyping tools have recently been integrated into a requirements engineering environment (REE) which houses tools for requirements elicitation, analysis, specification and validation. The REE utilizes a common object-oriented database to store tool data and share information between tools. This paper emphasizes the capabilities of the REE prototyping tools along with their corresponding methodologies. Areas where data sharing occurs between the REE tools is also discussed View full abstract»

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  • Rapid prototyping using the VMEbus in an open systems architecture real-time environment

    Page(s): 89 - 99
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    This paper presents an open systems architecture (OSA) rapid prototyping concept developed at MITRE corporation. The prototype is for a synchronous communications controller. The following OSA elements form the basis of this rapid prototyping concept for real-time systems: VMEbus-based commercial off-the-shelf (COTS) hardware, standardized software, and networking protocol standards. The development methodologies for modeling real-time systems that have been implemented are described in conjunction with the (UNIX/VxWorks host) and target software development environment. By implementing this rapid system prototyping concept, the hardware and software development life cycles are shortened. In addition, the utilization of standards leads to a simplified migration path for upgrading systems View full abstract»

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  • Controlling prototyping and evolutionary development

    Page(s): 164 - 185
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    The control and management of prototyping is a neglected research area. Whilst there is now some acceptance of prototyping as a technique which can be used to enhance software development, there is little evidence available that gives practical assistance on its effective use. Most prototyping work concentrates on individual case studies and a qualitative judgment on how it can be used to improve some aspect of software development. This paper suggests how control can be formally applied. It contrasts the controlling mechanisms behind structured life cycle techniques with methods advocated for controlling prototyping. A model for controlling prototyping is described. This emphasises the essential need for formally defining methods of monitoring and terminating the prototyping process. It is suggested that by using this form of approach is it possible to properly organise and plan prototyping, either as part of an evolutionary or as part of a life-cycle development method View full abstract»

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  • The 1993 AnyBoard rapid-prototyping environment

    Page(s): 31 - 40
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    The programming of the AnyBoard is demonstrated by the design of a digital oscilloscope. The operations needed to enter, simulate, store, map, and debug a design are designed. The length of time needed to accomplish each of these operations is used to justify some proposed enhancements to the AnyBoard rapid-prototyping environment View full abstract»

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  • Development of neural network tools for rapid computer system design

    Page(s): 210 - 223
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    Methodologies are developed for improving design quality and the speed of the design process. The authors present the portion of the work which involves the application and extension of neural networks to solve optimization problems that arise in this design process. Specifically, they discuss the use of neural networks to solve the scheduling and allocation problems that arise when assigning operations to control steps and functional units. The goal is to minimize the number of control steps, number of each type of functional unit, allow multi-step operations, and handle bussing constraints. The application of neural networks to high-level computer design has the potential to provide more flexible, advanced computer system design tools View full abstract»

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  • Development of a load balancing tool for the GRAPE rapid prototyping environment

    Page(s): 2 - 16
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    In the graphical programming environment GRAPE-II intended for rapid prototyping of DSP ASICs on a multi-processor, a load balancing tool is required to map the different jobs of the DSP application on the multi-processor. Since most of the existing load balancing algorithms perform less well when they have to handle large or complex applications, the authors develop a tool that is better suited for such problems. This tool is based on three main techniques. (1) By exploiting the hierarchy that exists in the application graph, the complexity for each of the tools can be reduced. (2) Splitting the load balancing in sub tasks leads to three smaller search spaces instead of one big space. (3) Each of the smaller search spaces on its turn is reduced by using appropriate heuristic rules. As an example of this approach the scheduling tool and the basics of the assignment tool are presented View full abstract»

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  • Design and implementation of an interface control unit for rapid prototyping

    Page(s): 141 - 148
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    A major difficulty in rapid prototyping is the interconnection of processors with tailored networks to implement systems. This difficulty may be alleviated by utilizing a standardized processor-to-processor interface. This paper describes an interface control unit (ICU) VLSI circuit which uses a `standard' communication interface to implement signal processing systems. The ICU comprises queuing structures, communication channel interfaces, a processor interface, and a control interface. Communication protocols are described for interfaces between the ICU and communication channels, the processor, and the control unit. Based on these protocols, a digital design has been completed which is described. The chip will be fabricated using 0.6 micron CMOS technology View full abstract»

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  • Parallel switch level fault simulation algorithm/complexity verification using compiled code VHDL

    Page(s): 100 - 105
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    Switch level faults, as opposed to traditional gate level faults, can more accurately model the physical faults found in integrated circuits. Existing fault simulation techniques have a worst-case computational complexity of O(n**2), where n is the number of devices in the circuit. A parallel hardware accelerated fault simulator (PHAFS) has been proposed in order to reduce the complexity to O(L**2), where L is the number of levels of switches encountered when traversing from output to input. The paper presents the algorithm/complexity verification as needed for the prototyping of PHAFS. The verification includes a compiled code VHDL switch level fault simulator View full abstract»

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