Electrical Performance of Electronic Packaging, 2008 IEEE-EPEP
Date 27-29 Oct. 2008
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Displaying Results 1 - 25 of 98
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[Front matter]
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PDF (853 KB)
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Power integrity I
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PDF (16 KB)
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Verification and co-design of the package and die power delivery system using wavelets
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PDF (2983 KB)
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Designs of signal-ground bump-patterns for minimizing the simultaneous switching noise in a ball grid array
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PDF (3389 KB)
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High speed link
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PDF (16 KB)
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Design and analysis of a TB/sec memory system
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PDF (12830 KB)
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Statistical link analysis of high-speed memory I/O interfaces during simultaneous switching events
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PDF (3487 KB)
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An active crosstalk reduction technique for parallel high-speed links in low cost wirebond BGA packages
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PDF (1209 KB)
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Signal integrity 1
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PDF (16 KB)
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Multimode signaling on non-ideal channels
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PDF (581 KB)
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Chip-package co-design methodology for global co-simulation of re-distribution layers (RDL)
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PDF (7023 KB)
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Measurement
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PDF (15 KB)
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On-chip oscilloscope for signal integrity characterization of interconnects in 130nm CMOS technology
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PDF (662 KB)
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Measurement techniques for on-chip power supply noise waveforms based on fluctuated sampling delays in inverter chain circuits
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PDF (3473 KB)
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Accurate resistance, inductance, capacitance, and conductance (RLCG) from uniform transmission line measurements
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PDF (549 KB)
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Open forum (Posters) I
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PDF (16 KB)
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Design, modeling, and characterization of embedded electromagnetic band gap (EBG) structure
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PDF (7419 KB)
