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2008 IEEE International Symposium on Precision Clock Synchronization for Measurement, Control and Communication

Date 22-26 Sept. 2008

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Displaying Results 1 - 25 of 35
  • [Front matter]

    Publication Year: 2008, Page(s):i - ii
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    Freely Available from IEEE
  • Table of contents

    Publication Year: 2008, Page(s):iii - vi
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  • Message from the general co-chairmen

    Publication Year: 2008, Page(s): vii
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  • Message from the Program Co-Chairs

    Publication Year: 2008, Page(s): viii
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  • Conference committee

    Publication Year: 2008, Page(s): ix
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  • ISPCS 2008 industry sponsoring partners

    Publication Year: 2008, Page(s): x
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  • Time synchronization and Internet QoS: Challenges and solutions

    Publication Year: 2008, Page(s): xi
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    Freely Available from IEEE
  • Synchronizing PTPv1 and PVPv2 clients with one common time source

    Publication Year: 2008, Page(s):1 - 6
    Cited by:  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (500 KB) | HTML iconHTML

    Since the release of the first version of IEEE 1588 in 2002 a significant number of vendors released V1 compliant devices to the market. Since V1 compliant devices can be negatively affected by V2 compliant devices when they are operating in the same network segment, a scheme for synchronizing both V1 and V2 devices based on the same time source is required in order to allow end users to smoothly ... View full abstract»

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  • Spider transparent clock

    Publication Year: 2008, Page(s):7 - 11
    Cited by:  Papers (7)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (827 KB) | HTML iconHTML

    This paper discusses a device, the spider transparent clock, which can be used to retrofit existing bridges and routers to allow them to deliver highly accurate time using the IEEE 1588 protocol. The spider transparent clock corrects for the internal queuing jitter and asymmetry introduced by these bridges and routers. View full abstract»

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  • Limits of synchronization accuracy using hardware support in IEEE 1588

    Publication Year: 2008, Page(s):12 - 16
    Cited by:  Papers (29)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (568 KB) | HTML iconHTML

    Clock synchronization protocols for packet-oriented networks, like IEEE 1588, depend on time stamps drawn from a local clock at distinct points in time. Due to the fact that software-generated time stamps suffer from jitter caused by non-deterministic execution times, many implementations for high precision clock synchronization rely on hardware support. This allows time readings for packets with ... View full abstract»

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  • Software-only implementations of slave clocks with sub-microsecond accuracy

    Publication Year: 2008, Page(s):17 - 22
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (407 KB) | HTML iconHTML

    Keeping slave clocks with sub-microsecond accuracy is believed to require hardware-assistance at physical layer and network. This paper presents software-only implementations of a slave for such accuracy. Time-stamps are read in the interrupt handler and a system resource conflicts detector filters out system-inside noise. We adopted Packet Inter-Arrival based clock servo technique that has fast c... View full abstract»

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  • An application framework for the IEEE 1588 standard

    Publication Year: 2008, Page(s):23 - 28
    Cited by:  Papers (3)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (871 KB) | HTML iconHTML

    This paper introduces an application framework for the Institute of Electrical and Electronics Engineers (IEEE) 1588 standard. This application framework, developed at the National Institute of Standards and Technology (NIST), consists of five layers: hardware layer, operating system layer, middleware and tools layer, IEEE 1588 layer, and application layer. A prototype application system has been ... View full abstract»

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  • The cost of variability

    Publication Year: 2008, Page(s):29 - 36
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2196 KB) | HTML iconHTML

    We explore the robustness of synchronization performed in the presence of variable latencies using two software clocks: the TSCclock, designed to replace ntpd for Internet synchronisation, and ptpd, a software implementation of IEEE-1588. Using a precise comparison methodology the TSCclock is shown to be more accurate and far more robust. We discuss the reasons why and the implications for IEEE-15... View full abstract»

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  • IEEE 1588 syntonization and synchronization functions completely realized in hardware

    Publication Year: 2008, Page(s):1 - 4
    Cited by:  Papers (15)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (688 KB) | HTML iconHTML

    The Precision Time Protocol (PTP) is an application layer protocol and therefore destined to be implemented in software. Hardware functions, if present, include a high resolution clock that helps to generate precise timestamps for PTP messages. The presented paper describes an IEEE 1588 clock that realizes syntonization and synchronization functions completely in hardware. It combines a three-port... View full abstract»

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  • Practical application of 1588 security

    Publication Year: 2008, Page(s):37 - 43
    Cited by:  Papers (9)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1093 KB) | HTML iconHTML

    Version 2 of IEEE 1588 contains an extension to secure the given service of clock synchronization. This article describes a practical implementation of this extension for a clock synchronization network. Pitfalls also relevant to other implementations and important properties are discussed and performance results that cover normal operation and stress tests such as denial of service attacks are pr... View full abstract»

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  • PTP slave clock accuracy on circuit emulation system performance

    Publication Year: 2008, Page(s):44 - 48
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (785 KB) | HTML iconHTML

    This paper presents a telecom circuit-emulation system that uses the precision time protocol (PTP) aka IEEE1588 v2 for frequency distribution. In particular, a differential clock recovery mechanism is described that uses PTP as its reference clock based at one time on OCXO and at the other time on TCXO. A performance comparison is demonstrated for various test scenarios and compared against the st... View full abstract»

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  • Overview and timing performance of IEEE 802.1AS

    Publication Year: 2008, Page(s):49 - 53
    Cited by:  Papers (14)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (466 KB) | HTML iconHTML

    IEEE 802.1AS is being developed in the 802.1 working group as part of a set of standards for audio/video bridging (AVB). AVB networks will carry time-sensitive, high-quality, audio/video traffic, and IEEE 802.1AS will provide synchronization for these networks and ensure that the jitter, wander, and synchronization requirements for the time-sensitive traffic can be met. IEEE 802.1AS includes an IE... View full abstract»

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  • Achieving precise coordinated cluster time in a cluster environment

    Publication Year: 2008, Page(s):54 - 58
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (404 KB) | HTML iconHTML

    A time-keeping mechanism is proposed for providing microsecond-level consistent time across a cluster of computers. The proposed mechanism is based on a new clock steering algorithm that uses piecewise linear mapping to align a local clock to an external reference clock in a smooth manner. We present two realizations of the algorithm: one is based on pulse-per-second (PPS) and the other is based o... View full abstract»

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  • Master failures in the Precision Time Protocol

    Publication Year: 2008, Page(s):59 - 64
    Cited by:  Papers (15)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (859 KB) | HTML iconHTML

    If all clocks within a distributed system share the same notion of time, the application domain can gain several advantages. Among those is the possibility to implement real-time behavior, accurate time stamping, and event detection. However, with the wide spread application of clock synchronization another topic has to be taken into consideration: the fault tolerance. The well known clock synchro... View full abstract»

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  • Improving reliability of IEEE1588 in electric substation automation

    Publication Year: 2008, Page(s):65 - 70
    Cited by:  Papers (7)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (393 KB) | HTML iconHTML

    The IEEE 1588 precision time protocol seems to be a promising way to handle synchronization requirements of tomorrow substation automation. However, one of the remaining issues is its lack of reliability in case of the loss of the GPS signal (e.g. due to atmospheric disturbances or failure of the GPS antenna) which would lead to the desynchronization of the devices inside a substation or between d... View full abstract»

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  • An application of IEEE 1588 to Industrial Automation

    Publication Year: 2008, Page(s):71 - 76
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (451 KB) | HTML iconHTML

    This paper describes an application of the IEEE 1588 standard to industrial automation. Key application use cases are identified that can benefit from time-based control techniques to improve performance results over traditional control methods. A brief discussion of how the 1588 standard may be adopted suitable to these applications. Application problems specific to industrial automation are enum... View full abstract»

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  • Semiconductor manufacturing equipment data acquisition simulation for timing performance analysis

    Publication Year: 2008, Page(s):77 - 82
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (758 KB) | HTML iconHTML

    The ability to acquire quality equipment and process data is important for future real-time process control systems to maximize opportunities for semiconductor manufacturing yield enhancement and equipment efficiency. Clock synchronization for accurate time-stamping and maintaining a consistent frequency in trace data collection are essential for accurate merging of data from heterogeneous sources... View full abstract»

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  • Time synchronization successes and challenges in the semiconductor industry

    Publication Year: 2008, Page(s):83 - 86
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2629 KB) | HTML iconHTML

    Timestamping is critical when gathering information that can be used to respond to problems in the factory. ISMI has been driving data quality guidelines and standards for time synchronization with the purpose of improving data collection and decision-making during manufacturing. These activities have led to the publication of multiple guideline documents, a SEMI standard, and a guide document. In... View full abstract»

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  • Evaluation of clock synchronization accuracy of coexistent Real-Time Ethernet protocols

    Publication Year: 2008, Page(s):87 - 91
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (538 KB) | HTML iconHTML

    This paper investigates Real-Time Ethernet (RTE) protocols for industrial applications and their clock synchronization performance. In fact, if different RTE protocols coexist on the same network sharing the same infrastructure, clock synchronization capabilities can be affected. This paper introduces a simulation environment to evaluate coexistence of RTE protocols. The proposed tool is described... View full abstract»

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  • 1μs-conform line length of the Transparent Clock Mechanism defined by the Precision Time Protocol (PTP Version 2)

    Publication Year: 2008, Page(s):92 - 97
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (546 KB) | HTML iconHTML

    This paper quantifies the ldquo1 mus-conformrdquo line-length of the Transparent Clock Mechanism of peer-to-peer Precision Time Protocol (PTP Version 2), i.e. the number of elements that stay within the plusmn1 mus sync error tolerance, for crystal oscillator output frequencies of 100 MHz, 250 MHz, 500 MHz and 1 GHz, i.e. for time quantization errors of 10 ns, 4 ns, 2 ns and 1 ns. View full abstract»

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