2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping

2-5 June 2008

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  • [Front cover]

    Publication Year: 2008, Page(s): C1
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  • [Title page i]

    Publication Year: 2008, Page(s): i
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  • [Title page iii]

    Publication Year: 2008, Page(s): iii
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  • [Copyright notice]

    Publication Year: 2008, Page(s): iv
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  • Table of contents

    Publication Year: 2008, Page(s):v - vii
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  • Message from the General Chairs

    Publication Year: 2008, Page(s): viii
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  • Message from the Organizing Chair

    Publication Year: 2008, Page(s): ix
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  • Message from the Program Chairs

    Publication Year: 2008, Page(s): x
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  • Conference Committee

    Publication Year: 2008, Page(s): xi
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  • Acknowledgements

    Publication Year: 2008, Page(s): xii
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  • Keynotes

    Publication Year: 2008, Page(s): xiii
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (74 KB)

    Provides an abstract for each of the keynote presentations and a brief professional biography of each presenter. The complete presentations were not made available for publication as part of the conference proceedings. View full abstract»

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  • The RTSJ for Prototyping Real-Time Systems: A Case Study

    Publication Year: 2008, Page(s): xiv
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  • Multi-dimensional Model Based Engineering Using AADL

    Publication Year: 2008, Page(s):xv - xviii
    Cited by:  Papers (8)
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  • Testing Automotive System Prototypes Far before Driving on the Proving Ground

    Publication Year: 2008, Page(s): xix
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  • RealSpec: An Executable Specification Language for Prototyping Concurrent Systems

    Publication Year: 2008, Page(s):3 - 9
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (254 KB) | HTML iconHTML

    RealSpec is a declarative executable language for the prototyping of concurrent and real-time systems based on a dataflow functional model. RealSpec is developed on top of Lucid dataflow programming language by enhancing Lucid with features for real-time systems. This paper provides basic RealSpec language constructs for modeling concurrent processes, multithreading, and resource modeling. The pro... View full abstract»

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  • Using MDE for the Rapid Prototyping of Space Critical Systems

    Publication Year: 2008, Page(s):10 - 16
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (236 KB) | HTML iconHTML

    The reliability requirements for space-critical system call for specific tools and models. Space systems have been a long time user of models (synchronous or asynchronous building blocks), from which code generators could derive analyzable code, while also providing additional benefits like simulation, model checking, etc. However, the integration of multiple models to form one complete system was... View full abstract»

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  • Functional DIF for Rapid Prototyping

    Publication Year: 2008, Page(s):17 - 23
    Cited by:  Papers (31)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (285 KB) | HTML iconHTML

    Dataflow formalisms have provided designers of digital signal processing systems with optimizations and guarantees to arrive at quality prototypes quickly. As system complexity increases, designers are expressing more types of behavior in dataflow languages to retain these implementation benefits. While the semantic range of DSP-oriented dataflow models has expanded to cover quasi-static and dynam... View full abstract»

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  • High-Level Estimation of Execution Time and Energy Consumption for Fast Homogeneous MPSoCs Prototyping

    Publication Year: 2008, Page(s):27 - 33
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (357 KB) | HTML iconHTML

    In order to fulfill the increasing performance requirements, complex embedded systems design makes use of many processors communicating through efficient infrastructures, performing multiprocessor-systems-on-chip (MPSoCs). Issues related to execution time and energy consumption estimations become more relevant during the design stage of such systems, in order to verify their compliance with the sp... View full abstract»

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  • Software for Multi Processor System on Chip: Moving an MPEG4 Decoder from Generic RISC Platforms to CELL

    Publication Year: 2008, Page(s):34 - 40
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (186 KB) | HTML iconHTML

    This paper presents the challenges encountered during the process of moving an MPEG4 decoder implementation from Rise based platforms to CELL processor. It presents multiple implementations of MPEG4 video decoder on a CELL processor, using different software partitioning and mapping schemes. The approach starts from a generic representation of an MPEG4 video decoder, from which multiple customized... View full abstract»

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  • Multi-CPU/FPGA Platform Based Heterogeneous Multiprocessor Prototyping: New Challenges for Embedded Software Designers

    Publication Year: 2008, Page(s):41 - 47
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (374 KB) | HTML iconHTML

    Heterogeneous multiprocessor systems on-chip (MPSoC) are considered to be the next generation of multiprocessor architectures able to deal with the ever increasing performances and scalability demands. In fact, combining heterogeneous processors in the same architecture allows drawing on strength from each kind of processor, increasing overall system performance and efficiency. However, such a des... View full abstract»

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  • Configurable Heterogeneous MPSoC Architecture Exploration Using Abstraction Levels

    Publication Year: 2008, Page(s):51 - 57
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (317 KB) | HTML iconHTML

    Configurable processors are adopted by several latest embedded system projects to make use of application specific custom instructions for instruction level parallelism. Meanwhile, designers also use multiple processors for thread level parallelism. Configurable heterogeneous multi-processor system-on-chip (CH-MPSoC) has both parallelism advantages and seems to be a good solution for future embedd... View full abstract»

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  • An Automated Design Flow for NoC-based MPSoCs on FPGA

    Publication Year: 2008, Page(s):58 - 64
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (213 KB) | HTML iconHTML

    Increased dynamics of the embedded devices market makes reduced time-to-market emerge as one of most challenging tasks in modern embedded system design. The complexity of Multiprocessor Systems-on-Chip (MPSoCs) rapidly increases and Networks-on-Chips (NoCs) have emerged as design strategy to cope with it. In order to allow fast generation of these platforms in the development phase, a full design ... View full abstract»

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  • Integrating Abstract NoC Models within MPSoC Design

    Publication Year: 2008, Page(s):65 - 71
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (358 KB) | HTML iconHTML

    Current embedded applications are migrating from single processor-based systems to intensive data communication requiring multiprocessing. The performance demanded by these applications requires the use of heterogeneous multiprocessing architectures in a single chip (MPSoCs) endowed with complex communication infrastructures, such as networks on chip or NoCs. NoC parameter choices, such as network... View full abstract»

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  • Automation of Communication Refinement and Hardware Synthesis within a System-Level Design Methodology

    Publication Year: 2008, Page(s):75 - 81
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (404 KB) | HTML iconHTML

    Traditional register-transfer level design methodologies for systems-on-chip are failing to keep up with the growing complexity of embedded applications and architectures. A well-known solution is to raise the level of design abstraction by using system-level methodologies. The refinement from system-level specifications to concrete implementations is an essential step in a system-level design met... View full abstract»

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  • A Methodology for Wireless Sensor Network Prototyping with Sophisticated Debugging Support

    Publication Year: 2008, Page(s):82 - 88
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (349 KB) | HTML iconHTML

    In this paper, we present a methodology for rapid prototyping of wireless sensor networks that allows to embed sophisticated debugging functionality in a mote prototype and thereby monitor entire networks. We achieve this goal by combining two fundamental concepts: the use of a re-configurable sensor node prototype platform, and an auxiliary network structure for granting a reliable communication ... View full abstract»

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