Proceedings of 1994 International Conference on Parallel and Distributed Systems

19-21 Dec. 1994

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  • Proceedings of 1994 International Conference on Parallel and Distributed Systems

    Publication Year: 1994
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  • Panel 1: Are We Providing The Right Education For Computer Science/engineering Students?

    Publication Year: 1994, Page(s): 14
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  • Panel 2: Is It Possible to Fairly Compare Interconnection Networks?

    Publication Year: 1994, Page(s):16 - 18
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  • Panel 3: Taiwan's Information Superhighway: Technical Issues And Social Impacts

    Publication Year: 1994, Page(s): 20
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  • Panel 4: What Types Of Research Papers Should We Be Writing?

    Publication Year: 1994, Page(s): 22
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  • Panel 5: Parallel Processing: What Have We Done Wrong?

    Publication Year: 1994, Page(s): 24
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  • Panel 6: Parallel And Distributed Processing Research In Some Asian Countries

    Publication Year: 1994, Page(s): 26
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  • Parallel block generalized WZ factorization

    Publication Year: 1994, Page(s):174 - 179
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (599 KB)

    In this paper we first present a block strategy for the generalized WZ factorization, which consists of block factorizing a matrix A in the form A=WZW/sup -1/. This study shows how a block strategy may be used to reduce a large eigenvalue problem into a number of smaller ones. Next, we develop a parallel multi-phase algorithm for this method, which requires processes such as matrices products, Gau... View full abstract»

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  • An efficient Hough transform algorithm on SIMD hypercube

    Publication Year: 1994, Page(s):236 - 241
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (500 KB)

    This paper presents a fast algorithm for computing the Hough transform on SIMD hypercube architectures. For an image with N/spl times/N pixels and n quantized /spl theta/ values, our algorithm computes the Hough transform in O(logN) time on a hypercube of size N/spl times/N/spl times/n. An efficient algorithm for large Hough transform problems on a smaller fixed-size hypercube is also given. On a ... View full abstract»

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  • Author index

    Publication Year: 1994, Page(s):769 - 771
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  • Efficient fault tolerance: an approach to deal with transient faults in multiprocessor architectures

    Publication Year: 1994, Page(s):354 - 359
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (636 KB)

    Dynamic error processing approaches are an important mechanism to increase the reliability in a multiprocessor system, while making efficient use of the available resources. To this end, dynamic error processing must be integrated with a fault treatment approach aiming at optimising resource utilisation. In this paper we propose a diagnosis approach that, accounting for transient faults, tries to ... View full abstract»

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  • Lock-free concurrent tree structures for multiprocessor systems

    Publication Year: 1994, Page(s):544 - 549
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (540 KB)

    This paper presents a window-based approach to design lock-free concurrent implementations for a class of top-down tree structures that supports operations whose executions can be modeled as a process of moving a window along a rooted simple path. Our approach can be implemented on multiprocessor systems that, support load-linked, store-conditional and check-valid synchronization primitives that a... View full abstract»

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  • A distributed memory multiprocessor implementation of C-with-Ease

    Publication Year: 1994, Page(s):250 - 257
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (552 KB)

    C-with-Ease is a superset of C, with primitives borrowed from Ease for process creation and communication. All communication is via distributed data structures called contexts. We present an efficient implementation of C-with-Ease for the Fujitsu AP1000, a distributed memory, message passing multiprocessor. We use two of the three AP1000 communication networks: the torus net for point to point com... View full abstract»

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  • Parallel implementation of the trie structure

    Publication Year: 1994, Page(s):538 - 543
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (480 KB)

    We present two simple algorithms for implementing the trie structure based on the MIMD (Multiple Instruction Streams Multiple Data Streams) model of computation. Unlike the implementation, our schemes allow operations on the trie structure by multiple processes. No hash function will be employed and the problem due to collision is thus, eliminated. By making use of a simple segmentation scheme. We... View full abstract»

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  • Efficient implementation of sorting algorithms on asynchronous distributed-memory machines

    Publication Year: 1994, Page(s):102 - 106
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (352 KB)

    The problem of merging two sequences of elements which are stored separately in two processing elements (PEs) occurs in the implementation of many existing sorting algorithms. We describe efficient algorithms for the merging problem on asynchronous distributed-memory machines. The algorithms reduce the cost of the merge operation and of communication, as well as partly solving the problem of load ... View full abstract»

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  • Broadcasting on faulty hypercubes

    Publication Year: 1994, Page(s):128 - 133
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (468 KB)

    In this paper we propose a method for constructing the maximum number of edge-disjoint spanning trees (in the directed sense) on a hypercube with arbitrary one faulty node. Each spanning tree is of optimal height. By taking the common neighbor of the roots of these edge-disjoint spanning trees as the new root and reversing the direction of the directed link from each root to the new root, a spanni... View full abstract»

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  • The design and implementation of the Pasda parallel file system

    Publication Year: 1994, Page(s):142 - 147
    Cited by:  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (568 KB)

    This paper presents a parallel file system, called Pasda, that not only addresses the problem of data rate mismatches between the requirements of an application, storage devices, and the inter-connection medium but also supports parallel file accesses in general purpose distributed systems. The Pasda (PArallel Storage Devices Accelerator) parallel file system uses a high-speed interconnection medi... View full abstract»

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  • Implementation of a tree-structured vector quantizer for image compression on the MasPar MP-1 parallel machine

    Publication Year: 1994, Page(s):242 - 247
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (544 KB)

    The transmission of digitized images over limited bandwidth channels motivates the use of data compression techniques. Many data compression techniques are not suitable for such applications because compression ratios of more than 20:1 are often required. One technique that can provide this level of compression is vector quantization. The processes of codebook generation and, especially, encoding ... View full abstract»

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  • An optimal fault-tolerant design approach for array processors

    Publication Year: 1994, Page(s):348 - 353
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (492 KB)

    A systematic approach for designing fault tolerant systolic array using space/time redundancy is proposed. The approach is based upon a fault tolerant mapping theory which relates space-time mapping and concurrent error detection techniques. By this design approach, the resulting systolic array is fault tolerant and optimal. Besides, it has the capability to compute more problem instances simultan... View full abstract»

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  • A heuristic algorithm for the reliability-oriented file assignment in a distributed computing system

    Publication Year: 1994, Page(s):454 - 459
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (324 KB)

    We develop a heuristic algorithm for the reliability-oriented file assignment problem (HROFA), which uses a careful reduction method to reduce the problem space. Based on some numerical results, the HROFA algorithm obtains the exact solution in most cases and the computation time is improved significantly. When it fails to give an exact solution, the deviation from the exact solution is very small View full abstract»

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  • Invited Mini-review Session 1: Object Technology And Distributed Operating Systems

    Publication Year: 1994, Page(s): 10
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    First Page of the Article
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  • A discrete-event simulation model for characterizing parallel file transfers

    Publication Year: 1994, Page(s):154 - 160
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (696 KB)

    In this paper, we characterize the performance of parallel file transfers using the Zebra striped network file system by means of distributed discrete-event simulation model which uses a variation of the conservative timestamping-technique. The simulator is a powerful tool that can be adapted to model related systems such as multiprocessors and distributed shared memories. Preliminary simulation r... View full abstract»

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  • Implementation of fast Hartley transform on multiple bus cache coherent multiprocessors

    Publication Year: 1994, Page(s):96 - 101
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (436 KB)

    The use of multiple bus as interconnection network for multiprocessors has shown attractive features as compared to the existing ones. The addition of cache memory makes the architecture still a high performance one. In this paper we consider the implementation of Hou's FHT on multiple bus cache coherent multiprocessors. The analytical formulas are developed and performances are analysed in terms ... View full abstract»

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  • Broadcast in all-port wormhole-routed 3D mesh networks using extended dominating sets

    Publication Year: 1994, Page(s):120 - 127
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (700 KB)

    A new approach to broadcast in wormhole-routed three-dimensional (3D) mesh networks is proposed. The approach extends the concept of dominating sets from graph theory by accounting for the relative distance-insensitivity of the wormhole routing switching strategy and by taking advantage of an all-port communication architecture, which allows each node to simultaneously transmit messages on differe... View full abstract»

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  • On evaluating parallel sparse Cholesky factorizations

    Publication Year: 1994, Page(s):162 - 167
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (472 KB)

    Though many parallel implementations of sparse Cholesky factorization with the experimental results accompanied have been proposed, it seems hard to evaluate the performance of these factorization methods theoretically because of the irregular structure of sparse matrices. This paper is an attempt to such research. On the basis of the criteria of parallel computation and communication time, we suc... View full abstract»

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