1997 IEEE International Performance, Computing and Communications Conference

5-7 Feb. 1997

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  • IEEE international performance, computing and communications conference

    Publication Year: 1997
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    Freely Available from IEEE
  • Fault-tolerant hierarchical routing

    Publication Year: 1997, Page(s):159 - 165
    Cited by:  Patents (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (673 KB)

    This paper presents a self-stabilizing, fault-tolerant hierarchical routing algorithm. Hierarchical routing algorithms are less expensive algorithm than traditional all-pairs routing algorithms (i.e., lower memory requirements, faster routing table lookups, and less costly broadcast). The algorithm presented here retains these benefits yet, maintains routing capability between all pairs of connect... View full abstract»

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  • Author index

    Publication Year: 1997, Page(s): 579
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    Freely Available from IEEE
  • A case study of authenticated and secure file transfer: the Iowa Campaign Finance Reporting System (ICFRS)

    Publication Year: 1997, Page(s):532 - 538
    Cited by:  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (692 KB)

    The Iowa Campaign Finance Disclosure project (ICFD) is a pilot effort to develop a simple and secure way for candidates running for public office or Political Action Committees (PACs) to disclose required financial information. In the prototype system described in this paper, a candidate or PAC can transmit information to the Iowa Ethics and Campaign Disclosure Board (IECDB) in the state capitol u... View full abstract»

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  • Performance implications of the PowerPC architecture's hashed page table utilization in Windows NT

    Publication Year: 1997, Page(s):315 - 320
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (496 KB)

    Windows NTTM is a portable operating system, and as such has an abstracted view of the underlying processor architecture. One of the most processor-specific portions of an operating system is the management of virtual memory, and NT is no different in this respect. NT abstracts the processor-specific address translation mechanism and manages it as a translation lookaside buffer (TLB). T... View full abstract»

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  • Threat-adaptive security policy

    Publication Year: 1997, Page(s):525 - 531
    Cited by:  Papers (3)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (648 KB)

    Secure systems have traditionally paid little attention to performance. This is because current secure systems apply a uniform and statically decided upon security policy to each user and do not associate an individualized level of trust with each user at run-time. This paper describes a new framework of threat and performance driven security. A threat-adaptive model which enforces a dynamic and i... View full abstract»

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  • Performance analysis using a non-invasive instruction trace mechanism

    Publication Year: 1997, Page(s):308 - 314
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (592 KB)

    NStrace is a bus-driven hardware trace facility developed for the PowerPC family of super-scalar RISC microprocessors. It uses a recording of activity on a target processor's bus to infer the sequence of instructions executed during that recording period. The instruction sequence is generated by simulating the processor using an architectural simulator. It represents the behavior of the processor ... View full abstract»

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  • Determining cell loss bounds for ATM quality-of-service

    Publication Year: 1997, Page(s):191 - 197
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (520 KB)

    Cell loss is a key measure for the performance of an ATM network. This paper presents an analysis of cell loss for periodic on/off (bursty) traffic sources. Periodic on/off traffic sources are representative of output traffic from leaky-bucket rate control mechanisms. Closed-form buffer size requirements and cell loss equations are developed and rigorously proved for queueing systems of increasing... View full abstract»

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  • Voting without version numbers

    Publication Year: 1997, Page(s):139 - 145
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (664 KB)

    Voting protocols are widely used to provide mutual exclusion in distributed systems and to guarantee the consistency of replicated data in the presence of network partitions. Unfortunately, the most efficient voting protocols require fairly complex metadata to assert which replicas are up-to-date and to denote the replicas that belong to that set. We present a much simpler technique that does not ... View full abstract»

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  • Buffer control scheme in multimedia synchronization

    Publication Year: 1997, Page(s):516 - 522
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (580 KB)

    We present a complete synchronization scheme for multimedia information systems. The playout schedule is ensured by setting medium retrieval schedule based on the suitable control time at each different medium servers and by providing a suitable buffer for each medium at the client side. Because of the asynchronous nature of the network and the host operating system, certain buffer management at c... View full abstract»

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  • Memory reference metrics and instruction trace sampling

    Publication Year: 1997, Page(s):301 - 307
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (604 KB)

    Trace-driven simulation models have been widely used to accurately estimate performance of proposed microarchitectures. Accuracy of the estimated performance greatly depends on the instruction traces as well as the model itself. Although long instruction traces are preferred, e.g. to fill a large cache, a trace could often be redundantly long; it might merely represent a small, tight loop. In this... View full abstract»

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  • On predictability and optimization of multiprogrammed caches for real-time applications

    Publication Year: 1997, Page(s):17 - 25
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (796 KB)

    For almost two decades caches have been used in conventional computers for better system performance. The performance of cache memory is measured by its hit ratio, which is a probabilistic measure on the percent of memory accesses that can be intercepted by the cache memory to reduce the average memory access time. Despite its effectiveness, the impact of the “probabilistically” reduce... View full abstract»

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  • Application of processor and L2 cache based performance monitors for use in workload characterization studies

    Publication Year: 1997, Page(s):337 - 341
    Cited by:  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (396 KB)

    This paper describes the first IBM system implementation using the Orca 12 cache. The Orca cache is a high performance, cost effective solution for using PowerPC 604e processors in server systems. The paper details the capabilities of the Orca performance monitor and results obtained on several workloads using the first IBM SMP value server View full abstract»

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  • Design and performance analysis of Crossbar* for bursty traffic

    Publication Year: 1997, Page(s):184 - 190
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (476 KB)

    The drawback of a conventional crossbar switch is its high complexity of switch points, O(N2), where N is the number of ports of the switch. We present an alternative design of crossbar switch (Crossbar*) which maps the locations of the switch points to a set of a finite projective plane. Since the number of points of a set of a finite projective plane is √N, the complexity of swi... View full abstract»

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  • 4 Mbps infrared wireless link dedicated to mobile computing

    Publication Year: 1997, Page(s):463 - 467
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (416 KB)

    A high performance and low power architecture is devised for a 4 Mbps infrared wireless communication system dedicated to the mobile computing. In this architecture, 4PPM (4-pulse position modulation) infrared signals detected by an infrared receiver are digitized into TTL interface level pulses, and the digitized pulses are demodulated by a 1-bit digital demodulator. To improve the dynamic range ... View full abstract»

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  • A non-blocking copy network for priority handling in ATM multicast switch

    Publication Year: 1997, Page(s):231 - 237
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (508 KB)

    This paper analyzes the performance of a non-blocking copy network for priority handling in a modular structured ATM multicast switch. Priority handling is required for a network congestion control as well as time critical services like video and voice conferences and interactive data services. The architecture of the non-blocking copy network is presented. The performance analysis for the copy ne... View full abstract»

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  • A new metric for processor allocation schemes in multiprocessor systems

    Publication Year: 1997, Page(s):42 - 48
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (616 KB)

    Recently a number of scalable interconnection networks for connecting multiple processors have been proposed. Though these networks differ in their properties such as bisection bandwidth, node degree, network diameter, and average diameter, there is one common problem that must be addressed by their designers. It should be possible to subdivide the set of processors such that the subset forms a sm... View full abstract»

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  • An adaptive multiple access protocol for broadcast channels

    Publication Year: 1997, Page(s):371 - 377
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (484 KB)

    A new adaptive multiple access protocol for time-slotted broadcast channels is presented. Slots are grouped into fixed-length time frame which can be dynamically assigned in either TDMA (time-division multiple access) or slotted-ALOHA mode. Initially, the users broadcast packets in the TDMA mode. If the number of unused slots in a frame exceeds a threshold value, the TDMA mode ceases in the next f... View full abstract»

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  • A scheme to determine buffer capacity for SDH multiplexing

    Publication Year: 1997, Page(s):509 - 515
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (396 KB)

    We present a method for multiplexing C-3 payload according to the ITU-T recommendations G.707, G.708 and G.709. Our technique eliminates signal rate variations, which occur in various multiplexing structures in the SDH networks, by using a buffer. Calculations related to the buffer capacity for C-3 payload are also presented. The proposed methodology is expected to be an efficient solution for mul... View full abstract»

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  • Parsim: a parallel trace-driven simulation facility for fast and accurate performance analysis studies

    Publication Year: 1997, Page(s):291 - 297
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (560 KB)

    One of the major impediments to pre-silicon performance analysis is the ever-increasing sizes of real workloads. This problem makes the use of trace-based simulation methods impractical in time-bound processor development projects. In this paper, we describe a simple method of speeding up trace-driven architectural simulation tools through the use of parallel processing. The PARSIM facility allows... View full abstract»

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  • A distributed algorithm for constructing an Eulerian tour

    Publication Year: 1997, Page(s):94 - 100
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (628 KB)

    We present an efficient distributed algorithm for constructing an Eulerian tour in a network. To construct an Eulerian circuit the algorithm requires (1+r)(|E||V|) messages and time units, where |E| is the number of the communication links, |V| is the number of the nodes in the underlying network graph, and 0⩽r<1. The value of r depends on the network topology and on the chosen traversal pa... View full abstract»

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  • MPEG VBR slice layer model using linear predictive coding and generalized periodic Markov chains

    Publication Year: 1997, Page(s):437 - 443
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (652 KB)

    We present an MPEG slice layer model for VBR encoded video using linear predictive coding (LPC) and generalized periodic Markov chains. Each slice position within an MPEG frame is modeled using an LPC autoregressive function. The selection of the particular LPC function is governed by a generalized periodic Markov chain; one chain is defined for each I, P, and B frame type. The model is sufficient... View full abstract»

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  • Real-time vector quantization-based image compression on the SIMPil low memory SIMD architecture

    Publication Year: 1997, Page(s):10 - 16
    Cited by:  Papers (9)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1028 KB)

    Vector quantization (VQ) has become a popular technique for image compression. While conventional unstructured VQs have the potential of achieving the best theoretical performance, they are also demanding in storage and computational requirements. A significant amount of current research on VQ implementations addresses increasing the speed of image encoding, which is one of the most computationall... View full abstract»

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  • An implementation of MLS on a network of workstations using X.500/509

    Publication Year: 1997, Page(s):546 - 553
    Cited by:  Papers (1)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (564 KB)

    We describe a project whose goal is to provide a secure distributed access control mechanism for user tasks in a heterogeneous network of computing resources. This is accomplished by implementing a UNIX-based multi-level security (MLS) scheme where users and resources are labeled with a security level and a group. Access control is enforced by an access list server that uses X.500 directory and X.... View full abstract»

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  • PowerPCTM performance monitor evolution

    Publication Year: 1997, Page(s):331 - 336
    Cited by:  Papers (2)  |  Patents (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (744 KB)

    The evolution of performance monitoring (PM) from its roots in PowerTM architecture to its current state are explored. Further discussed are many of the PM features in the PowerPC 604e, and the differences between the PMs in some PowerPC processors. To hide some of these differences, an Application Programming Interface (API) was developed. The authors conclude with some of their observ... View full abstract»

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