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Precision Clock Synchronization for Measurement, Control and Communication, 2007. ISPCS 2007. IEEE International Symposium on

Date 1-3 Oct. 2007

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  • [Front cover]

    Publication Year: 2007 , Page(s): C1
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  • [Copyright notice]

    Publication Year: 2007 , Page(s): ii
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  • Message from the General Co-Chairmen

    Publication Year: 2007 , Page(s): iii
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  • Message from the Program Co-Chairmen

    Publication Year: 2007 , Page(s): iv
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  • ISPCS 2007 Conference Committee

    Publication Year: 2007 , Page(s): v
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  • ISPCS 2007 Sponsors

    Publication Year: 2007 , Page(s): vi
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  • A Perspective of Fault-Tolerant Clock Synchronization

    Publication Year: 2007 , Page(s): vii
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  • Table of contents

    Publication Year: 2007 , Page(s): viii - x
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  • Provision of Precise Timing via IEEE 1588 Application Interfaces

    Publication Year: 2007 , Page(s): 1 - 6
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2067 KB) |  | HTML iconHTML  

    The protocol specified in IEEE 1588, together with a profile, define a timing system that may be used to supply precise timing to applications. However, IEEE 1588 does not say anything about the interface to the applications. In designing this interface, the application performance requirements (e.g., jitter, wander, time synchronization) must be considered. For example, an application that requires microsecond or better time synchronization needs a hardware or firmware interface; a software interface can result in exceeding the synchronization requirement by a factor of 1000 or more. This paper describes the performance requirements of example applications. It then describes a general application interface in abstract terms. Finally, it describes realizations of the interface that can meet the performance requirements for selected applications. View full abstract»

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  • Object-oriented Model for IEEE 1588 Standard

    Publication Year: 2007 , Page(s): 7 - 12
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (3882 KB) |  | HTML iconHTML  

    The IEEE 1588 standard specifies a protocol enabling precise synchronization of clocks in measurement and control systems implemented with technologies such as network communication, and distributed objects. The Unified Modeling Language (UML) is a powerful tool for object-oriented modeling, design, and development of complex distributed systems. This paper describes an object-oriented model for the IEEE 1588 standard-v2, which has been developed using UML tool at National Institute of Standards and Technology (NIST). Tliis model consists of the data types, datasets, entities, and devices of IEEE 1588 standard-v2. The model has been used to produce C++ source codes, and create C++ libraries for the IEEE 1588 standard-v2. With the help of this object model, the development time of IEEE 1588-basd distributed measurement and control applications can be reduced dramatically. View full abstract»

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  • Why do we need a Sparse Global Time-Base in Dependable Real-time Systems?

    Publication Year: 2007 , Page(s): 13 - 17
    Cited by:  Papers (1)
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    In many hi-dependability applications (such as a fly-by-wire system) triple-modular redundancy (TMR) is deployed to mask arbitrary failures of any of its constituent components. A TMR system will only work properly if the three replicated channels are synchronized, operate independently and exhibit a deterministic behavior. Determinism requires that two inputs that are presented to the three independent channel at the same instant must be ordered in the same way by all three channels, i.e., simultaneity must be resolved consistently at the system level. In order to resolve this issue of system-wide consistent temporal ordering of events, a global time base of known precision-as established by the IEEE 1588 standard-is of utmost utility. Given such a global time-base of known precision, one can establish a global sparse time model that supports the consistent ordering of events. View full abstract»

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  • Traps and pitfalls in secure clock synchronization

    Publication Year: 2007 , Page(s): 18 - 24
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1076 KB) |  | HTML iconHTML  

    Clock synchronization has become one of the enabling techniques to enable real-time on both application-and network level. One of the most promising and currently intensively discussed approaches is IEEE1588, a master slave based synchronization protocol, which is intended to be a protocol not only limited for one application use, but for many domains such as telecom, test and measurement or factory automation. For some of these application domains security is a crucial feature, not only to prevent malicious attacks, but also to avoid accidental disturbances such as wrongly configured devices in the net. For the sake of these security requirements in version 2 of the IEEE1588 standard an informative annex describes an extension of the widely accepted protocol. Nevertheless not only the extension of a protocol with security fields defines a secure system, also a policy has to declare what to do in certain cases. This paper describes this security extension and gives and extensive analysis on the applicable threads as well as an attack of the master and approaches to include version 2 switches in a secure IEEE1588 clock synchronized network. View full abstract»

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  • Synchronization Performance of the Precision Time Protocol

    Publication Year: 2007 , Page(s): 25 - 32
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (3904 KB) |  | HTML iconHTML  

    This paper analyzes the factors that affect the synchronization performance in using the precision time protocol (FTP). We first study the influence of jitter under the assumption of no frequency drifts. Then we study the influence of frequency drift in the absence of jitter. The analytic formulas provide a theoretical ground for the understanding of simulation results as well as guidelines for choosing both system and control parameters when applying FTP. View full abstract»

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  • Synchronization of the Probes of a Distributed Instrument for Real-Time Ethernet Networks

    Publication Year: 2007 , Page(s): 33 - 40
    Cited by:  Papers (10)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (3673 KB) |  | HTML iconHTML  

    This work deals with distributed, multi-probe, instrument for performance analysis of Real-Time Ethernet (RTE) network Particularly, the work is focused on synchronization techniques for distributed measurements. In fact, the accuracy of results (typically jitter and delay) strictly depends on synchronization among distributed probes that sample data. Three synchronization techniques have been implemented and experimental results are reported. Synchronization by means of an external dedicated l-PPS signal gives the best results but requires a more complicated instrument structure. On the other hand, a network-oriented synchronization, such as IEEE 1588 FTP or PCTP (PROFINET 10), can simplify time distribution keeping accuracy well below 1 mus. View full abstract»

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  • Time-Triggered Ethernet and IEEE 1588 Clock Synchronization

    Publication Year: 2007 , Page(s): 41 - 43
    Cited by:  Papers (6)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (209 KB) |  | HTML iconHTML  

    The time-triggered Ethernet unifies real-time and non-real-time traffic into a single communication architecture. We have built a prototype implementation of an FPGA TT-Ethernet switch and an FPGA TT Ethernet communication controller supporting a network bandwidth of 100 Mbit/sec. Time-Triggered Ethernet introduces two message classes, i) the standard event-triggered Ethernet messages, denoted as ET messages, and ii) the time-triggered Ethernet messages, denoted as TT messages. All TT messages are transmitted periodically and are scheduled a priori in a way that there are no conflicts on the network. The network handles these messages according to the cut-through paradigm. Computer nodes containing TT Ethernet communication controllers establish and maintain global time base. However nodes containing standard Ethernet controllers can be connected to a TT Ethernet system and can send ET messages without affecting the temporal properties of the TT messages. The global time format of the TT Ethernet deploys the UTC time format which is compatible with the time format of the IEEE 1588 standard. In these work we present how we deploy the IEEE 1588 in order to synchronize the TT Ethernet controllers which require a tight synchronization among them. Additionally the IEEE 1588 clock synchronization based protocol will be implemented at standard Ethernet controllers such that they can be establish and maintain a global time base. View full abstract»

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  • Sub-nanosecond Distributed Synchronisation via the Universal Serial Bus

    Publication Year: 2007 , Page(s): 44 - 49
    Cited by:  Papers (1)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2129 KB) |  | HTML iconHTML  

    We present a distributed synchronisation architecture based on the universal serial bus (USB) found on every PC and laptop. This work has extended the capabilities of USB by adding a synchronization layer, capable of synchronizing a distributed USB network. Synchronization is achieved without consuming USB bandwidth or modifying the USB protocol. The synchronous USB device contains a phase-locked local oscillator. Oscillator phase accuracy is <700 ps across the distributed system, regardless of connection topology and clock jitter is better than 150 ps RMS. The synchronous USB device also contains a notion of real time allowing coordinated real-time operation. This local area synthetic instrumentation (SI) architecture offers sub-nanosecond distributed clock accuracy. View full abstract»

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  • Investigation of Industrial Environmental Influences on Clock Sources and their Effect on the Synchronization Accuracy of IEEE 1588

    Publication Year: 2007 , Page(s): 50 - 55
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2165 KB) |  | HTML iconHTML  

    Networked Industrial Devices must fulfill requirements regarding temperature ranges, noise immunities, and mechanical loads (e.g. DIN EN 60068-2-6). The effects of these environmental conditions on the stability of the frequency of clock sources are well studied [1, 2]. However the influence on the synchronization characteristics of IEEE 1588 can be derived only partly from these investigations. The dependency between the frequency drift (df/dt) and the transmission period of the synchronization frames T is very important for the achievable accuracy of IEEE 1588-based networks. In order to examine these effects, a novel measuring method is proposed in this paper. The results of exemplary measurements at a crystal oscillator with different temperature and mechanical loads will be discussed. These results are compared with the existing requirements for industrial communication systems, especially for the Industrial Ethernet system PROFINET. The objective is to derive coherences and rules for the implementation of functional components of the synchronization procedure. View full abstract»

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  • On Determinism in Event-Triggered Distributed Systems with Time Synchronization

    Publication Year: 2007 , Page(s): 56 - 63
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (6410 KB) |  | HTML iconHTML  

    We study event processing in locally distributed realtime systems. The objective is to use event-triggered communication together with a time-synchronization protocol, in particular. IEEE 1588 over Ethernet, to achieve the similar level of determinism as in statically scheduled time-triggered systems. Given a distributed application with component properties and input event rate characterization, we discuss an analytic procedure that bounds performance parameters. These parameters are also necessary for deterministic implementation of the application. The procedure is experimentally evaluated on a setup with standard software and networking components. View full abstract»

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  • Clock Synchronization for Wireless Positioning of COTS Mobile Nodes

    Publication Year: 2007 , Page(s): 64 - 69
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (3679 KB) |  | HTML iconHTML  

    The paper presents an innovative method to detect the position of commercial-off-the-shelf (COTS) wireless 802.1 la/b/g client hardware by evaluating differential signal propagation delays, thereby enhancing security or safety in wireless networks. The measurement is done by detecting the arrival time of a client signal at precisely synchronized access points. The overall vision is to accurately determine the position of a sender as a basis for new techniques for access control and system security as well as location based services in wireless environments. Safety-critical applications, like the task to make machines accepting commands only from operators located within the range of the machine, can be implemented. Furthermore, a security architecture can use such location information in order to offer services such as position based access policies, VLANs (Virtual Local Area Network), or Internet connections defining precise spatial coverage. View full abstract»

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  • Time Synchronization in the Eurobalise Subsystem

    Publication Year: 2007 , Page(s): 70 - 77
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (11831 KB) |  | HTML iconHTML  

    The ETCS standard was released by the European Union to reach interoperability in European railway signaling systems. This standard uses so called Eurobalises to send locally stored information to the passing train. Eurobalises are track mounted devices that operate on transponder technology. In order to support the standard for the European train control system (ETCS), a subsystem on the train called balise transmission module (BTM) was developed. The duty of the BTM is to tele-power an Eurobalise as the train passes and to receive the information sent by the Eurobalise. This data has to be demodulated and passed to the European vital computer (EVC), which is the control unit of the locomotive ensuring safe operation. To be able to locate a Eurobalise independent of received telegrams, a Balise Detect signal has to be additionally created by the BTM and sent to the EVC as demanded by ETCS standard. This signal is generated if the received field strength exceeds a given reference level. All components within the ETCS are operating in different time domains. In order to be able to calculate correct timing and odometric data, different time domains have to be synchronized. This has even effect on the safety critical operations within the system. ETCS requires the whole system fulfilling the SIL4 criteria. Considering modularity, it was decided that the BTM has to fulfill SIL4 criteria on its own, too. The crucial aspect is combining safety demands and time synchronization. It affects the communication between the BTM and the EVC. This paper focuses on the synchronization mechanisms within the components of the BTM and the synchronization between BTM and EVC. View full abstract»

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  • Precise Time Synchronization in Semiconductor Manufacturing

    Publication Year: 2007 , Page(s): 78 - 84
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (4983 KB) |  | HTML iconHTML  

    In today's semiconductor fabrication facilities ("fabs"), coordination of time-based information throughout the factory and enterprise has become necessary to support fab-wide diagnostics, control, and information management. This has driven the need to have time synchronization at all levels of the enterprise. Time synchronization protocols such as network time protocol (NTP) and precision time protocol (PTP) have been defined for performing synchronization over distributed systems. Lack of time synchronization among the various subsystems is seen as a factor of poor data quality in equipment data acquisition (EDA) and advanced process control (A PC) analysis. The focus of our study is to investigate the extent and precision of time synchronization that can be practically applied with the available protocols at various levels of the semiconductor factory environment to meet next generation manufacturing requirements. To this end, we describe the objectives, details, and implementation of the simulator that aims to model a semiconductor factory network This will provide a practical perspective to study the accuracy achievable and potential network factors contributing to accuracy degradation of factory-wide time synchronization. View full abstract»

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  • Precision Packet Delay Measurements Using IEEE 1588v2

    Publication Year: 2007 , Page(s): 85 - 91
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (20711 KB) |  | HTML iconHTML  

    Aspects of IEEE 1588 Version 2, in particular the provisions for unicast and for faster sync rates, when combined with hardware timestamping and a precision timing reference such as GPS, provide a powerful tool for studying packet latency and packet delay variation, both in the laboratory and in live production networks. Many devices found in telecom networks such as routers, multilayer switches, and DSL access multiplexers, as well as complex networks, do not lend themselves to study using exclusively the multicast of the original IEEE 1588 definition. Further, investigation of the temporal characteristics of packet delay variation benefits from the increased sync rates available in IEEE 1588v2. This paper presents results and analysis of measurements taken in laboratory networks and production networks in various locations throughout the world. Networks of various types ranging from Local Area Networks (LANs) to Wide Area Networks (WANs) are studied. View full abstract»

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  • IEEE 1588 on Windows XP® Powered Measurement Devices - Mastering the Trigger Challenge

    Publication Year: 2007 , Page(s): 92 - 95
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    In the literature, one can find many recommendations for clock designs for either fully HW assisted IEEE 1588 systems or embedded SW implementations. The focus of such solutions is mostly on improving the synchronization performance. However, in most test and measurement systems, the main problem is not synchronization of clocks, but triggering of devices: even on a general purpose OS like Windows XPreg it is always possible to find a clock source with a sufficient resolution of around 1 mus for a SW-only IEEE 1588 implementation, but none of the built-in timers is suitable for triggering the device with such a resolution. In this paper, we will discuss the limits of timers under Windows XPreg and introduce an FPGA based timing HW as assistance for an IEEE 1588 SW implementation for use in Rohde&Schwarz FSL spectrum analyzers. View full abstract»

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  • Improved synchronization behavior in highly cascaded networks

    Publication Year: 2007 , Page(s): 96 - 99
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1512 KB) |  | HTML iconHTML  

    The boundary blocks (BC) defined in both versions of the IEEE1588 standard respectively draft standard evidence two problems when used in cascaded networks. Namely, there is strong nonlinear decreasing synchronization accuracy and rising resynchronization time after network reconfiguration. To eliminate these effects the concept of transparent clocks (TC) has been introduced in the IEEE 1588 standard version 2. The use of optimized control loops shows a clearly improved reconfiguration behavior and linear decreasing synchronization accuracy over a wide range of cascades. The paper furthermore will present related measurement results of highly (30) cascaded IEEE 1588 enabled switches. The results of the optimized control loops are compared with similar configurations based on TCs and BCs without optimization. View full abstract»

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  • IEEE 1588 applied in the environment of high availability LANs

    Publication Year: 2007 , Page(s): 100 - 104
    Cited by:  Papers (7)
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    High availability applications typically count on the network's ability to reconfigure in case of a failure. Since the precision time protocol (PTP) measures the delay of communication paths, it has to cope with network topology changes. The concept of peer-to-peer transparent clocks (TC), introduced with PTP version 2, facilitates the handling of path switchover by measuring the link delays from each node to its neighbors in advance. The parallel redundancy protocol (PRP) follows a different approach from the well-known reconfiguration protocols. It makes use of two independent Ethernet networks. Frames are replicated by the sending node and transmitted over both networks. Duplicates are discarded by the receiving node. There is no distinction between a working and a backup path. The combination of PTP and PRP is studied in this paper. Different models are presented and evaluated with respect to synchronization switchover and implementation issues. An experimental implementation is outlined. The results show that master clock failure as well as network failures can be handled with very low impact on synchronization quality. View full abstract»

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