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Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on

Date 6-9 Aug. 2006

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  • [Front cover]

    Page(s): C1
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  • Proceedings of the 2006 49th Midwest Symposium on Circuits and Systems

    Page(s): i
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  • Copyright page

    Page(s): ii
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  • Welcome to the 49th IEEE International Midwest Symposium on Circuits and Systems

    Page(s): iii
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  • Contents

    Page(s): iv - xxi
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  • Symposium Support

    Page(s): xxii
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  • Organizers

    Page(s): xxiii
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  • Organizing Committee

    Page(s): xxiii - xxv
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  • MWSCAS 2006 Advisory Committee

    Page(s): xxvi
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  • Technical Tracks

    Page(s): xxvii - xxviii
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  • MWSCAS 2006 Reviewers

    Page(s): xxix - xxxi
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  • General information

    Page(s): xxxii
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  • Student Paper Contest

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  • Myril B. Reed Best Paper Award

    Page(s): xxxii
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  • Analog in a Digital World

    Page(s): xxxiii
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (975 KB)  

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  • Multicell Delta-Sigma Data Converters

    Page(s): xxxiv
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  • Circuit Techniques for Operational Amplifier Speed and Accuracy Improvement: Analog Circuit Design with Structural Methodology

    Page(s): xxxv - xxxvi
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    OpAmp is the main analog building block for both the systems on discrete elements and systems on silicon. The parameters of OpAmp often define and limit the overall system performance. CMOS technology provides an opportunity to use more complex structural solutions and circuit techniques to improve OpAmp accuracy, power/speed ratio, to add new functional advantages, like low voltage supply operation capability or rail to rail input without the switching point, everything for negligible additional component cost. The circuit techniques that will be demonstrated during this course were proven in design of leading industrial OpAmps. These techniques are unified by a common structural design approach, based on the following principles: system analysis at the high level of abstraction using the graphic tools like signal flow graphs, and generation of the set of equivalent graph modifications, equivalent graph transformations to the form when every important parameter in the system or the amplifier is controlled by a dedicated feedback loop; stability of these loops is achieved without compensation capacitors, by using one-stage (preferably current) amplifiers, system synthesis consists of implementation of the set of the gain structure modifications followed by simulations based on available library of cells, and final selection of the best circuit solutions. View full abstract»

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  • RF Wireless Integrated Architectures for 4G Communication Systems

    Page(s): xxxvi - xxxvii
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    The resent proliferation of personal communications systems (PCS) applications and cellular phones is driving a demand for portable systems which share the common requirements of low cost, small form factor and low power consumption. In addition, the emergence of various wireless standards around the world has created a demand for RF wireless radios (transceivers) that can operate in more than one mode. Thus, multi-standard RF transceivers are predicted to play a critical role in wireless communication systems in the futures. The 4G wireless technology address these needs. This tutorial will discuss the evolution of the wireless industry and will focus on power technology and transceiver architectures used in modern cost effective mobile communication systems. Architectures and design techniques suitable for mutli-standard low power transceivers achieving high level of integration will be presented. A complete system design example for GSM wireless standard will be addressed. View full abstract»

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  • Substrate Noise suppression Techniques for Systems on Chip

    Page(s): xxxvii - xxxviii
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    As "System-on-Chip" designs are becoming popular, the substrate noise topic has attracted much attention in the past. Even today, a significant research effort is devoted to mitigate the impact of mostly digitally generated substrate noise on sensitive mixed-signal circuits. In mixed-signal circuits, complex and noisy digital circuits are integrated on the same substrate with noise-sensitive analog circuits. In fact, it is possible for the noise-inducted currents injected into the common substrate, to result in operational/functional failures of the analog and digital blocks. For example, suppose that we have DSP block, which is switching very fast in the vicinity of a broadband receiver. We can observe that there are some unwanted frequency components with considerable magnitude in the receiver spectrum due to substrate noise degrading the performance. From designers' perspective, one would like to find circuit and physical level techniques to protect sensitive circuits from substrate noise effects. This tutorial covers brief introduction to substrate noise sources and effects, then gives more details about existing substrate noise reduction techniques in two different categories: i) circuit-level, ii)physical level following by discussion on results of scaling on substrate noise and conclusion at the end. View full abstract»

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  • Advanced Multi-Antenna Techniques

    Page(s): xxxviii - xxxix
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    Extensive use of Internet and huge demand for multi-media services via portable devices require the development of packet-based radio access systems with high transmission efficiency. Advanced radio transmission technologies have recently been proposed to achieve this challenging task. The use of multiple antennas, known as multi-input multi-output (MIMO), is one of key technologies toward this challenge. This tutorial gives a complete overview of various emerging multiantenna techniques. It includes beamforming, single-user MIMO, multi-user MIMO and opportunistic MIMO techniques. In particular, the opportunistic MIMO techniques are very new ones that can achieve both the diversity and multiplexing gain simultaneously, providing significant performance gain over the previous MIMO techniques. In addition, this tutorial addresses some hot issues related to the realization, including the flexibility of MIMO configuration, estimation of channel state information, feedback signaling burden for the MIMO information and the effect of channel correlation. View full abstract»

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  • Design-for-Test of Mixed-Signal Integrated Circuits

    Page(s): xxxix - xl
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    What to test and what does test need for a complex mixed-signal ASIC are the two main issues this tutorial will try to focus. It will account for several factors: Stimuli generation. An efficient test procedure would use a single signal especially a signal that is easily supplied to a selected input or generated on-chip. Sufficient access. It is preferable to have access to several internal nodes that the tester can read either sequentially or in parallel. Such access permits selection of convenient test points. Single test output. The output should contain all the information required to interpret test signals. Having the information digitally encoded would also reduce tester requirements. Simple measurement set. This set must contain sufficient information about the circuit under test's operational status. System-level decomposition. An efficient test procedure will employ a system-level strategy for decomposing the ASIC into meaningful parts. This decomposition permits testing of each part using a common procedure. These issues are worth attention for specific circuit classes, since there is no universal method valid for any kind of analog and/or mixed-signal function. These factors and their application for solving testing problems in general or for specific circuits will be presented and discussed. In particular, during the presentations making part of this tutorial, more attention will be paid to integrated filters (Switched-Capacitor and continuous-time), integrated A/D and D/A converters, and PLLs. View full abstract»

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  • Sensor Data Fusion and Integration with Applications to Target Tracking and Robotics

    Page(s): xli - xlii
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    Sensor integration and registration is a prerequisites to exploiting the inherent advantages of multi-sensor systems over single sensor systems. Using a single sensor, we can monitor objects with a precision and accuracy that depended on the sensor characteristics. By using multiple sensors to observe and object, we can obtain multiple viewpoints, extended coverage both spatially and temporally, reduce the ambiguity and obtain more precise estimate of object kinematics than that is possible through the best individual sensor. Engineers can replace a single very expensive sensor with many cheaper sensors in a tracking scenario or employ a variety of sensor to construct a complete view of the robot's environment. This certainly is the case with of a netted sensory system. For example, a single sensor may have a blind azimuth *screening angle) which an adjacent sensor may cover. In those areas where sensor coverage overlaps, the quality of which not only improve our estimate of object kinematics, but also help with its detection when the environment is changing. Form the military point of view, multiple sensors provide diverse information, which can be used by the decision-makers to derive an appropriate response to perceived threats. As the number of threats, or objects in robot's workspace, being monitored increases, the difficulty in maintaining techniques capable of functioning in a cluttered, dynamic environment containing the objects of interest is of fundamental importance to enhancing the survivability and usefulness of multi-sensor system. View full abstract»

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  • Session Program and Abstracts

    Page(s): xliii - lxxxiv
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  • Table of contents

    Page(s): 1
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  • Chaos Based Random Clock Generator

    Page(s): 2 - 6
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    The integrated analog system proposed in this paper allows to generate a high entropy random clock signal. It is based on the biasing of an oscillator by a random stair-step current. The step amplitude varies randomly on a continuous, uniformly distributed and width-tunable interval. The step length varies randomly on a continuous interval presenting an average adjustable value. The clock signal thus generated presents frequency jumps between random frequencies, occurring at random instants. Its average frequency is tunable and its frequency variation range is continuous, uniformly distributed and width- adjustable. The proposed implementation uses a chaotic oscillator exhibiting a double-scroll attractor as entropy source. It has been simulated from the process parameters of a STMicroelectronics 0.18 mum CMOS technology. It consumes less than 1 mW for a frequency variation range centered on 20 MHz and extending symmetrically on 30 MHz. Its characteristics deviation over process, voltage and temperature (PVT) variations is less than 10%. Its estimated area is approximatively 0.01 mm2. View full abstract»

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