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Twenty-Third Annual IEEE Semiconductor Thermal Measurement and Management Symposium

Date 18-22 March 2007

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  • [Front cover]

    Publication Year: 2007, Page(s): C1
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  • Twenty Third Annual IEEE Semiconductor Thermal Measurement and Management Symposium

    Publication Year: 2007, Page(s): i
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  • 2007 Proceedings, Twenty Third IEEE Semiconductor Thermal Measurement and Management Symposium

    Publication Year: 2007, Page(s): ii
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  • Welcome

    Publication Year: 2007, Page(s):iii - iv
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  • SEMI-THERM 23 Steering Committee

    Publication Year: 2007, Page(s): v
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  • IEEE SEMI-THERM XXIII Short Courses

    Publication Year: 2007, Page(s): vi
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  • A world of opportunities [advertisement]

    Publication Year: 2007, Page(s): vii
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  • [Breaker page]

    Publication Year: 2007, Page(s): viii
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  • Table of contents

    Publication Year: 2007, Page(s):ix - xii
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  • Extracting Thermal Data from High Power MCM Packages

    Publication Year: 2007, Page(s):1 - 6
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (724 KB) | HTML iconHTML

    An experimental method was presented for characterizing the thermal performance of multi-chip modules (MCMs) using different size heat sinks. A flip chip package, having a total of five active components, was tested at various power level combinations using a flow bench test facility to supply air flow at a controlled velocity. A linear superposition model, developed for each sink, accurately pred... View full abstract»

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  • Thermal Analysis of Memory Module Using Transient Testing Method

    Publication Year: 2007, Page(s):7 - 11
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (664 KB) | HTML iconHTML

    The electrical transient testing method has become popular as a useful thermal analysis tool because of its accuracy, high repeatability and rich information content compared to the use of traditional steady state thermal characterization techniques. This paper presents a thermal study of a 16-chip memory module using transient testing. The two variables in this study are the thermal boundary cond... View full abstract»

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  • Thermal Characteristics of Chip Stack and Package Stack Memory Devices in the Component and Module Level

    Publication Year: 2007, Page(s):12 - 17
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1645 KB) | HTML iconHTML

    The demand of the high storage memory is providing a momentum for stacking technology in DRAM industry. As the stack technology is developed, more heat sources are embedded in the same package footprint and increase the device temperature. Therefore, the thermal management is one of most important issues in DRAM stack package. Since the chip stack and package stack technology are competing each ot... View full abstract»

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  • High-Level Packaging Options for Outdoor Remote Units

    Publication Year: 2007, Page(s):18 - 23
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5790 KB) | HTML iconHTML

    Thermal performance of three high-level packaging options for natural convection and radiation cooled outdoor remote units was investigated in this work. Analytical correlations were used to determine required number and size of the fins. Then, a computational fluid dynamic simulation tool was used to investigate detailed thermal performance of three packaging options with the limitation that they... View full abstract»

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  • Investigation of CPU Thermal Solution Designs for BTX Desktop System

    Publication Year: 2007, Page(s):24 - 29
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (636 KB) | HTML iconHTML

    Along with the ever increasing in CPU performance, the corresponding heat load climbs up significantly. For the personal computer with strict geometric constraints, the thermal management needs to be considered at the system level, instead of the component level. Especially in a system with BTX layout, the CPU and chipsets are aligned with the system fan. The geometry of CPU heat sink is inclined ... View full abstract»

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  • Red Storm/XT Supercomputers Cooling System Design and Optimization

    Publication Year: 2007, Page(s):30 - 36
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1076 KB) | HTML iconHTML

    Developing the optimal design for a supercomputer system is a complex and time consuming process. This paper describes a sequential optimization approach that can lead to the most effective computer cooling system design in the shortest time possible. Ways of seeking effective Pareto designs are shown. Cost driven quality engineering was applied to develop cooling solutions for chips, printed circ... View full abstract»

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  • Thermal Considerations for LED Components in an Automotive Lamp

    Publication Year: 2007, Page(s):37 - 43
    Cited by:  Papers (22)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (419 KB) | HTML iconHTML

    LED's in automotive lamp applications have been utilized effectively for functions with low light output requirements and for styling purposes. In recent years, high to ultra high power LED's are becoming a light source option for virtually every automotive lighting system. For exterior automotive lighting, these light sources have distinct advantages, but also unique thermal issues compared to co... View full abstract»

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  • Thermal Design and Analysis of a Military Aircraft Intercommunications System

    Publication Year: 2007, Page(s):44 - 50
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (924 KB) | HTML iconHTML

    A new fiber optic/digital intercommunication system (ICS) for the Navy's E-2D advanced Hawkeye aircraft is under development to replace the aging analog system. The unique design of the system required a single chassis, called the Crew Station, to house a single board computer (SBC) and all associated electronics for each of the five operator's stations aboard the aircraft. This paper presents the... View full abstract»

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  • Extraction of Power Dissipation Profile in an IC Chip from Temperature Map

    Publication Year: 2007, Page(s):51 - 56
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (408 KB) | HTML iconHTML

    This paper presents a new technique to calculate the power dissipation profile from the IC temperature map using an analogy with image processing and restoration. In this technique, finite element analysis (FEA) is used to find the heat point spread function of the IC chip. Then, the temperature map is used as input for an efficient image restoration algorithm which locates the sources of strong p... View full abstract»

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  • Non-Contact Surface Temperature Measurements Coupled with Ultrafast Real-Time Computation

    Publication Year: 2007, Page(s):57 - 63
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (495 KB) | HTML iconHTML

    This work presents the next step following a previous effort (Raad et al., 2006) toward creating a coupled experimental-computational technique devised for the full characterization of the thermal behavior of complex three-dimensional active submicron electronic devices. A newly developed CCD based thermoreflectance thermography (TRTG) system is used to measure the 2D surface temperature field of ... View full abstract»

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  • Development of Junction Temperature Decision (JTD) Map for Thermal Design of Nano-scale Devices Considering Leakage Power

    Publication Year: 2007, Page(s):63 - 67
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (394 KB) | HTML iconHTML

    As semiconductor technology keeps scaling down, leakage power grows significantly due to the reduction in threshold voltage, channel length, and gate oxide thickness. As the junction temperature increases in nano-scale devices, leakage power increases drastically. This phenomenon motivates the processor and package designers to take into account thermal effects due to the large leakage power for h... View full abstract»

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  • On The Correlation Between Multiple Hot Blocks And Package Thermal Resistance

    Publication Year: 2007, Page(s):69 - 73
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (202 KB) | HTML iconHTML

    A flip-chip package with square die is considered in this study. Up to four square non-intersecting hot blocks are imposed on the die's otherwise uniform power distribution. Block locations on the die outline are randomly chosen with uniform probability. The power density of a given block is a random parameter, and is permitted to be as high as 10times the baseline uniform bulk power density. Addi... View full abstract»

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  • A Junction Temperature Reduction Technique for a Microprocessor Considering Temperature Coupled Leakage Power

    Publication Year: 2007, Page(s):74 - 78
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (325 KB) | HTML iconHTML

    Leakage power is emerging as a key challenge in IC design. Since leakage power has super-linear dependency on operating temperature, it becomes imperative to consider the thermal effects while optimizing leakage power. In this paper, an inter-simulation technique which accounts for leakage power and temperature variations is present. Integrating leakage model and coupled thermal-leakage simulation... View full abstract»

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  • A Statistical Approach For Characterizing The Thermal Impact Of TIM Voids

    Publication Year: 2007, Page(s):79 - 82
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (308 KB) | HTML iconHTML

    Traditional methods of TIM (thermal interface material) void content specification are often based on a worst case analysis and can often lead to conservative and expensive lid attach design/process development, especially in high performance microprocessor package designs that are the norm today. In a meaningful departure from such methods, we present a practical approach to specify the maximum v... View full abstract»

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  • Comparison of Test Methods for High Performance Thermal Interface Materials

    Publication Year: 2007, Page(s):83 - 86
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (274 KB) | HTML iconHTML

    This paper relates the application of two of the methods for testing the thermal interface materials to the development and characterization of high performance materials. Particular strengths of different test methods provide a more complete understanding of TIM performance. In combination the tools provide effective development and improvement metrics. The limitations in resolution and repeatabi... View full abstract»

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  • Hierarchical Nested Surface Channels for Reduced Particle Stacking and Low-Resistance Thermal Interfaces

    Publication Year: 2007, Page(s):87 - 94
    Cited by:  Papers (14)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (641 KB) | HTML iconHTML

    This paper reports on the improvement of thermal interfaces through the control of particle stacking during bondline formation. Particle stacking occurs in highly filled materials due to pressure gradients developing during squeeze flow over a rectangular surface, resulting in non-uniform interface properties and thick bondlines with a large thermal resistance. Nested surface channel designs are p... View full abstract»

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