Date Oct. 2006
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Displaying Results 1 - 25 of 159
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A High Speed Reduced Pin Count JTAG Interface
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PDF (10618 KB)
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A Case Study of Using IEEE P1687 (IJTAG) for High-Speed Serial I/O Characterization and Testing
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PDF (287 KB)
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Comparison of Delay Tests on Silicon
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PDF (228 KB)
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High-Voltage and High-Power PLL Diagnostics using Advanced Cooling and Emission Images
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PDF (1149 KB)
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A Logic Diagnosis Methodology for Improved Localization and Extraction of Accurate Defect Behavior
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PDF (310 KB)
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SiP-TAP: JTAG for SiP
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PDF (730 KB)
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Dependable Network-on-Chip Router Able to Simultaneously Tolerate Soft Errors and Crosstalk
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PDF (326 KB)
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Test Structure and Testing of the Microsoft XBOX 360/sup TM/ Processor High Speed Front Side Bus
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PDF (187 KB)
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Issues on Test Optimization with Known Good Dies and Known Defective Dies - A Statistical Perspective*
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PDF (12111 KB)
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Power Supply Noise in Delay Testing
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PDF (258 KB)
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