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Signal Propagation on Interconnects, 2006. IEEE Workshop on

Date 9-12 May 2006

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Displaying Results 1 - 25 of 107
  • [Breaker page]

    Publication Year: 2006 , Page(s): 1
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  • [Breaker page]

    Publication Year: 2006 , Page(s): 2
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  • [Opinion]

    Publication Year: 2006 , Page(s): 3
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  • [Blank page]

    Publication Year: 2006 , Page(s): 4
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  • Contributor Listings

    Publication Year: 2006
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  • [Blank page]

    Publication Year: 2006 , Page(s): 6
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  • Table of contents

    Publication Year: 2006 , Page(s): 7 - 12
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  • [Blank page]

    Publication Year: 2006 , Page(s): 13
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  • [Blank page]

    Publication Year: 2006 , Page(s): 14
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  • [Breaker page]

    Publication Year: 2006 , Page(s): 15
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  • [Blank page]

    Publication Year: 2006 , Page(s): 16
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  • Application of the Conjugate Gradient Technique to Stripline Packaging Problems

    Publication Year: 2006 , Page(s): 17 - 20
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (3336 KB) |  | HTML iconHTML  

    In most applications the method of moments (MoM) generates full reaction matrices. However, in this paper, we demonstrate that sparse reaction matrices are produced when modeling stripline interconnects. This is demonstrated by investigating the sparse nature of the MoM reaction matrices that are produced when using the full-wave layered interconnect simulator (UA-FWLIS) with a parallel-plate Gree... View full abstract»

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  • Passive Rational Function Fitting of a Driving-Point Impedance from Its Real Part

    Publication Year: 2006 , Page(s): 21 - 22
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1018 KB) |  | HTML iconHTML  

    An important consequence of the passivity of a network driving-point impedance, Z(s), is that knowledge of its resistive part along the imaginary axis of the complex-frequency plane ( s = alpha + jomega plane) suffices for the determination of Z(s) everywhere on the complex plane. By exploiting this property we show that a passive rational function fit of the driving-point impedance of a passive n... View full abstract»

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  • [Breaker page]

    Publication Year: 2006 , Page(s): 23
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  • [Blank page]

    Publication Year: 2006 , Page(s): 24
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  • Global Routing for Force Directed Placement

    Publication Year: 2006 , Page(s): 25 - 28
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (2295 KB) |  | HTML iconHTML  

    This paper presents a global routing model that can be directly integrated into a force directed placement flow. In contrast to previous approaches, this new model takes geometrical routing attributes into special consideration already during the placement phase. Additionally, a novel way of estimating congestion is introduced. Results show that the model leads to a decrease in congestion on globa... View full abstract»

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  • Analysis based reduction using sensitivity analysis

    Publication Year: 2006 , Page(s): 29 - 32
    Cited by:  Patents (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (2793 KB) |  | HTML iconHTML  

    We present a new method to tackle the problem of rising complexity in circuit simulation caused by an increasing number of interconnect parameters which are to be taken into account during chip design. Our new reduction approach is based on the goal of the simulation analysis and uses an efficient sensitivity analysis to achieve a large degree of reduction without sacrificing accuracy View full abstract»

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  • Statistical Variations of Interconnect Parasitics: Extraction and Circuit Simulation

    Publication Year: 2006 , Page(s): 33 - 36
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (4292 KB) |  | HTML iconHTML  

    With an increasing influence of parasitic interconnect properties on the circuit performance, one also sees an increasing necessity to appropriately model the corresponding fluctuations induced by unavoidable random process variations, and to include them in subsequent circuit simulations. The paper discusses an efficient approach that addresses this problem using a semi-analytic approximation. It... View full abstract»

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  • [Breaker page]

    Publication Year: 2006 , Page(s): 37
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  • [Blank page]

    Publication Year: 2006 , Page(s): 38
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  • Package Model for Efficient Simulation, Design, and Characterization of High Performance Electronic Systems

    Publication Year: 2006 , Page(s): 39 - 42
    Cited by:  Papers (1)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (3028 KB) |  | HTML iconHTML  

    As bit rates are approaching 10 Gbps with ever-increasing requirement for package performance, multi-layer FC-BGA package are gradually becoming a de facto for high performance system. Since the signal frequency is now in the range of noise generated by power plane resonances, it presents a major challenge to model the complex interaction between signal traces and power/ground planes. Any attempt ... View full abstract»

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  • The Impact of Leakage to the Power Supply Impedance of a Microprocessor

    Publication Year: 2006 , Page(s): 43 - 46
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (2016 KB) |  | HTML iconHTML  

    This paper shows that the resonant behavior of a microprocessor's power supply is strongly influenced by both the leakage and the dynamic power of the microprocessor. As a result of this, the peak package power supply impedance is a function of the operating conditions of the microprocessor. Measurements on a 65 nm Intelreg Pentiumreg 4 microprocessor have been used to quantify this behavior View full abstract»

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  • Measurement of worst-case power delivery noise on chip under operating conditions

    Publication Year: 2006 , Page(s): 47 - 50
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (3428 KB) |  | HTML iconHTML  

    Maximum power delivery noise is a major indicator of chip performance. The measurement of the worst-case noise is technically difficult because maximum possible noise might not be achieved in a typical chip operation and creating a special stimulus generating this noise might push the chip beyond its operational margin. The paper considers an approach in which extraction of the absolute maximum po... View full abstract»

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  • Modeling of the IC's switching currents on the power bus of a high speed digital board

    Publication Year: 2006 , Page(s): 51 - 54
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (3871 KB) |  | HTML iconHTML  

    When the performances of the electronic technology increase (higher frequencies, more power, lover power supply, faster transistors, reduced chip dimensions), designing electronic equipment becomes more challenging for the electronic engineers. Signal and power integrity on board become of paramount importance. One of the main causes of board malfunctions and electromagnetic radiation is the simul... View full abstract»

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  • [Breaker page]

    Publication Year: 2006 , Page(s): 55
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